JPH1070130A - Heat-treating conductive thin film using a-c magnetic field - Google Patents

Heat-treating conductive thin film using a-c magnetic field

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Publication number
JPH1070130A
JPH1070130A JP8224117A JP22411796A JPH1070130A JP H1070130 A JPH1070130 A JP H1070130A JP 8224117 A JP8224117 A JP 8224117A JP 22411796 A JP22411796 A JP 22411796A JP H1070130 A JPH1070130 A JP H1070130A
Authority
JP
Japan
Prior art keywords
thin film
conductive thin
film
magnetic field
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8224117A
Other languages
Japanese (ja)
Inventor
Yasuo Nakahara
康雄 中原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8224117A priority Critical patent/JPH1070130A/en
Publication of JPH1070130A publication Critical patent/JPH1070130A/en
Pending legal-status Critical Current

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  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Control Of Temperature (AREA)
  • Semiconductor Memories (AREA)

Abstract

PROBLEM TO BE SOLVED: To heat-treat a conductive thin film uniformly at a good reproducibility and low cost for a short time. SOLUTION: An a-c magnetic field 15 perpendicular to the surface of a conductive thin film 1 formed on an insulation structure 17 is applied to the substrate and the film 1 classified in semiconductors such as amorphous Si having specific resistivity of less than 10<10> Ωcm at a frequency f>=1Hz and field intensity H>=1V/cm to generated an induced current 16 in the conductive film which selectively inductively heats only the semiconductor even in a laminate of insulators and semiconductor.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、物質の熱処理に関
するものである。
TECHNICAL FIELD The present invention relates to heat treatment of a substance.

【0002】[0002]

【従来の技術】最初に、従来の半導体回路の熱処理方法
を説明するためにメモリの工程図を下記に示すことにす
る。図8はDINOR型のフラッシュメモリの断面工程
図である。図8aに示すように、比抵抗30ΩcmのS
iウェハ面の導電性薄膜1は、素子側に素子間を分離す
るための局所酸化膜2を有している。
2. Description of the Related Art First, a process diagram of a memory will be described below to explain a conventional heat treatment method for a semiconductor circuit. FIG. 8 is a sectional process view of a DINOR type flash memory. As shown in FIG. 8A, S having a specific resistance of 30 Ωcm
The conductive thin film 1 on the i-wafer surface has a local oxide film 2 on the element side for separating elements.

【0003】また、導電性薄膜1の上には、酸化シリコ
ン製の下絶縁膜3、イオン注入後にアニールされた多結
晶シリコン製の浮遊ゲート4及び窒化シリコン製の上絶
縁膜5が順次堆積されている。そして上絶縁膜5は、そ
の上に不純物が極めて少ない多結晶シリコン製の高抵抗
層6を載せている。
On the conductive thin film 1, a lower insulating film 3 made of silicon oxide, a floating gate 4 made of polycrystalline silicon annealed after ion implantation, and an upper insulating film 5 made of silicon nitride are sequentially deposited. ing. The upper insulating film 5 has thereon a high-resistance layer 6 made of polycrystalline silicon with very few impurities.

【0004】この状態で、フラッシュメモリの制御ゲー
ト、ソースまたはドレインを形成するため、図8aのよ
うにこの導電性薄膜1の表面に垂直な方向からイオン7
を注入する。すると、図8bに示すように、高抵抗膜6
や導電性薄膜1の表面にイオンの濃度が相対的に高い注
入膜8が形成される。
In this state, in order to form a control gate, source or drain of the flash memory, ions 7 are formed in a direction perpendicular to the surface of the conductive thin film 1 as shown in FIG.
Inject. Then, as shown in FIG.
In addition, an implanted film 8 having a relatively high ion concentration is formed on the surface of the conductive thin film 1.

【0005】注入膜8はイオンが活性化されておらず、
そのままでは、抵抗が高いのでキセノンランプ等からの
光9によって加熱される。光によってイオンは活性化さ
れると同時に拡散するので、図8cに示されるように上
絶縁膜5上に制御ゲート10が、また、導電性薄膜1上
にソースまたはドレインとなる低抵抗膜11がそれぞれ
出来る。
The implanted film 8 has no activated ions,
Since the resistance is high as it is, it is heated by light 9 from a xenon lamp or the like. Since the ions are activated and diffused by light, the control gate 10 is formed on the upper insulating film 5 and the low-resistance film 11 serving as a source or a drain is formed on the conductive thin film 1 as shown in FIG. 8C. You can do each.

【0006】続いて、このフラッシュメモリの間を接続
するため、副ビット線を設ける。図8dに示すように、
絶縁膜にコンタクトホールを開けて、下層が多結晶シリ
コン、上層がアルミニウムからなる副ビット線12を低
抵抗膜11上に形成する。また、副ビット線12上に新
たな絶縁膜を堆積後、アルミニウム製のワード線13を
配置する。
Subsequently, a sub-bit line is provided to connect between the flash memories. As shown in FIG. 8d,
A contact hole is opened in the insulating film, and a sub-bit line 12 made of polycrystalline silicon in the lower layer and aluminum in the upper layer is formed on the low-resistance film 11. After a new insulating film is deposited on the sub-bit line 12, a word line 13 made of aluminum is arranged.

【0007】さらに、ワード線13と交差する主ビット
線14を、絶縁膜を挟んでワード線上方に設ける。図8
aと図8cとの比較により、従来の熱処理方法では、各
導電性薄膜のアニール工程が膜毎に行われていることが
分かる。そうする訳は、図8bで行われる熱処理工程の
到達温度が表面からの深さにより異なるためである。
Further, a main bit line 14 crossing the word line 13 is provided above the word line with an insulating film interposed therebetween. FIG.
Comparison between FIG. 8A and FIG. 8C shows that in the conventional heat treatment method, the annealing step of each conductive thin film is performed for each film. This is because the temperature reached in the heat treatment step performed in FIG. 8B differs depending on the depth from the surface.

【0008】このため、複数層を一度に加熱すると、1
層毎の歩留が99%であっても4層の歩留は(0.9
9)4=96%よりさらに下がってしまう。ここで、従
来、薄膜を熱処理する為の方法としては、一般的に次の
三つの方法が知られている。 (a)電気炉 (b)ランプアニール (c)レーザーアニール
For this reason, when heating a plurality of layers at once, 1
Even if the yield for each layer is 99%, the yield for four layers is (0.9%).
9) It is even lower than 4 = 96%. Here, conventionally, the following three methods are generally known as a method for heat-treating a thin film. (A) Electric furnace (b) Lamp annealing (c) Laser annealing

【0009】[0009]

【発明が解決しようとする課題】ところが、(a)の熱
処理方法は、炉全体を加熱することから、炉の温度の安
定のために長い時間がかかったり、加熱された炉から物
体へ好ましくない不純物が拡散する場合がある。また、
(b)の熱処理方法は、膜厚によって光の透過率が大き
く変動するため、物体が所定の温度にならない場合があ
る。
However, since the heat treatment method (a) heats the entire furnace, it takes a long time to stabilize the temperature of the furnace, and it is not preferable that the object is transferred from the heated furnace to an object. Impurities may diffuse. Also,
In the heat treatment method (b), since the light transmittance greatly varies depending on the film thickness, the object may not reach a predetermined temperature.

【0010】さらに、(c)の熱処理方法は、多数の数
十μmの平面パターン上を数十cmの走査を行うため、
再現性に問題が生じる場合がある上、長い処理時間と高
い費用とが必要となる。この発明の目的は、前述した事
情に鑑みてなされてものであり、好ましくない影響を及
ぼすことなく、対象物体、特に導電性薄膜を短時間低コ
ストで均一に再現性良く熱処理することである。
In the heat treatment method (c), a large number of plane patterns of several tens μm are scanned over several tens of cm.
Problems may occur in reproducibility, and long processing time and high cost are required. SUMMARY OF THE INVENTION An object of the present invention has been made in view of the above-mentioned circumstances, and it is an object of the present invention to heat-treat a target object, especially a conductive thin film, uniformly and reproducibly in a short time and at low cost without adverse effects.

【0011】[0011]

【課題を解決するための手段】本発明の熱処理方法は、
交流磁場を印加することにより導電性薄膜を加熱するこ
とを特徴とする。また、本発明の熱処理方法は、導電性
薄膜を支持する基板として絶縁基板を用いることを特徴
とする。
The heat treatment method of the present invention comprises:
The method is characterized in that the conductive thin film is heated by applying an alternating magnetic field. Further, the heat treatment method of the present invention is characterized in that an insulating substrate is used as a substrate for supporting the conductive thin film.

【0012】さらに、本発明の熱処理方法は、導電性薄
膜としてイオンドーピング処理を施した半導体膜を用い
ることを特徴とする。あるいは、本発明の熱処理方法
は、半導体膜としてa−Si薄膜を用い、a−Si薄膜
のp−Si化に用いることを特徴とする。そして、本発
明の熱処理方法は、絶縁基板としてガラス基板を用いる
ことを特徴とする。
Further, the heat treatment method of the present invention is characterized in that a semiconductor film subjected to ion doping is used as the conductive thin film. Alternatively, the heat treatment method of the present invention is characterized in that an a-Si thin film is used as a semiconductor film and the a-Si thin film is used for p-Si conversion. The heat treatment method of the present invention is characterized in that a glass substrate is used as an insulating substrate.

【0013】本発明の熱処理方法は、電磁誘導による導
電性薄膜の加熱を用いているが、外部から印加される交
流磁場Hと交流磁場によって発生する誘導電流が導電性
薄膜に侵入する深さδと侵入した誘導電流によって発生
する発熱量Pとの間に以下の関係が成立する。 δ=√2/m=√2/√(ω・μrμ0/ρ) =√(2ρ)/√(2πf・μr・4π×10-7)[m] =√102 ρ/{2π√(10-7f・μr)[cm] =(1/2π)・(1/√10-9)・√{ρ/(f・μr)}[cm] =1.59×102√{ρ/(f・μr)}[cm] ただし、ρは導電性薄膜の比抵抗[Ωcm]、fは交流
磁場の周波数[Hz]、μrは導電性薄膜の比透磁率
[−]である。
Although the heat treatment method of the present invention uses heating of the conductive thin film by electromagnetic induction, an externally applied alternating magnetic field H and a depth δ at which an induced current generated by the alternating magnetic field penetrates the conductive thin film. And the heat generation amount P generated by the inductive current that has entered, the following relationship is established. δ = √2 / m = √2 / √ (ω · μrμ0 / ρ) = √ (2ρ) / √ (2πf · μr · 4π × 10 -7 ) [m] = {10 2 ρ / {2π} (10 −7 f · μr) [cm] = (1 / 2π) · (1 / √10 −9 ) · {ρ / (f · μr)} [cm] = 1.59 × 10 2 √ {ρ / ( f · μr)} [cm] where ρ is the specific resistance [Ωcm] of the conductive thin film, f is the frequency [Hz] of the alternating magnetic field, and μr is the relative magnetic permeability [−] of the conductive thin film.

【0014】例えば、Fe96−Si4(wt%)の珪
素鋼の場合、常温においての比抵抗率ρ=60×10-6
Ωcm、交流磁場の周波数50Hz、比透磁率μr=7
000から、 深さδは、δ=1.59×102・√{60×10-6/(50×7000)} =0.0658cmとなる。
For example, in the case of Fe96-Si4 (wt%) silicon steel, the resistivity ρ = 60 × 10 -6 at room temperature.
Ωcm, AC magnetic field frequency 50 Hz, relative permeability μr = 7
From 000, the depth δ is δ = 1.59 × 10 2 · {60 × 10 −6 /(50×7000)}=0.0658 cm.

【0015】また、発熱量Pは以下の式で表される。 P=f(a/δ)・H2・(ρ/δ)[W・cm-2] ただし、aは導電性薄膜の厚さ[cm]、Hは磁場の強
さ[V/cm]、f(a/δ)はa/δが大きくなると
1に収束し、a/δが0に近付くと0になる関数であ
る。
The heating value P is represented by the following equation. P = f (a / δ) · H 2 · (ρ / δ) [W · cm −2 ] where a is the thickness of the conductive thin film [cm], H is the strength of the magnetic field [V / cm], f (a / δ) is a function that converges to 1 as a / δ increases and becomes 0 as a / δ approaches 0.

【0016】f(a/δ)=((sinh(a/δ)−
sin(a/δ))/(cosh(a/δ)+cos
(a/δ))+j(sinh(a/δ)+sin(a/
δ))/(cosh(a/δ)+cos(a/δ))) 上の式から見ると抵抗率ρと発熱量Pとの関係は不明で
あるが、磁場によって導電性薄膜中の自由電子が磁力線
回りに束縛されることが前提であるから加熱される対象
物は半導体以上の導電性を持っていることが必要であ
る。
F (a / δ) = ((sinh (a / δ)-
sin (a / δ)) / (cosh (a / δ) + cos
(A / δ)) + j (sinh (a / δ) + sin (a /
δ)) / (cosh (a / δ) + cos (a / δ))) From the above equation, the relationship between the resistivity ρ and the calorific value P is unknown, but free electrons in the conductive thin film are affected by the magnetic field. The object to be heated needs to have conductivity higher than that of a semiconductor because it is assumed that the object is bound around the line of magnetic force.

【0017】定量的には、a−Siのように比透磁率が
1に近くても、比抵抗が1010Ωcm以下であることが
望ましい。このように、常圧下で導電性薄膜を貫く交流
磁場に、自由電子が巻きつく際に発生する熱量によって
導電性薄膜が加熱される。また、絶縁基板に自由電子は
無いので、導電性薄膜だけが交流磁場により加熱され
る。
Quantitatively, even if the relative magnetic permeability is close to 1 as in a-Si, the specific resistance is desirably 10 10 Ωcm or less. As described above, the conductive thin film is heated by the amount of heat generated when free electrons are wound around the AC magnetic field penetrating the conductive thin film under normal pressure. Also, since there are no free electrons on the insulating substrate, only the conductive thin film is heated by the AC magnetic field.

【0018】さらに、イオンにより非晶質化された導電
性薄膜が誘導加熱されるので、イオンの偏析が少なく、
誘導加熱後の導電性薄膜の抵抗が小さくなる。あるい
は、抵抗の低いp−Si(多結晶シリコン)の代わり
に、より結晶性の低いa−Si(非晶質シリコン)を使
うことで加熱時の結晶成長が等方性になる。
Further, since the conductive thin film made amorphous by the ions is induction-heated, segregation of the ions is small,
The resistance of the conductive thin film after the induction heating is reduced. Alternatively, by using a-Si (amorphous silicon) having lower crystallinity instead of p-Si (polycrystalline silicon) having low resistance, crystal growth during heating becomes isotropic.

【0019】そして、ガラス基板を用いることで、安価
でかつ加熱されない支持体が用いられる。以上のような
構成によれば、導電性薄膜に悪影響を及ぼすことなく、
短時間かつ低コストで、再現性良く導電性薄膜が熱処理
される。
By using a glass substrate, an inexpensive support that is not heated can be used. According to the above configuration, without adversely affecting the conductive thin film,
The conductive thin film is heat-treated in a short time and at low cost with good reproducibility.

【0020】[0020]

【発明の実施の形態】本発明の実施形態を図1乃至図7
に基づいて説明する。図1は交流磁場を用いた導電性薄
膜の熱処理方法の原理図である。図1において、1は液
晶表示装置に用いられる薄膜トランジスタの動作層とな
るa−Si製の導電性薄膜、15は導電性薄膜1に印加
される交流磁場、16は交流磁場に巻きつく自由電子に
よって生じる誘導電流、17は比抵抗が1014Ω・cm
以上の絶縁性の高いガラス製の絶縁基板である。
1 to 7 show an embodiment of the present invention.
It will be described based on. FIG. 1 is a principle diagram of a heat treatment method for a conductive thin film using an alternating magnetic field. In FIG. 1, reference numeral 1 denotes an a-Si conductive thin film serving as an operation layer of a thin film transistor used in a liquid crystal display device, 15 denotes an AC magnetic field applied to the conductive thin film 1, and 16 denotes a free electron wound around the AC magnetic field. The induced current that is generated, 17 has a specific resistance of 10 14 Ω · cm
This is a glass insulating substrate having high insulating properties.

【0021】a−Siはオフ時の比抵抗1010Ωcm、
オン時の比抵抗50Ωcmの半導体である(野々村修
一:応用物理 vol64,p1013,(1995
年))。図1に図示するように、周波数f=1〜100
0[Hz]、磁場の強さH=1[V/cm]の交流磁場
15を比透磁率が1でオフ時の比抵抗1010Ωcmのa
−Si製の導電性薄膜1に印加すると、導電性薄膜1中
に誘導電流16が発生する。
A-Si has a specific resistance of 10 10 Ωcm when off,
It is a semiconductor with a specific resistance of 50 Ωcm when turned on (Shuichi Nonomura: Applied Physics vol 64, p1013, (1995)
Year)). As shown in FIG. 1, the frequency f = 1 to 100
An alternating magnetic field 15 of 0 [Hz] and a magnetic field strength of H = 1 [V / cm] has a relative permeability of 1 and a specific resistance of 10 10 Ωcm when off.
When applied to the conductive thin film 1 made of -Si, an induced current 16 is generated in the conductive thin film 1.

【0022】一方、絶縁基板17には、自由電子が無い
ため、誘導電流が発生しない。このため、比抵抗1010
Ωcm以下でかつ自由電子を含む導電性薄膜だけが、交
流磁場によって、選択的に加熱される。従って、絶縁基
板に石英と比べて安価で低融点のガラス基板を用いるこ
とができる。
On the other hand, since the insulating substrate 17 has no free electrons, no induced current is generated. Therefore, the specific resistance 10 10
Only conductive thin films of less than Ωcm and containing free electrons are selectively heated by the alternating magnetic field. Therefore, a glass substrate having a lower melting point and a lower melting point than quartz can be used as the insulating substrate.

【0023】先のa−Siの場合、交流磁場の周波数f
=1[Hz]で、誘導電流が表面から侵入する深さδと
発熱量Pはそれぞれδ=5.03×107[cm]、P
=1.95×10-9[W・cm-2]となる。同様に磁場
の周波数を上げると、交流磁場の周波数f=1000
[Hz]で、深さδと発熱量Pはそれぞれδ=5.03
×105[cm]、P=1.95×10-7[W・c
-2]となる。
In the case of a-Si, the frequency f of the alternating magnetic field is
= 1 [Hz], the depth δ at which the induced current penetrates from the surface and the calorific value P are δ = 5.03 × 10 7 [cm], P
= 1.95 × 10 −9 [W · cm −2 ]. Similarly, when the frequency of the magnetic field is increased, the frequency f of the AC magnetic field f = 1000
In [Hz], the depth δ and the calorific value P are δ = 5.03, respectively.
× 10 5 [cm], P = 1.95 × 10 −7 [W · c]
m -2 ].

【0024】上の数値から、a−Si製の半導体素子
は、鉄の0.066cmの深さに比べて、1×105
mの深さとなって交流磁場の貫通が容易であり、交流磁
場の周波数を1Hzから1000Hzに大きくすると1
-9W・cm-2から10-7W・cm-2へと発熱量が大き
くなる一方、侵入する深さが107cmから105cmへ
とやや小さくなるが半導体回路の加熱に支障が無いこと
が分かる。
From the above values, the semiconductor element made of a-Si is 1 × 10 5 c smaller than the depth of 0.066 cm of iron.
m and the penetration of the AC magnetic field is easy, and when the frequency of the AC magnetic field is increased from 1 Hz to 1000 Hz, 1
The heating value increases from 0 -9 W · cm -2 to 10 -7 W · cm -2 , while the penetration depth decreases slightly from 10 7 cm to 10 5 cm, but hinders the heating of the semiconductor circuit. It turns out that there is no.

【0025】一般に誘導加熱に用いられる鉄(Fe)と
交流磁場の相互作用は非常に強く、交流磁場の周波数を
上げると表面だけが加熱される表皮効果が生じて複数層
を処理することは困難であるが、本実施形態のように比
透磁率が1に近く、比抵抗1010Ωcm以下の半導体で
は複数層をたやすく処理することができる。図2は上下
に導電性薄膜が重なった基板の斜視図である。
In general, the interaction between iron (Fe) used for induction heating and an alternating magnetic field is very strong. When the frequency of the alternating magnetic field is increased, a skin effect in which only the surface is heated occurs, and it is difficult to treat a plurality of layers. However, as in the present embodiment, a semiconductor having a relative magnetic permeability close to 1 and a specific resistance of 10 10 Ωcm or less can easily process a plurality of layers. FIG. 2 is a perspective view of a substrate on which a conductive thin film is overlapped.

【0026】図2に示すように、厚さ1mmのホウ珪酸
ガラス製の絶縁基板17の全面を厚さ1000Åの結晶
性に乏しいa−Si18が覆っており、a−Siの一部
を覆うように厚さ1000Åの酸化シリコン製の絶縁膜
19が形成されている。また、図2で、n+a−Si2
0は、Pなどのn型不純物をa−Siに1020cm-3
度ドープしたアモルファスシリコンである。
As shown in FIG. 2, an insulating substrate 17 made of borosilicate glass having a thickness of 1 mm is covered with a-Si 18 having a thickness of 1000 ° and having poor crystallinity, and a portion of the a-Si is covered. An insulating film 19 made of silicon oxide and having a thickness of 1000 ° is formed. In FIG. 2, n + a-Si2
Numeral 0 denotes amorphous silicon obtained by doping n-type impurities such as P into a-Si by about 10 20 cm −3 .

【0027】先の絶縁膜上に、厚さ1000Åの複数の
+a−Si20が点在している。図2のa−Si18
は、プラズマCVD等により成膜されたシリコン膜を質
量分離せずにシラン(SiHx(0≦x≦4))のイオ
ン流を注入するいわゆるイオンドーピング処理によって
成膜後に比べて一層、非晶質化したものである。一方、
+a−Si20は、成膜されたシリコン膜をホスフィ
ン(PHx(0≦x≦3))のイオンドーピングによっ
て膜中のイオン濃度と非晶質性を高めたものである。
A plurality of n + a-Si 20 having a thickness of 1000 ° are scattered on the insulating film. A-Si18 of FIG.
Is more amorphous than that of a silicon film formed by plasma CVD or the like by a so-called ion doping process in which an ion flow of silane (SiHx (0 ≦ x ≦ 4)) is injected without mass separation of the silicon film. It is a thing. on the other hand,
The n + a-Si 20 is obtained by increasing the ion concentration and amorphousness of the formed silicon film by ion doping of phosphine (PHx (0 ≦ x ≦ 3)).

【0028】図2の積層膜構成に対して周波数1000
Hz、磁場の強さ1V/cmの交流磁場15を印加して
誘導加熱する。この場合、比抵抗1010Ωcmのa−S
i18と比抵抗10Ωcmのn+a−Si20の誘導電
流が導電性薄膜へ侵入する深さδは、それぞれ5.03
×10 5cm、1.59×101cmと異なるが、交流磁
場の透過性に問題は発生せず、a−Si18及びn+
−Si20は同等の磁場が印加される。
The frequency of 1000 for the laminated film configuration of FIG.
Hz, an alternating magnetic field 15 of 1 V / cm of magnetic field strength is applied.
Induction heating. In this case, the specific resistance 10TenΩcm a-S
i18 and n of specific resistance 10Ωcm+Induction of a-Si20
The depth δ at which the flow enters the conductive thin film is 5.03, respectively.
× 10 Fivecm, 1.59 × 101cm, but AC magnetic
There was no problem with the field permeability, and a-Si18 and n+a
An equivalent magnetic field is applied to -Si20.

【0029】抵抗値の大きな差に係わらず、発熱量は、
a−Si18とn+a−Si20について、それぞれ、
1.95×10-7Wcm-2、1.94×10-7Wcm-2
と自由電子の数が変わらないと仮定すると同等になる。
実際は、下地となる絶縁基板と導電性薄膜の間に置かれ
た絶縁膜が加熱されないで、n+a−Si20がa−S
i18より早く加熱される。
Regardless of the large difference in the resistance value, the heat value is
For a-Si18 and n + a-Si20,
1.95 × 10 −7 Wcm −2 , 1.94 × 10 −7 Wcm −2
Assuming that the number of free electrons does not change.
Actually, the insulating film placed between the insulating substrate as the base and the conductive thin film is not heated, and the n + a-Si 20
Heats faster than i18.

【0030】従来の熱処理方法と異なる点は、n+a−
Si20と重なった部分のa−Si18が、表面からの
距離や何層目に有るかによらず、他の部分のa−Siと
同様に加熱されることである。図2の熱処理方法は平坦
な膜に対しての加熱であったが、膜は必ずしも平坦であ
る必要は無い。
The difference from the conventional heat treatment method is that n + a-
That is, the a-Si 18 in the portion overlapping with the Si 20 is heated in the same manner as the a-Si in the other portion, regardless of the distance from the surface or the number of layers. Although the heat treatment method in FIG. 2 is for heating a flat film, the film need not necessarily be flat.

【0031】図3は段差部に導電性薄膜が重なった基板
の斜視図である。図3に示すように、ガラス製の絶縁基
板17上にわずかにn型の、a−Si18が積層されて
いる。a−Si18上にダイオードを形成するようにボ
ラン(BHx(0≦x≦3))のイオンドーピングによ
ってp+a−Si21が、また、プラズマCVDにより
酸化シリコン製の絶縁膜19が作製されている。
FIG. 3 is a perspective view of a substrate in which a conductive thin film overlaps a step. As shown in FIG. 3, a slightly n-type a-Si 18 is laminated on an insulating substrate 17 made of glass. The p + a-Si 21 is formed by ion doping of borane (BHx (0 ≦ x ≦ 3)) so as to form a diode on the a-Si 18, and the insulating film 19 made of silicon oxide is formed by plasma CVD. .

【0032】絶縁膜19上の平面及びa−Siとの段差
部には、n+a−Si20が堆積されている。図3の構
成の基板に交流磁場15を印加すると、半導体への交流
磁場の侵入する深さが大きく、比抵抗への発熱量に依存
性が少ない状態で、平坦部と段差部との立体的差、およ
びp型とn型の導電型の差異に無関係に加熱される。
An n + a-Si 20 is deposited on the flat surface of the insulating film 19 and on the step between the a-Si. When the AC magnetic field 15 is applied to the substrate having the configuration shown in FIG. 3, the depth at which the AC magnetic field penetrates into the semiconductor is large, and there is little dependence on the amount of heat generated in the specific resistance. Heating is independent of the difference and the difference between the p-type and n-type conductivity.

【0033】このため、本実施形態の熱処理方法は一度
にp型及びn型の半導体膜を含む例えば、CMOSの加
熱ができ、半導体装置の工程時間を短くすることができ
る。図4はフラッシュメモリを交流磁場により熱処理す
る工程図である。図4aに示すように、絶縁基板17上
のa−Si製の導電性薄膜1の表面にイオンドーピング
によって注入膜8が形成されている。
For this reason, the heat treatment method of the present embodiment can heat, for example, a CMOS including p-type and n-type semiconductor films at a time, and can shorten the process time of the semiconductor device. FIG. 4 is a process diagram of heat-treating the flash memory with an AC magnetic field. As shown in FIG. 4A, an implanted film 8 is formed on the surface of the a-Si conductive thin film 1 on the insulating substrate 17 by ion doping.

【0034】また、注入膜8が形成されていない導電性
薄膜1上に、順番に下絶縁膜3、高抵抗膜6、注入膜
8、上絶縁膜5、高抵抗膜6、注入膜8が積層してい
る。従来、注入膜は、注入毎にアニールしていたが、本
実施形態では、同時にアニールできるので注入後の2層
構成のままである。導電性薄膜1上を絶縁膜で覆った
後、コンタクトホールを形成し、最上層に導電性薄膜1
に接続される高抵抗膜6を積層する。
The lower insulating film 3, the high resistance film 6, the injection film 8, the upper insulating film 5, the high resistance film 6, and the injection film 8 are sequentially formed on the conductive thin film 1 on which the injection film 8 is not formed. Laminated. Conventionally, the implanted film is annealed for each implantation. However, in the present embodiment, the two-layer structure after the implantation remains as it can be annealed simultaneously. After covering the conductive thin film 1 with an insulating film, a contact hole is formed, and the conductive thin film 1 is formed on the uppermost layer.
The high resistance film 6 to be connected is laminated.

【0035】最上層の高抵抗膜6に多様なイオン形態か
らなるイオン7をイオンドーピングする。すると、図4
bに示すように最上層の高抵抗膜6の表面に注入膜8が
形成される。この状態の半導体素子に交流磁場15を印
加する。
The uppermost high resistance film 6 is ion-doped with ions 7 having various ion forms. Then, FIG.
An injection film 8 is formed on the surface of the uppermost high resistance film 6 as shown in FIG. An AC magnetic field 15 is applied to the semiconductor element in this state.

【0036】交流磁場の印加によって、図4cに示すよ
うに半導体素子の表面側から副ビット線12、制御ゲー
ト10、浮遊ゲート4、低抵抗膜11が一度に形成され
る。尚、導電性薄膜1の下地が絶縁基板17の場合、素
子間の分離が良くなるので局所酸化膜2は必ずしも必要
ない。図5は、交流磁場を用いた導電性薄膜の熱処理方
法を適用した場合の液晶表示装置の製造工程図である。
By applying an AC magnetic field, the sub-bit line 12, the control gate 10, the floating gate 4, and the low resistance film 11 are formed at one time from the front side of the semiconductor element as shown in FIG. 4c. In the case where the base of the conductive thin film 1 is the insulating substrate 17, the local oxide film 2 is not necessarily required because the separation between the elements is improved. FIG. 5 is a manufacturing process diagram of a liquid crystal display device when a heat treatment method for a conductive thin film using an AC magnetic field is applied.

【0037】図5aに示すように、ガラス基板等の透明
な絶縁基板17上の中央部に、多数の点在するa−Si
18と、また、絶縁基板17上の周辺部に、互いに長軸
が直交するa−Si18とが形成されている。さらに、
同図aで、周辺部のa−Si18上に絶縁膜を隔てて、
a−Siにイオンドーピングによりイオンを注入した多
数の注入膜8が作製されている。
As shown in FIG. 5A, a central portion of a transparent insulating substrate 17 such as a glass substrate is provided with a large number of a-Si
18 and a-Si 18 whose major axes are orthogonal to each other are formed in the peripheral portion on the insulating substrate 17. further,
In FIG. 3A, an insulating film is provided on the peripheral a-Si 18 with an insulating film interposed therebetween.
A large number of implanted films 8 are produced by implanting ions into a-Si by ion doping.

【0038】また、絶縁基板の周辺部のa−Si18か
ら横方向に境界の段差を経て、絶縁基板の中央部のa−
Si18上に絶縁膜を介して重畳するように細長い注入
膜22が形成されている。このような構成の基板に、基
板に垂直な方向から交流磁場を印加する。すると、図5
bに示すように、交流磁場により、a−Siは加熱され
て相対的に移動度の高い多結晶Si23となる一方、注
入膜は、内部に含まれるイオンが活性化されて、低抵抗
膜11となる。
Further, a-Si 18 at the center of the insulating substrate passes through a step at the boundary from the a-Si 18 at the periphery of the insulating substrate.
An elongated injection film 22 is formed on Si 18 so as to overlap with an insulating film therebetween. An AC magnetic field is applied to a substrate having such a configuration from a direction perpendicular to the substrate. Then, FIG.
As shown in b, a-Si is heated by the AC magnetic field to become polycrystalline Si23 having relatively high mobility, while the ions contained therein are activated and the low-resistance film 11 is activated. Becomes

【0039】そして、同時に絶縁基板の中央部に点在す
るa−Si膜上に重畳する細長い注入膜は加熱されて、
薄膜トランジスタのオンオフを制御するゲート線24と
なる。続いて、図5cに図示するように、ゲート線と接
触しないように層間絶縁膜を設けた後、Al製の配線2
5と透明なITO製の表示電極26を設ければ液晶表示
装置のTFT基板が作製される。
At the same time, the elongated injection film overlapping the a-Si film scattered in the center of the insulating substrate is heated,
The gate line 24 controls on / off of the thin film transistor. Subsequently, as shown in FIG. 5C, after an interlayer insulating film is provided so as not to contact the gate line, the wiring 2 made of Al
5 and a transparent ITO display electrode 26, a TFT substrate of a liquid crystal display device is manufactured.

【0040】通常は、さらにポリイミド製の配向膜に堆
積した後、液晶を対向基板とTFT基板との間に封入す
れば液晶表示装置が完成する。図6は導電性薄膜への交
流磁場の掛け方を示した断面図である。図6に示すよう
に、図の左から右に移動する導電性薄膜1を載せた絶縁
基板17に対して上下方向から交流磁場15が通ってい
く。
Usually, a liquid crystal display device is completed by further depositing a liquid crystal on an alignment film made of polyimide and then sealing the liquid crystal between the counter substrate and the TFT substrate. FIG. 6 is a cross-sectional view showing how to apply an alternating magnetic field to the conductive thin film. As shown in FIG. 6, an AC magnetic field 15 passes from above and below to an insulating substrate 17 on which the conductive thin film 1 that moves from left to right in the figure is placed.

【0041】交流磁場は、コイル27中を流れる電流の
方向を周期的に逆方向にすることで発生させる。コイル
27間に発生した磁力線は、比透磁率の高い鉄族の化合
物の板を積層した積層鉄心28内を主として通過してい
く。このように、導電性薄膜の平面に垂直に磁束を通す
方式を一般に横軸磁束方式(Transverse f
lux heating)という。
The alternating magnetic field is generated by periodically reversing the direction of the current flowing through the coil 27. Lines of magnetic force generated between the coils 27 mainly pass through a laminated core 28 in which plates of an iron group compound having a high relative magnetic permeability are laminated. As described above, a method of passing a magnetic flux perpendicularly to the plane of the conductive thin film is generally called a horizontal axis magnetic flux method (Transverse f.
lux heating).

【0042】a−Siやp−Siは可視光部に吸収波長
を持ち、光により自由電子が増える性質があるので、対
向する積層鉄心の表面を鏡面加工して側面から導電性薄
膜に光を照射する方がより望ましい。図7に交流磁場を
用いた熱処理方法の時間と場所とに対する特性図を示
す。図7に図示するように、本実施形態によれば、従来
例におけるランプアニールの高速性とレーザアニールの
選択性とを共に兼ね備えた熱処理が可能になる。
Since a-Si and p-Si have an absorption wavelength in the visible light region and have a property that free electrons increase due to light, the surface of the opposed laminated iron core is mirror-finished and light is transmitted from the side surface to the conductive thin film. Irradiation is more desirable. FIG. 7 shows a characteristic diagram with respect to time and place of the heat treatment method using an AC magnetic field. As shown in FIG. 7, according to the present embodiment, it is possible to perform a heat treatment having both the high speed of the lamp annealing and the selectivity of the laser annealing in the conventional example.

【0043】[0043]

【発明の効果】以上に説明したように、交流磁場で導電
性薄膜を加熱する熱処理方法によれば、汚染や溶融によ
る変形など導電性薄膜に悪影響を及ぼすことなく、短時
間かつ低コストで、再現性良く処理できる。また、交流
磁場中に導電性薄膜を支持する基板として絶縁基板を用
いるから、絶縁基板が加熱されず、低融点の材料を用い
ることができる。
As described above, according to the heat treatment method of heating a conductive thin film with an AC magnetic field, the conductive thin film is not adversely affected by contamination or melting due to melting. Processing can be performed with good reproducibility. Further, since an insulating substrate is used as a substrate for supporting the conductive thin film in an AC magnetic field, the insulating substrate is not heated, and a material having a low melting point can be used.

【0044】さらに、導電性薄膜としてイオンドーピン
グ処理を施したSi薄膜を用いるから、質量の相違によ
る様々の注入深さにより表面から深いところまで薄膜の
結晶性が失われ結晶粒界が消失して、結晶粒界への不純
物の偏析が進まず、加えて色々なエネルギー準位の不純
物が存在し、単結晶の場合に比較してエネルギーギャッ
プが小さくなる場合が生じるので、不純物の活性化が容
易にできる。
Furthermore, since the Si thin film subjected to the ion doping treatment is used as the conductive thin film, the crystallinity of the thin film is lost from the surface to a deep portion due to various implantation depths due to the difference in mass, and the crystal grain boundaries are lost. In addition, the segregation of impurities at the crystal grain boundaries does not progress, and in addition, impurities of various energy levels are present, and the energy gap may be smaller than that in the case of a single crystal. Can be.

【0045】そして、Si薄膜としてa−Si薄膜を用
い、a−Si薄膜のp−Si化に用いるから、結晶性に
乏しく特定方向への結晶成長が発達しないので、より平
坦な固層成長ができる。それから、絶縁基板としてガラ
ス基板を用いるから、安価な材料を用いることができ
る。
Since the a-Si thin film is used as the Si thin film and is used for converting the a-Si thin film into p-Si, the crystallinity is poor and the crystal growth in a specific direction does not develop. it can. In addition, since a glass substrate is used as the insulating substrate, an inexpensive material can be used.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の交流磁場を用いた導電性薄膜の熱処理
方法の斜視図である。
FIG. 1 is a perspective view of a method for heat-treating a conductive thin film using an alternating magnetic field according to the present invention.

【図2】本発明の交流磁場を用いた積層した導電性薄膜
の熱処理方法の斜視図である。
FIG. 2 is a perspective view of a heat treatment method for a laminated conductive thin film using an alternating magnetic field according to the present invention.

【図3】本発明の交流磁場を用いた屈曲した導電性薄膜
の熱処理方法の斜視図である。
FIG. 3 is a perspective view of a method for heat-treating a bent conductive thin film using an alternating magnetic field according to the present invention.

【図4】本発明の交流磁場を用いたフラッシュメモリの
加熱工程図である。
FIG. 4 is a view showing a heating process of a flash memory using an AC magnetic field according to the present invention.

【図5】本発明の交流磁場を用いた液晶表示装置の加熱
工程図である。
FIG. 5 is a view showing a heating process of a liquid crystal display device using an AC magnetic field according to the present invention.

【図6】本発明の交流磁場を発生させる装置断面図であ
る。
FIG. 6 is a sectional view of an apparatus for generating an alternating magnetic field according to the present invention.

【図7】本発明の交流磁場を用いた熱処理方法の特徴図
である。
FIG. 7 is a characteristic view of a heat treatment method using an alternating magnetic field according to the present invention.

【図8】従来の熱処理方法によるフラッシュメモリの加
熱工程図である。
FIG. 8 is a view showing a heating process of a flash memory by a conventional heat treatment method.

【符号の説明】[Explanation of symbols]

1 導電性薄膜 2 局所酸化膜 3 下絶縁膜 4 浮遊ゲート 5 上絶縁膜 6 高抵抗膜 7 イオン 8 注入膜 9 光 10 制御ゲート 11 低抵抗膜 12 副ビット線 13 ワード線 14 主ビット線 15 交流磁場 16 誘導電流 17 絶縁基板 18 a−Si 19 絶縁膜 20 n+a−Si 21 p+a−Si 22 細長い注入膜 23 多結晶Si 24 ゲート線 25 配線 26 表示電極 27 コイル 28 積層鉄心 δ 深さ a 厚さ ρ 比抵抗 μr 比透磁率 H 磁場の強さ f 周波数DESCRIPTION OF SYMBOLS 1 Conductive thin film 2 Local oxide film 3 Lower insulating film 4 Floating gate 5 Upper insulating film 6 High resistance film 7 Ion 8 Injection film 9 Light 10 Control gate 11 Low resistance film 12 Sub bit line 13 Word line 14 Main bit line 15 AC Magnetic field 16 Induction current 17 Insulating substrate 18 a-Si 19 Insulating film 20 n + a-Si 21 p + a-Si 22 Slender injection film 23 Polycrystalline Si 24 Gate line 25 Wiring 26 Display electrode 27 Coil 28 Laminated core δ Depth a Thickness ρ Resistivity μr Relative permeability H Magnetic field strength f Frequency

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 29/792 H01L 29/78 627F 29/786 21/336 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 6 Identification number Agency reference number FI Technical indication location H01L 29/792 H01L 29/78 627F 29/786 21/336

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 交流磁場を印加することにより導電性薄
膜を加熱することを特徴とする熱処理方法。
1. A heat treatment method comprising heating an electroconductive thin film by applying an alternating magnetic field.
【請求項2】 導電性薄膜を支持する基板として絶縁基
板を用いることを特徴とする請求項1記載の熱処理方
法。
2. The heat treatment method according to claim 1, wherein an insulating substrate is used as a substrate for supporting the conductive thin film.
【請求項3】 導電性薄膜としてイオンドーピング処理
を施した半導体膜を用いることを特徴とする請求項1記
載の熱処理方法。
3. The heat treatment method according to claim 1, wherein a semiconductor film subjected to an ion doping process is used as the conductive thin film.
【請求項4】 半導体膜としてa−Si薄膜を用い、a
−Si薄膜のp−Si化に用いることを特徴とする請求
項3記載の熱処理方法。
4. An a-Si thin film is used as a semiconductor film.
The heat treatment method according to claim 3, wherein the heat treatment method is used for p-Si conversion of a -Si thin film.
【請求項5】 絶縁基板としてガラス基板を用いること
を特徴とする請求項2記載の熱処理方法。
5. The heat treatment method according to claim 2, wherein a glass substrate is used as the insulating substrate.
JP8224117A 1996-08-26 1996-08-26 Heat-treating conductive thin film using a-c magnetic field Pending JPH1070130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8224117A JPH1070130A (en) 1996-08-26 1996-08-26 Heat-treating conductive thin film using a-c magnetic field

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8224117A JPH1070130A (en) 1996-08-26 1996-08-26 Heat-treating conductive thin film using a-c magnetic field

Publications (1)

Publication Number Publication Date
JPH1070130A true JPH1070130A (en) 1998-03-10

Family

ID=16808813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8224117A Pending JPH1070130A (en) 1996-08-26 1996-08-26 Heat-treating conductive thin film using a-c magnetic field

Country Status (1)

Country Link
JP (1) JPH1070130A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010037356A (en) * 1999-10-15 2001-05-07 서용운 Method for selective heating to conductive thin film on an insulating substrate by using of an induced current
JP2002343946A (en) * 2001-03-16 2002-11-29 Canon Inc Semiconductor film and manufacturing method thereof
WO2011108463A1 (en) * 2010-03-01 2011-09-09 東京エレクトロン株式会社 Annealing device, annealing method, and thin-film substrate manufacturing system
TWI612142B (en) * 2012-05-08 2018-01-21 應用材料股份有限公司 Apparatus for annealing substrates
KR20190075697A (en) * 2017-12-21 2019-07-01 서울과학기술대학교 산학협력단 Methods of fabricating semiconductor package

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010037356A (en) * 1999-10-15 2001-05-07 서용운 Method for selective heating to conductive thin film on an insulating substrate by using of an induced current
JP2002343946A (en) * 2001-03-16 2002-11-29 Canon Inc Semiconductor film and manufacturing method thereof
WO2011108463A1 (en) * 2010-03-01 2011-09-09 東京エレクトロン株式会社 Annealing device, annealing method, and thin-film substrate manufacturing system
TWI612142B (en) * 2012-05-08 2018-01-21 應用材料股份有限公司 Apparatus for annealing substrates
KR20190075697A (en) * 2017-12-21 2019-07-01 서울과학기술대학교 산학협력단 Methods of fabricating semiconductor package

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