JPH1063526A - Memory device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the device small in size advantageously by writing a start instruction entirely in a free area, thereby unnecessitating an address detecting circuit on a bus line. SOLUTION: A microprocessor system consisting principally of a microprocessor (CPU) 1 is so constituted that the CPU 1, a ROM 2 including a program area, a RAM 3 and an input/output interface (I/O) 5 are connected by a bus line (BUS) 4. In the memory area, a characteristic address space is provided. This address space consists of the ROM 2 and RAM 3; and a program (software and fixed data) is stored in the ROM 2, and the RAM 3 is assigned as a buffer, a work area, etc. Then the restart instruction for the program is written entirely in the free area of the ROM 2. Thus, the restart instruction is written entirely in the free area of the ROM 2 to eliminate the free area, and the possibility of illegal address access is eliminate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory device, and more particularly, to a method for preventing unauthorized address access of a memory device of a microprocessor.

[0002]

2. Description of the Related Art A computer system similar to firmware using a microprocessor is used for an automatic program control device, a communication control device, a display control device and the like of a television (radio) broadcasting station.

A microprocessor (CPU) shown in FIG.
In the case of a microprocessor system mainly composed of
The configuration is such that a CPU 1, a ROM (read only memory) 2 including a program area, a RAM (random access memory) 3, and an input / output interface (I / O) 5 are connected by a bus line (BUS) 4.

In this case, the (control) program is stored in the ROM 2
, But at least some empty areas remain.

[0005] The RAM 3 stores working data and the like as a working memory.

Since nothing is written in the free area of the ROM 2, it is meaningless to access an address corresponding to the free area, and such a situation should not occur. However, it is not unusual for a program (software) to have a bug or to access a free area address by mistake due to pulse noise even if there is no bug. Accidentally accessing this free area is called illegal address access.

[0007] If there is an illegal address access, meaningless data will be read out.
U1 will stop.

As a method for preventing this unauthorized address access, Japanese Patent Application Laid-Open Nos. 6-164885 and 4-0
Japanese Patent Publication No. 21040 proposes a method of monitoring access to an illegal address on an address bus or a bus line, and detecting and processing the illegal address access.

In FIG. 4, when an illegal address access occurs, an illegal address access signal 6 is output via the I / O 5.

[0010]

Problems to be Solved by the Invention Japanese Patent Laid-Open No. 6-16468
No. 5 or Japanese Unexamined Patent Publication No. 4-021040 each employs a method of detecting an illegal address access on a bus line, so that an address detection circuit is required and the size of the device is reduced. Had become an obstacle to the transformation.

It is an object of the present invention to provide a memory device for a microprocessor system that does not require an address detection circuit on a bus line.

[0012]

A ROM for storing a program for operating a microprocessor according to the present invention;
A memory device of the microprocessor system including an illegal address access output means for outputting as an illegal address access when the empty area of the ROM is accessed, wherein a restart instruction of the program is written in all empty areas of the ROM. And

The operation of the present invention is as follows. ROM2
By writing restart instruction (accessing the address of) data to all empty areas, empty areas are eliminated and the possibility of unauthorized address access is eliminated.

[0014]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a memory map showing a configuration of an embodiment of a memory device according to the present invention, and portions equivalent to those in FIGS. In addition, overlapping description is omitted.

In FIG. 1, a unique address space (addresses 0 to N) is provided in a memory area (device). This address space is composed of a ROM 2 and a RAM 3, and a program (software) (and fixed data) is allocated to the ROM 2, and a buffer and a work are allocated to the RAM 3.

Here, assuming that the program is stored in addresses 0 to (m-1) of the ROM area (addresses), the area from address m to address (m + n) is an empty area. That is, when the microprocessor (CPU) 1 accesses the address (m + n) from the address m corresponding to the empty area, an illegal address access is performed.

From address m to address (m + n), n
The restart 0 instructions are written in advance. As shown in FIG. 2, if there is an access from address m to address (m + n), a restart 0 instruction (in this example, jump to address α and execute the program from there) is executed. , .Alpha. Or a subsequent address, the processing program for an illegal address access is executed. At this time, an illegal address access signal 6 is output via the I / O 5. FIG.

As shown in FIG. 3, when there is an illegal address access, the instruction of restart 0 is read (step 11), jumping to address α (restart address), and outputting the illegal address access signal 6 The port is set in a register (step 12), an illegal address access signal 6 is output (step 13), and the process is terminated (step 14).
I do.

In FIG. 1, the same restart instruction is written at all addresses in the empty area.
An instruction to jump to a step on another main program in the program storage area may be written.

In FIG. 2, it has been described that when jumping to the address α (restart address), the illegal address access processing program starts running. However, in some cases, it may be possible to simply jump to one step of the main program ( An unauthorized address access processing program is not required).

[0022]

As described above, the present invention does not require an address detection circuit on a bus line by writing a restart instruction in all empty areas, and is advantageous in reducing the size of the device. .

[Brief description of the drawings]

FIG. 1 is a memory map according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a method of executing a restart instruction.

FIG. 3 is a flowchart of a program process when an illegal address is accessed.

FIG. 4 is a block diagram of a related microprocessor system of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Microprocessor 2 ROM 3 RAM 4 Bus line 5 I / O 6 Illegal address access signal

Claims (3)

[Claims] 1. A memory device for a microprocessor system, comprising: a ROM accommodating a program for operating a microprocessor; and illegal address access output means for outputting an illegal address access when an empty area of the ROM is accessed, A memory device for writing a restart instruction of the program in all empty areas of the ROM. 2. The memory device according to claim 1, wherein an illegal address access processing program is stored at an address of said ROM jumped by said restart instruction. 3. The memory device according to claim 1, wherein an address of said ROM jumped by said restart instruction is one or a plurality of steps of said program.