JPH1063357A - Constant current controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize control being equivalent to that when one timer with multiple bit numbers is used by using two timers with a small number of bits and to utilize one of them for another control. SOLUTION: The two eight-bit timers are used for generating a PWM signal. The first eight-bit timer is used so as to repeatedly counts a fixed time T1(200μs) by the resolusion of 1μs. By the repetition of counting the fixed time T1, a value obtained by subtracting a fraction being indivisible by T1 of the on-time TON of a PWM cycle Tc(5ms) and the PWM signal is counted. Then, after the counting of the on-time TON of the PWM signal by the first eight-bit timer is ended, the remaining fraction is succeedingly counted by the second eight-bit timer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current control device based on PWM control.

[0002]

2. Description of the Related Art Conventionally, as a constant current control device of this kind, there is a vehicle speed sensitive type power steering device as shown in FIG. In the figure, 1 is a vehicle speed sensor, 2 is a control unit, 3 is a transistor, 4 is a solenoid,
5 is a current detecting resistor. The control unit 2 includes a reference current calculation unit 2-1, a constant current control unit 2-2, a solenoid current detection unit 2-3, an A / D conversion unit 2-4, and a duty ratio adjustment unit 2-5. , PWM signal output unit 2-6.

In this power steering device, the detected vehicle speed from the vehicle speed sensor 1 is used as a reference current calculation unit 2-
1. Reference current (target current) according to the detected vehicle speed
Is calculated. This target current is provided as a digital value to the constant current control unit 2-2. On the other hand, the solenoid current detector 2-3 detects the current (actual current) flowing through the solenoid 4. The detected actual current is supplied to the constant current control section 2-2 as a digital value via the A / D conversion section 2-4.

The constant current control section 2-2 includes a reference current calculation section 2
The difference between the target current from -1 and the actual current from the A / D converter 2-4 is obtained, and the difference is sent to the duty ratio adjuster 2-5. The duty ratio adjustment unit 2-5 includes a constant current control unit 2-2.
The duty ratio is adjusted in accordance with the difference between the target current and the actual current, and sent to the PWM signal output unit 2-6. The PWM signal output unit 2-6 sets a pulse signal whose ON time T _ON is determined by the duty ratio from the duty ratio adjustment unit 2-5 as a PWM signal (see FIG. 5B), and converts the PWM signal into a predetermined period. (PWM cycle) Send to the base of transistor 3 at Tc. As a result, the on / off time of the transistor 3 is adjusted, and control is performed so that the actual current to the solenoid 4 matches the target current.

Here, P from the PWM signal output unit 2-6
The WM signal uses a 16-bit timer (not shown),
The PWM period Tc is made 5 ms with a resolution of 1 μs. That is, in the 16-bit timer, 0 to 2 ¹⁵ = 6
Counting up to 5536 is possible, and when the resolution is 1 μs, counting can be performed without any problem up to 5 ms = 5000 μs. Therefore, the PWM signal output unit 2-6
, Using a 16-bit timer, the PWM cycle Tc =
If 5 ms is repeatedly counted at a resolution of 1 μs, P
At the time when the counting of the WM cycle Tc starts (t shown in FIG.
The PWM signal is set to the "H" level at one point), and the PWM signal is set to the "L" level at the point of time when the T _ON time is counted (point t2 shown in FIG. 5A), as shown in FIG. Such a PWM signal can be generated.

[0006]

However, according to such a conventional power steering apparatus, the cost is increased because a 16-bit timer is used to generate a PWM signal. Note that instead of a 16-bit timer, 8
Although it is conceivable to use a bit timer, an 8-bit timer can only count from 0 to 2 ⁷ = 256. That is, when the resolution is 1 μs, the 8-bit timer can only count up to 256 μs, and the PWM cycle Tc becomes short. If the resolution is 20 μs, 20 μs × 256 = 5120 μ
s can be counted, that is, the PWM cycle T
Although c can be set to 5 ms, the resolution becomes rougher than in the case of the 16-bit timer. It is conceivable to use two 8-bit timers instead of the 16-bit timer. However, these two 8-bit timers are
If it is used like a 6-bit timer, it becomes a dedicated timer and cannot be used for other controls.

The present invention has been made to solve such a problem, and an object of the present invention is to use one timer having a large number of bits by using two timers having a small number of bits. Provided is a constant current control device capable of realizing equivalent control, that is, realizing control in which a PWM cycle is made longer and resolution is made finer, and one of which can be used for another control. It is in.

[0008]

In order to achieve such an object, the present invention provides a pulse signal (PWM) having a predetermined period.
Signal, and adjusting the on-time T _ON of the pulse signal to control the current to the load to a desired value. In the constant current control device, the first timer means and the second timer means Provided by the first timer means for a predetermined time T1.
By repeating the counting of the fixed time T1, a value excluding a fraction (division) of the pulse signal cycle (PWM cycle) Tc and the ON time T _ON of the pulse signal that is not divisible by the fixed time T1 is counted. And the ON time T _ON of the pulse signal by the first timer means.
After the end of the counting, the remaining fraction is continuously counted. According to the present invention, when the first timer means and the second timer means are, for example, 8-bit timers, the first 8-bit timer counts a fixed time T1 (200 μs), and counts the count of the fixed time T1. By the repetition, the PWM cycle Tc (5 m
s) and the value (800 μs) excluding a fraction of the _ON time T _ON (804 μs) of the PWM signal that is not divisible by T1. After the counting of the _ON time T _ON of the PWM signal by the first 8-bit timer is completed, the remaining fraction (4 μs) is continuously counted by the second 8-bit timer.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments. In this embodiment, two 8-bit timers are used to generate a PWM signal. That is, in the power steering apparatus shown in FIG. 4, one 16-bit timer is conventionally used in the PWM signal output unit 2-6, but an 8-bit timer (not shown) is used instead of the 16-bit timer. Are used. Here, the PWM signal from the PWM signal output unit 2-6 is 1 μm.
With a resolution of s, the PWM cycle Tc is set to 5 ms, and one of the two 8-bit timers can be used for other control. Hereinafter, the basic principle of the generation of the PWM signal using the two 8-bit timers will be described with reference to FIG.

The 8-bit timer can count from 0 to 2 ⁷ = 256. Therefore, the first 8-bit timer is used, and a fixed time T1 (200
μs) is counted repeatedly. The repetition of the count of the fixed time T1 causes the PWM cycle Tc (5 ms).
And a value excluding a fraction that is not divisible by T1 of the _ON time T _ON of the PWM signal. And this first 8
After the counting of the _ON time T _ON of the PWM signal by the bit timer is completed, the remaining fraction is continuously counted by the second 8-bit timer.

For example, the ON time T _ON of the PWM signal is set to 80
In the case of 4 μs, an integer value 25 (= 5 ms / 200 μs) obtained by dividing the PWM cycle Tc by T1 is α, and an integer value 4 obtained by dividing the T _ON time by T1.
(= 804 μs / 200 μs) is set in the RAM (not shown) as β, and the indivisible fraction 4 (4 μs) of the T _ON time by T1 is set in the second 8-bit timer as γ.

At the time when the counting of the PWM cycle Tc starts (point t1 shown in FIG. 1A), the PWM signal (FIG.
(D)) is set to the “H” level, and α and β are counted down every time the T1 time is counted by the first 8-bit timer (FIGS. 1 (a) and (b)). (Point t2 shown in FIG. 1B), the second 8-bit timer is set to the operating state. The second 8-bit timer counts down γ every 1 μs, and when γ becomes 0 (point t3 shown in FIG. 1C), PWM
The signal is set to “L” level. Note that the PWM signal is set to “L”.
After setting the level, the operation of the second 8-bit timer is stopped. Then, the above-described operation is repeated with the time when α becomes 0 (time t4 shown in FIG. 1A) as the time when the next PWM cycle Tc starts counting.

As can be seen from the above description, in this embodiment, by using two 8-bit timers, control equivalent to using one 16-bit timer is realized. That is, control is performed in which the PWM cycle Tc is set to 5 ms and the resolution is set to 1 μs. Also, according to this embodiment, the first 8-bit timer always counts the fixed time T1 = 200 μs, so that the first 8-bit timer can be used for other controls.
For example, when detecting the vehicle speed, it can be used as a timer for measuring the cycle of the vehicle speed pulse.

Next, a specific processing operation in the control unit 2 will be described with reference to flowcharts shown in FIGS. FIG. 2A shows a main routine. After the initial setting (step 201), the vehicle speed is detected (step 202), and a reference current (target current) corresponding to the detected vehicle speed is obtained as a digital value (step 203).

Assume that the first 8-bit timer (TIMER1) has counted up 200 μs at the point t1 in FIG. Then, a TIMER1 interrupt occurs, and A / D conversion of the solenoid current (actual current) is started (step 301 shown in FIG. 3). Then, “α ← α
−1 ”(step 302), and it is checked whether α = 0 (step 303). In this case, the previous TI
By counting down by the MER1 interrupt, this T
Since α = 1 is set at the time of the IMER1 interrupt,
In step 302, α = 0 is set. Therefore, the process proceeds to step 304 in response to YES in step 303.

In step 304, the PWM signal is set to "H" level. Then, the process proceeds to step 305, where an integer value 25 (= 5 ms / 5) obtained by dividing the PWM cycle Tc by T1.
200 μs) is set as α. Also, β = 15,
γ = 0 is set (steps 306 and 307), the cycle flag is set (step 308), and the process proceeds to step 309.

In step 309, it is checked whether the PWM signal is at "H" level. In this case, since the PWM signal has been set to the “H” level in the previous step 304, the process proceeds to step 310. In step 310, it is checked whether β = 0. In this case, β =
Since it is set to 15, the process proceeds to step 313 in response to NO in step 310 to set “β ← β−1”, and then proceeds to step 314.

At step 314, the solenoid current A /
Check the end of D conversion. A / D of solenoid current
When the conversion is completed, the A / D conversion value of the solenoid current is added to “SOLCOUNT” and a new “SOLC
OUNT ”is obtained (step 315). This allows
“SOLCOUNT” is the total value of the A / D conversion values of the solenoid current every 200 μs during the previous PWM cycle Tc.

Then, the program proceeds to a step 316, wherein it is checked whether or not the period flag is set. In this case, since the cycle flag has been set in the previous step 308, the process proceeds to step 31 in response to YES in step 316.
Proceed to 7. In step 317, the cycle flag is reset. Then, the process proceeds to step 318, where "SOLCOUN"
T ”is“ SOLSUM ”. And "SOLCO
UNT ”is set to 0 (step 319), and the A / D conversion value of the target current obtained in the previous step 203 and“ SOLS
UM ”, that is, the difference between the target current and the actual current is obtained, and the difference is set as SA (step 320).

Then, it is checked whether or not SA = 0 (step 321). If SA = 0, step 32 is immediately executed.
Then, the process proceeds to step 322 unless SA = 0.
In step 322, the magnitude of the actual current and the target current is checked. If the target current> the actual current, the process proceeds to step 323. If the target current ≦ the actual current, the process proceeds to step 324.

In step 323, the time T _SA corresponding to the difference SA between the target current and the actual current is added to the on-time T _ON of the PWM signal in the previous PWM cycle, and the PWM signal is turned on in the current PWM cycle. Time T _ON . Step 32
4, the on-time T of the PWM signal in the previous PWM cycle
The time T _SA in accordance with the difference SA between the target current and the actual current is subtracted from _ON, the ON time of the PWM signal in the current PWM period T
_Set to _ON . In step 325, the on-time T _ON of the PWM signal in the current PWM cycle is divided by T1 (= 200 μs), the resulting integer value is set as β, and the indivisible fraction is set as γ. In this case, T _ON = 804
If μs, β = 4 and γ = 4 are obtained.

When the first 8-bit timer (TIMER1) counts up the next 200 μs, step 30
In step 302 after 1, “α ← α−1” is set. In this case, since α = 25 was set in the previous step 305, α = 24. Therefore,
In response to NO in step 303, step 309 is immediately executed.
Proceed to. Then, the process proceeds to step 310 in response to YES in step 309, and proceeds to step 313 in response to NO in step 310, where "β ← β-1" is set. In this case, since β = 4 in the previous step 325, β = 4-1 = 3 in step 313.

Then, in step 314, when the A / D conversion of the solenoid current is completed, the A / D conversion value of the solenoid current is added to "SOLCOUNT" to obtain a new "SOLCOUNT". In this case, since “SOLCOUNT” is set to 0 in the previous step 319, “SOLCOUNT” obtained in step 315 is obtained.
“T” is the A / D converted value of the solenoid current in the first 200 μs during the current PWM cycle Tc. Then, the process proceeds to a step 316, wherein it is checked whether or not the period flag is set. In this case, since the cycle flag has been reset in the previous step 317, the process does not proceed to the processes after step 317, and returns to the main routine.

In the same manner, the above operation is repeated every time the first 8-bit timer counts 200 μs. Thus, every time 200 μs elapses, β is counted down in step 313. Here, when β = 0, that is, when 800 μs has elapsed from the time t1 in FIG. 1, YES in step 310
Then, the process proceeds to step 311 to start counting of the second 8-bit timer (TIMER2) (point t2 shown in FIG. 1 (c)). Then, the interruption of the second 8-bit timer is permitted (step 312), and the processing shifts to the processing after step 314.

The count of the second 8-bit timer is started, and the count defined by γ obtained in step 325 is 4
After elapse of μs, a TIMER2 interrupt is generated and P
The WM signal is set to the “L” level (step 401 shown in FIG. 2B: point t3 in FIG. 1D). And
The interruption of the second 8-bit timer is prohibited (step 402), and the counting of the second 8-bit timer is stopped (step 403).

On the other hand, the first 8-bit timer has a predetermined time T
The count of 1 is repeated, and every time 200 μs elapses, α is counted down in step 302. Here, when α = 0, that is, when 5 ms has elapsed from the time point t1 in FIG. 1, the process proceeds to step 304 in response to YES in step 303, and the PWM signal is set to the “H” level (see FIG. 1D). T4 point shown).

In the above-described embodiment, assuming that the same control as that of using one 16-bit timer is realized, the use situation in the case of using two 8-bit timers has been described. If the same technology is used, the same control as using one 32-bit timer can be realized with two 16-bit timers, and the same control as using one 8-bit timer can be realized. Can be realized by two 4-bit timers. Further, in the above-described embodiment, an example of application to a power steering device has been described. However, the present invention is not limited to the power steering device, and can be applied to various constant current control devices based on PWM control.

[0028]

As apparent from the above description, according to the present invention, when the first timer means and the second timer means are, for example, 8-bit timers, the first 8-bit timer is set to the predetermined time T1. Is counted, and this fixed time T1
, The PWM cycle and the PWM
Count the value of the ON time T _ON of the M signal excluding a fraction that is not divisible by T 1, and calculate the value of P by the first 8-bit timer.
After the counting of the ON time T _ON of the WM signal is completed, the remaining fraction is continuously counted by the second 8-bit timer, so that the same control as using one 16-bit timer can be realized. It is possible to realize a control in which the period is made longer and the resolution is made finer.
The book can be used for other controls.

[Brief description of the drawings]

FIG. 1 is a time chart for explaining a generation state of a PWM signal using two 8-bit timers in the present invention.

FIG. 2 is a flowchart (main routine, TIMER2 interrupt processing routine) for explaining a specific processing operation in a control unit.

FIG. 3 is a flowchart (TIMER1 interrupt processing routine) for describing a specific processing operation in a control unit.

FIG. 4 is a block diagram illustrating a main part of a power steering apparatus according to the related art and the present invention.

FIG. 5 is a time chart for explaining a generation state of a PWM signal using one 16-bit timer in the related art.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Vehicle speed sensor, 2 ... Control part, 3 ... Transistor, 4 ...
Solenoid, 5: Current detection resistor, 2-1: Reference current calculation unit, 2-2: Constant current control unit, 2-3: Solenoid current detection unit, 2-4: A / D conversion unit, 2-5 ... Duty ratio adjustment unit, 2-6... PWM signal output unit.

Claims (2)

[Claims] 1. A constant current control device that generates a pulse signal at a predetermined cycle and adjusts the _ON time T _ON of the pulse signal to control a current to a load to a desired value. A first timer means for counting and counting a value obtained by repeating the counting of the fixed time T1, excluding a period Tc of the pulse signal and a fraction of the _ON time T _ON of the pulse signal which is not divisible by the fixed time T1. And a second timer means for continuously counting the remaining fraction after the end of counting the _ON time T _ON of the pulse signal by the first timer means. 2. The constant current control device according to claim 1, wherein said first and second timer means are 8-bit timers.