JPH1056385A - Decoder and mpeg audio coder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an MPEG audio coder which can avoid overflow of a bit buffer. SOLUTION: The MPEG audio decoder 1 consists of the bit buffer 2, a decoding core circuit 3, an analyzing circuit 9, and a skip circuit 8. The decoding core circuit 3 is composed of an inverse quantization part 4, a band composition part 5, a PCM output part 6, and a control circuit 7. The skip circuit 8 is equipped with two nodes 8a and 8b and connections with the sides of the nodes 8a and 8b are switched under the control of the analyzing circuit 9. Then, when the connection with the side of the node 8a is made, an audio stream transferred from external equipment is transferred to the bit buffer 2 as it is. When the connection with the side of the node 8b is made, on the other hand, the audio stream from the external equipment is skipped. The analyzing circuit 9 analyzes each AAU constituting the audio stream from the external equipment and controls the skip circuit 8 according to the analytic result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a decoder and an MP.
It relates to an EG (Moving Picture Expert Group) audio decoder.

[0002]

2. Description of the Related Art The information handled by multimedia is enormous and diverse, and it is necessary to process such information at high speed in order to put multimedia into practical use. In order to process information at high speed, data compression / decompression technology is indispensable. As such data compression / decompression technology, the “MPEG” method is exemplified. This MPEG system is based on the ISO (International Organization).
for Standardization) / IEC (Intarnational Elec)
trotechnical Commission)
It is being standardized by O / IEC JTC1 / SC29 / WG11).

[0003] MPEG is composed of three parts. Part 1 “MPEG System Part” (ISO / IEC
IS 11172 Part1: Systems) defines a multiplex structure (multiplex structure) of video data and audio data and a synchronization method. Part 2 "MPE
In the "G video part" (ISO / IEC IS 11172 Part2: Video), a high-efficiency encoding method of video data and a format of the video data are specified. Part 3, "MPEG
Audio Part ”(ISO / IEC IS 11172 Part3: Audio)
Defines a high-efficiency encoding method of audio data and a format of audio data.

[0004] The video data handled by the MPEG video part relates to a moving image, and the moving image is composed of several tens (eg, 30) frames (still images, frames) per second. Video data includes a sequence (Sequence), a GOP (Group Of Pictures), a picture, a slice (Slice), and a macro block (Macrob).
lock) and blocks in the order of 6 layers.

[0005] At present, MPEG-1 and MPEG-1 are mainly used due to differences in encoding rates.
-2. In MPEG-1, a frame corresponds to a picture. In MPEG-2, a frame or a field can correspond to a picture. Two fields constitute one frame. A structure in which a frame corresponds to a picture is called a frame structure, and a structure in which a field corresponds to a picture is called a field structure.

[0006] MPEG uses a compression technique called inter-frame prediction. Inter-frame prediction compresses data between frames based on temporal correlation. In the inter-frame prediction, bidirectional prediction is performed. The bidirectional prediction is to use both forward prediction for predicting a current reproduced image from a past reproduced image (or picture) and backward prediction for predicting a current reproduced image from a future reproduced image. .

[0007] This bidirectional prediction is based on an I-picture (Intra-Pi
), a P picture (Predictive-Picture), and a B picture (Bidirectionally predictive-Picture). The I picture is generated independently of a past or future reproduced image. The P picture is generated by forward prediction (prediction from a past I picture or P picture). B pictures are generated by bidirectional prediction. In bidirectional prediction, a B picture is generated by any one of the following three predictions. Forward prediction; prediction from past I or P pictures; backward prediction; prediction from future I or P pictures, bidirectional prediction; prediction from past and future I or P pictures. Then, these I, P, and B pictures are respectively encoded. That is, an I picture is generated even if there is no past or future picture. In contrast, a P picture is not generated without a past picture, and a B picture is not generated without a past or future picture.

In the inter-frame prediction, first, an I picture is periodically generated. Next, a frame several frames ahead of the I picture is generated as a P picture. This P
The picture is generated by one-way (forward) prediction from the past to the present. Subsequently, a frame located before the I picture and after the P picture is generated as a B picture. When generating this B picture, an optimal prediction method is selected from three of forward prediction, backward prediction, and bidirectional prediction. In general, in a continuous moving image, a current image and images before and after the current image are very similar, and only a part thereof is different. Then, the previous frame (for example, I
Assuming that the picture and the next frame (for example, a P picture) are the same, if there is a change between both frames, only the difference (B picture data) is extracted and compressed.
Thus, data between frames can be compressed based on temporal correlation.

The data sequence (bit stream) of video data encoded in accordance with the MPEG video part is called an MPEG video stream.
A data string of audio data encoded in accordance with the MPEG audio part is called an MPEG audio stream. Then, the video stream and the audio stream are time-division multiplexed according to the MPEG system part, and M
It becomes a PEG system stream. System streams are also called multiplex streams.

MPEG-1 is mainly used for video CDs.
(Compact Disc), CD-ROM (CD-Read Only Memor)
y), a storage medium using a recording medium such as a DVD (Digital Video Disk).
It supports a wide range of applications including PEG-1.

[0011] MPEG audio has a layer (Layer).
) There are three modes, I, Layer II and Layer III.
The higher the layer, the higher the sound quality and the higher the compression ratio. One frame of the audio stream is AAU (Audio Ac
cess Unit). The AAU is a minimum unit that can be decoded one by one, and includes data of a fixed number of samples (384 samples for Layer I, 1152 samples for Layer II and Layer III) set for each layer.

The AAU has a header and an optional error check (CRC; Cyclic Redundancy Co.) from the beginning.
de 16 bits), followed by audio data. The data from the header to the audio data is data used for reproducing the audio signal.

The header defines a sampling frequency. The sampling frequency is a field for designating a sampling rate, and includes three types of frequencies (32 kHz
, 44.1kHz, 48kHz).

The audio data is variable-length data. If the end of the audio data does not reach the end of the AAU, the remaining part (the gap from the end of the audio data to the end of the AAU) is ancillary data (Ancillary data). Data). Any data other than MPEG audio can be inserted into the ancillary data. In MPEG-2, multi-channel and multi-lingual data are inserted into ancillary data.

The audio data of the layer I includes an allocation (Allocation) and a scale factor (Scale Fact).
or) and a sample. layer
II and layer III audio data are allocated, scale factor selection information (Scale Factor Slect
Information), scale factor, and sample.

The scale factor is a magnification at the time of reproducing the waveform of each sub-band and each channel. Each subband and channel is represented by 6 bits, and +6 to-
Up to 118 dB can be specified in about 2 dB units. Since the value of the scale factor corresponds to the sound pressure level of the sound to be reproduced, when the value of the scale factor becomes lower than a certain level, the reproduced sound becomes a sound pressure level that cannot be heard by humans (ie, no sound).

Human auditory characteristics (acoustic psychological models) used in MPEG audio include a masking effect and a minimum audible characteristic. The masking effect means that when a loud sound is generated at a certain frequency, sounds below a certain level at frequencies near the loud sound become inaudible or difficult to hear. The minimum audible characteristic is a certain frequency characteristic that the human ear is most sensitive to the human voice band of several hundred Hz, and sounds below a certain sound pressure level can not be heard in the ultra-low range or ultra-high range. It is to have. Therefore,
Combine the masking effect and the minimum audible characteristic to set a mask level that dynamically changes with the audio signal,
Data compression is performed on signals below that level. As a result, in Layer I, the encoding rate; 192k, 128kbps, compression rate;
1/4, sound quality is CD-DA (CD Digital Audio) and P
Equivalent to CM (Pulse Code Modulation), encoding rate for layer II: 128k, 96kbps, compression ratio: 1/6 to 1/8
, Sound quality is equivalent to MD and DCC, encoding rate for layer III: 128k, 96k, 64kbps, compression ratio: 1/6 to 1 /
A compression effect and sound quality such as 12 can be obtained.

In the MPEG audio encoder, first, an input audio signal is divided into 32 sub-bands using a band division filter. Next, in the quantization, by using the masking effect and the minimum audibility characteristic as described above and by not assigning bits to the masked and inaudible speech, the amount of information is reduced and data compression is performed.

FIG. 12 shows a main block circuit of a conventional MPEG audio decoder 301. The MPEG audio decoder 301 includes a bit buffer 302 and a decode core circuit 303. The decode core circuit 303 includes an inverse quantization unit 304, a band synthesis unit 30
5, a PCM output unit 306, and a control circuit 307, and decodes each AAU (frame) constituting the audio stream in accordance with the MPEG audio part.

The bit buffer 302 has a FIFO (First-
In-First-Out (RAM) Random Access Memory (RAM)
, And sequentially accumulates audio streams transferred from an external device (such as a recording medium such as a video CD or a CVD or an information device such as a personal computer).

The control circuit 307 includes a bit buffer 302
AAUs composing the audio stream stored in the AAU
Of the audio stream corresponding to one AAU is read from the bit buffer 302 based on the detection result. Also, the control circuit 307
Detects a sampling frequency specified in the header, and generates a pipeline signal which is a pulse corresponding to the sampling frequency.

The operation of each section 304 to 306 is controlled in accordance with a pipeline signal. That is, each of the units 304 to 30
The operation speed of 6 corresponds to the pipeline signal. The inverse quantization unit 304 performs inverse quantization of quantization in the encoder described above for each AAU read from the bit buffer 302.

The band combining unit 305 performs a product-sum operation by a butterfly operation on the output of the inverse quantization unit 304, and combines the data divided into 32 sub-bands into one by the encoder.

The PCM output unit 306 includes an output interface and a cross attenuator, and generates an audio signal (PCM output signal) from the output of the band synthesis unit 305.

The audio signal is D / A converted by a D / A converter (not shown), then amplified by an audio amplifier (not shown) and sent to a speaker (not shown). Then, the sound is reproduced from the speaker.

[0026]

If the bit rate of an audio stream transferred from an external device is higher than a specified value, the bit buffer 302 may overflow.

Since the bit buffer 302 is constituted by a ring buffer, if an overflow occurs, a newly input audio stream is overwritten on an audio stream already stored in the bit buffer 302. Then, the audio stream already stored in the bit buffer 302 is destroyed and lost. As a result, the audio cannot be reproduced for the lost audio stream, and the reproduced sound is interrupted, making the user hard to hear.

The case where the bit rate of the audio stream is higher than the specified value is as follows. (1) When playing audio at a higher speed than the normal (standard) playback speed. Such high-speed playback is performed, for example, when a recording medium is used as an external device, when the user performs fast-forward playback to listen to audio in a short time, or fast-forward playback or fast-forward reverse to search for the audio to be heard. Used when performing playback.

(2) When an information device is used as an external device. For recording media such as video CDs and DVDs, MPEG
The bit rate of the audio stream is set according to the audio part. However, in an information device such as a microcomputer, encoding of an audio stream is not always performed according to a standard, and the bit rate of the audio stream may be out of the standard.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a decoder and an MP which can avoid overflow of a bit buffer.
An EG audio decoder is provided.

[0031]

The gist of the present invention is to control the bit buffer so as not to overflow by eliminating unnecessary data from the data input to the bit buffer. .

According to a second aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, The gist of the present invention is that the decoding core circuit extracts only necessary data from the audio stream and transfers the extracted data to a bit buffer.

According to a third aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, An analysis circuit that analyzes each frame constituting the audio stream, and based on the analysis result of the analysis circuit, extracts only necessary data from each frame in a decode core circuit, and transfers the extracted data to a bit buffer. The gist of the invention is to provide a skip circuit for skipping the remaining data. According to a fourth aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, The gist of the invention is that the decoding core circuit has only control means for storing only necessary data in a bit buffer and transferring the data to the decoding core circuit.

According to a fifth aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, The gist of the invention is to provide a frame control means for controlling the number of frames of the audio stream transferred to the bit buffer based on the occupancy of the bit buffer.

According to a sixth aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, An occupancy determination circuit that detects the occupancy of the bit buffer and compares the occupancy with a predetermined threshold, based on the determination result of the occupancy determination circuit,
The gist of the invention is to provide frame skipping means for skipping a predetermined frame from the audio stream in frame units and transferring the remaining frames to a bit buffer.

According to a seventh aspect of the present invention, in the MPEG audio decoder according to the sixth aspect, the occupation amount is the first.
If the occupancy is greater than a first threshold, the audio stream is skipped frame-by-frame, if the occupancy is greater than the first threshold, When the occupation amount becomes smaller than the second threshold value smaller than the first threshold value, the gist is to transfer the frame from the audio stream to the bit buffer without skipping the frame. The invention according to claim 8 is
A bit buffer for storing the audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, and detecting the occupancy of the bit buffer, And an occupancy determination circuit that compares the data with a predetermined threshold. Based on the determination result of the occupancy determination circuit, a part of the data in the audio stream is stored in a bit buffer in frame units and transferred to a decode core circuit. The gist of the present invention is to provide control means for performing the above.

According to a ninth aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, The gist of the invention is to provide speed control means for controlling the operation speed of the decode core circuit based on the occupancy of the bit buffer.

According to a tenth aspect of the present invention, there is provided a bit buffer for storing an audio stream, a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, Pipeline signal generation means for generating a pipeline signal corresponding to the occupancy of the bit buffer, wherein the operation speed of the decode core circuit is controlled according to the pipeline signal generated by the pipeline signal generation means. And

According to an eleventh aspect of the present invention, there is provided a bit buffer for storing an audio stream, and a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part. Equipped, the decode core circuit,
When the value of the scale factor included in the audio data included in the frame becomes equal to or smaller than a predetermined value, the gist is to skip the frame without decoding the frame.

According to a twelfth aspect of the present invention, a bit buffer for storing an audio stream and a decode core circuit for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part are provided. Equipped, the decode core circuit,
When the occupation amount of the bit buffer is equal to or more than a predetermined value and the value of the scale factor included in the audio data included in the frame is equal to or less than the predetermined value, the gist is that the frame is skipped without decoding. I do.

The thirteenth aspect of the present invention is the second aspect of the present invention.
3. In the MPEG audio decoder according to any one of 2., the decoding core circuit performs a sub-quantization on the sub-band by performing a product-sum operation on an output of the de-quantization unit and a de-quantization unit for de-quantizing the audio stream. The gist of the present invention is to include a band synthesis unit that synthesizes an audio stream divided into a plurality of audio streams, and an output unit that generates an audio signal from an output of the band synthesis unit.

(Operation) According to the first aspect of the present invention,
By eliminating unnecessary data from data input to the bit buffer, overflow of the bit buffer is avoided.

According to the second or third aspect of the present invention, only necessary data is input to the bit buffer. Therefore, the occupancy of the bit buffer is reduced by the amount of unnecessary data not being accumulated. Therefore, even when the bit rate of the audio stream is higher than the specified value, it is possible to avoid overflow of the bit buffer. The data required in the decode core circuit is a header, an error check, and audio data.

According to the third aspect of the present invention, unnecessary data can be skipped by providing the skip means. According to the invention described in claim 5, by controlling the number of frames of the audio stream transferred to the bit buffer, it is possible to avoid overflow of the bit buffer.

According to the sixth aspect of the present invention, when the occupancy of the bit buffer becomes larger than the threshold value, a predetermined frame is skipped from the audio stream in units of frames, so that a frame input to the bit buffer is skipped. Can be reduced. Therefore, overflow of the bit buffer can be avoided.

According to the seventh aspect of the present invention, by appropriately setting the first and second thresholds, the time for transferring the audio frame to the bit buffer can be adjusted arbitrarily.

According to the ninth or tenth aspect of the present invention, the speed at which the audio stream is read from the bit buffer can be increased by increasing the operating speed of the decode core circuit. Therefore, even when the bit rate of the audio stream is higher than the specified value, overflow can be avoided by reading the audio stream from the bit buffer at a speed higher than the bit rate.

According to the tenth aspect, by controlling the pipeline signal, the operation speed of the decode core circuit can be arbitrarily set. According to the eleventh or twelfth aspect of the present invention, when the value of the scale factor included in the audio data included in a frame becomes equal to or less than a predetermined value, the frame is skipped without being decoded. Then, the operation speed of the decode core circuit is increased by an amount not to decode the frame. Therefore, even if the bit rate of the audio stream is higher than the specified value, if the audio stream is read from the bit buffer at a speed higher than the bit rate,
Overflow can be avoided.

According to the twelfth aspect of the present invention, skipping of a frame is performed based on the occupancy of a bit buffer, so that skip control of the frame can be performed more accurately.

According to the thirteenth aspect, the decode core circuit can be embodied with a simple configuration.

[0051]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) Hereinafter, a first embodiment of the present invention will be described with reference to FIG.

FIG. 1 shows a main part block circuit of the MPEG audio decoder 1 of the present embodiment. The MPEG audio decoder 1 includes a bit buffer 2, a decode core circuit 3, an analysis circuit 9, and a skip circuit 8. The circuits 2, 3, 8, and 9 are mounted on a one-chip LSI.

The decoding core circuit 3 is composed of an inverse quantization unit 4, a band synthesis unit 5, a PCM output unit 6, and a control circuit 7, and each of the A that constitutes the MPEG audio stream.
The AU (frame) is decoded according to the MPEG audio part.

As will be described later, an audio stream transferred from an external device (such as a recording medium such as a video CD or a DVD or an information device such as a personal computer) is sent to the bit buffer 2 via a skip circuit 8. .

The skip circuit 8 has two nodes 8a and 8b
And each of the nodes 8a and 8b is controlled according to the control of the analysis circuit 9.
The connection to the side is switched. Then, when connected to the node 8a side, the audio stream transferred from the external device is transferred to the bit buffer 2 as it is.
When connected to the node 8b, the audio stream transferred from the external device is skipped. As a result, the audio stream transferred to the bit buffer 2 is decimated by the amount skipped by the skip circuit 8.

The analysis circuit 9 analyzes each AAU constituting the audio stream transferred from the external device,
The skip circuit 8 is controlled based on the analysis result. That is, the analysis circuit 9 sets the nodes 8a and 8b of the skip circuit 8 so that only the data (header, error check, audio data) necessary for the decode core circuit 3 among the AAUs is transferred to the bit buffer 2. Is controlled. That is, when the data of the audio stream transferred from the external device is required, the analysis circuit 9 connects the skip circuit 8 to the node 8a side, and transfers the data to the bit buffer 2 as it is. Also, data that is not necessary in the decode core circuit 3 (for example, ancillary data and error data)
, The skip circuit 8 is connected to the node 8b side,
Skip that data.

The bit buffer 2 is a FIFO RAM
, And sequentially stores audio streams. The control circuit 7 detects a header attached to the head of each AAU constituting the audio stream stored in the bit buffer 2, and reads an audio stream for each AAU from the bit buffer 2 based on the detection result. Also, the control circuit 7
Detects the sampling frequency specified in the header,
A pipeline signal which is a pulse corresponding to the sampling frequency is generated.

The operation of each section 4 to 6 is controlled according to a pipeline signal. That is, the operation speed of each section 4 to 6 corresponds to the pipeline signal. Inverse quantization unit 4
Performs inverse quantization of the quantization in the encoder for each AAU read from the bit buffer 2.

The band synthesizing unit 5 performs a product-sum operation by a butterfly operation on the output of the inverse quantization unit 4 and synthesizes the data divided into 32 sub-bands into one by the encoder.

The PCM output unit 6 includes an output interface and a cross attenuator, and generates an audio signal (PCM output signal) from the output of the band synthesizing unit 5. As will be described later, the audio signal is D / A converted by a D / A converter, amplified by an audio amplifier, and sent to a speaker. Then, the sound is reproduced from the speaker.

As described above, according to the present embodiment, the following operations and effects can be obtained by the above configuration. By providing the analysis circuit 9 and the skip circuit 8, only the data (header, error check, audio data) necessary for the decode core circuit 3 is stored in the bit buffer 2.
Transfer to As a result, the bit buffer 2 can store only necessary data.

A conventional MPEG audio decoder 301
In this case, since the entire audio stream transferred from the external device is transferred to the bit buffer 302, the bit buffer 302 also stores unnecessary data. Therefore, especially when the bit rate of the audio stream transferred from the external device is higher than the specified value, the bit buffer 302 may overflow.

However, in this embodiment, since the bit buffer 2 stores only necessary data, the amount of data stored in the bit buffer 2 (the occupancy of the bit buffer 2)
Is reduced by the amount of unnecessary data omitted. Therefore, even if the bit rate of the audio stream transferred from the external device is higher than the specified value, it is possible to avoid overflow of the bit buffer 2.

In other words, the bit buffer 2
When there is no risk of overflowing the bit buffer 2, the bit buffer 2
Capacity can be reduced.

Since only necessary data is stored in the bit buffer 2, the control circuit 7
When the AAU is read from the memory, the number of accesses from the control circuit 7 to the bit buffer 2 can be reduced.

(Second Embodiment) Hereinafter, a second embodiment of the present invention will be described with reference to FIGS. In this embodiment, the same components as those in the first embodiment have the same reference numerals, and a detailed description thereof will be omitted.

FIG. 2 shows a main block circuit of the MPEG audio decoder 11 of the present embodiment. The MPEG audio decoder 11 includes a bit buffer 2, a decode core circuit 3, a skip circuit 8, an occupancy determination circuit 12, and an analysis circuit 13. Each of the circuits 2, 3, 8,
12 and 13 are mounted on a one-chip LSI.

The skip circuit 8 has two nodes 8a and 8b
The connection to each of the nodes 8a and 8b is switched under the control of the occupancy determination circuit 12 and the analysis circuit 13. The occupancy determination circuit 12 detects the occupancy B of the bit buffer 2 and determines whether there is a possibility of overflow.

The analysis circuit 13 analyzes each AAU constituting the audio stream transferred from the external device, and switches the nodes 8a and 8b of the skip circuit 8 so that the AAU transferred to the bit buffer 2 is not interrupted. . As a result, the audio stream transferred to the bit buffer 2 is skipped by the skip unit 8 in AAU units.

Next, the operation of this embodiment will be described with reference to FIG. When the occupation amount B is smaller than the preset threshold value TH1, the occupation amount determination circuit 12 determines that there is no possibility that the bit buffer 2 will overflow. In this case, the analysis circuit 13 connects the skip circuit 8 to the node 8a so that the AAU transferred to the bit buffer 2 is not interrupted, and transfers the audio stream transferred from the external device to the bit buffer 2 as it is. Then
The occupancy B of the bit buffer 2 increases in accordance with the bit rate of the audio stream transferred from the external device (period α in the drawing).

Next, when the occupation amount B becomes larger than the preset threshold value TH1, the occupation amount judgment circuit 12 judges that the bit buffer 2 may overflow. In this case, the analysis circuit 13 connects the skip circuit 8 to the node 8b so that the AAU transferred to the bit buffer 2 is not interrupted, and skips the audio stream transferred from the external device in AAU units. Then, the occupation amount B decreases as the AAU is read from the bit buffer 2 (period β shown).

Then, the occupancy determination circuit 12 calculates the occupancy B
Is smaller than the preset threshold TH2, it is determined that there is no possibility that the bit buffer 2 will overflow. In this case, the analysis circuit 13 connects the skip circuit 8 to the node 8a so that the AAU transferred to the bit buffer 2 is not interrupted, and transfers the audio stream transferred from the external device to the bit buffer 2 as it is ( The illustrated period α).

As described above, no AAU is input to the bit buffer 2 during the period β. Therefore, the audio signal cannot be generated for the AAU corresponding to the period β, and the time during which the audio signal is continuously generated (ie, the time during which the audio is continuously reproduced)
Corresponds to the period α. If the time during which the sound is continuously reproduced becomes too short, the reproduced sound is interrupted, and the user feels difficult to hear. Therefore, each threshold TH
1 and TH2 need to be set to optimal values by actual trial listening.

As described above, according to the present embodiment, the following operations and effects can be obtained by the above configuration. By providing the occupancy determination circuit 12 and the skip circuit 8, the occupancy B of the bit buffer 2 can be optimally controlled. Therefore, even when the bit rate of the audio stream transferred from the external device is higher than the specified value, the overflow of the bit buffer 2 can be reliably avoided.

Since the audio stream skipped from the skip circuit 8 is in AAU units, the audio stream stored in the bit buffer 2 is also in AAU units, and the decode core circuit 3 can generate an audio signal for each AAU.

Simulation of the effect of the present embodiment at the time of high-speed reproduction shows that the overflow of the bit buffer 2 can be avoided even at a high-speed reproduction of 8 × speed or higher, and that no sound interruption occurs in the reproduced sound. Was.

As shown in FIG. 4, the threshold values TH1 and TH2 may be set to the same value. In this case, since the period α is shortened, the time during which the sound is continuously reproduced is shortened, and the sound is likely to be interrupted. On the other hand, the occupancy determination circuit 12
Is simplified, the circuit scale of the occupancy determination circuit 12 can be reduced.

(Third Embodiment) Hereinafter, a third embodiment of the present invention will be described with reference to FIG. In the present embodiment, the same components as those in the first and second embodiments have the same reference numerals, and a detailed description thereof will be omitted.

FIG. 5 shows a main part block circuit of the MPEG audio decoder 21 of the present embodiment. The MPEG audio decoder 21 includes a bit buffer 2, a decode core circuit 3, and an occupancy determination circuit 12.
The circuits 2, 3, and 12 are mounted on a one-chip LSI.

The decoding core circuit 3 comprises an inverse quantization unit 4, a band synthesis unit 5, a PCM output unit 6, and a control circuit 22. The audio stream transferred from the external device is directly transferred to the bit buffer 2. The occupancy determination circuit 12 detects the occupancy B of the bit buffer 2 and determines whether there is a possibility of overflow.

The control circuit 22 detects the header attached to the head of each AAU constituting the audio stream stored in the bit buffer 2 and, based on the detection result, outputs the audio stream corresponding to one AAU from the bit buffer 2. Is read. Further, the control circuit 22 generates a pipeline signal which is a pulse based on the determination result of the occupation amount determination circuit 12. That is, the control circuit 22 shortens the generation cycle of the pipeline signal as the occupation amount B of the bit buffer 2 increases.

The operation of each section 4 to 6 is controlled in accordance with a pipeline signal. That is, the operation speed of each of the units 4 to 6 corresponds to the generation cycle of the pipeline signal. Therefore, as the occupation amount B of the bit buffer 2 increases, the generation cycle of the pipeline signal becomes shorter, and the operation speed of each unit 4 to 6 becomes faster.

The speed at which the audio stream is read from the bit buffer 2 depends on the processing speed of the decode core circuit 3 (ie, the operation speed of each of the units 4 to 6). Therefore, if the operation speed of each unit 4 to 6 is increased, the speed at which the audio stream is read from the bit buffer 2 is also increased. That is, even when the bit rate of the audio stream transferred from the external device is higher than the specified value, the overflow can be avoided by reading the audio stream from the bit buffer 2 at a speed higher than the bit rate.

As described above, according to the present embodiment, even when the bit rate of the audio stream transferred from the external device is higher than the specified value, it is possible to avoid overflow of the bit buffer 2.

In this embodiment, the decoding core circuit 3
Therefore, the bit rate of the audio signal increases as the processing speed increases. As a result, in addition to increasing the pitch (pitch) of the reproduced sound, the utterance speed (speaking speed) increases. Therefore, if the processing speed of the decode core circuit 3 is set too high, the reproduced sound will not be interrupted, but the user will still find it difficult to hear. Therefore, it is important that the generation period of the pipeline signal is not too short, and the generation period needs to be set to an optimum value by actual trial listening.

(Fourth Embodiment) Hereinafter, a fourth embodiment of the present invention will be described with reference to FIG. In this embodiment, the same components as those in the first to third embodiments have the same reference numerals, and a detailed description thereof will be omitted.

FIG. 6 shows a main block circuit of the MPEG audio decoder 31 of the present embodiment. The MPEG audio decoder 31 includes a bit buffer 2, a decode core circuit 3, and an occupancy determination circuit 12.
The circuits 2, 3, and 12 are mounted on a one-chip LSI.

The decoding core circuit 3 includes an inverse quantization unit 32,
It comprises a band synthesizing unit 5, a PCM output unit 6, and a control circuit 7. The audio stream transferred from the external device is directly transferred to the bit buffer 2.

The occupancy determining circuit 12 is provided with the bit buffer 2
Is detected, and it is determined whether or not there is a risk of overflow. The band combining unit 5 performs a product-sum operation by a butterfly operation on the output of the inverse quantization unit 32, and combines the data divided into 32 sub-bands into one by the encoder.

The inverse quantization unit 32 performs inverse quantization of the quantization in the encoder for each AAU read from the bit buffer 2. Also, the inverse quantization unit 32
Determines whether to subject the AUU to inverse quantization or skip based on the determination result of the occupancy determination circuit 12 and the scale factor included in the audio data included in the AAU.

That is, since the value of the scale factor corresponds to the sound pressure level of the sound to be reproduced, when the value of the scale factor becomes equal to or less than a predetermined value, the reproduced sound of the AUU cannot be heard by humans. (Ie silence)
become. In other words, even if a silent AUU is skipped, the audio section to be reproduced (the section where the voice exists) does not change. Therefore, by skipping the silent AUU from the inverse quantization unit 32, the band synthesizing unit 5 and the PCM output unit 6 do not need to process the AUU, and the speed at which the audio stream is read from the bit buffer 2 is reduced accordingly. Can be faster. That is, even when the bit rate of the audio stream transferred from the external device is higher than the specified value, the overflow can be avoided by reading the audio stream from the bit buffer 2 at a speed higher than the bit rate.

However, if a silent AUU is skipped, the user will feel unnatural because there is no silent section (time during which no voice exists) from the reproduced voice. Therefore, based on the determination result of the occupancy determination circuit 12, only when there is a possibility that the bit buffer 2 overflows,
Skips silent AUUs. In this way, it is possible to avoid the overflow of the bit buffer 2 while keeping the reproduced sound as natural as possible.

FIG. 8 shows a block circuit of the MPEG system decoder. The MPEG system decoder 101
Audio Video Parser (AV Parser) 102, MPE
The G video decoder 201 includes one of the above-described MPEG audio decoders 1, 11, 21, 31, and 41.

The AV parser 102 has a demultiplexer (DMUX; DeMUltipleXer) 103, and inputs the MPEG system stream transferred from the external device 104. The DMUX 103 separates the system stream into an MPEG video stream and an MPEG audio stream. The video stream is output to the video decoder 201, and the audio stream is output to the audio decoders 1, 11, 21, 31, and 41.

The video decoder 201 decodes a video stream in accordance with the MPEG video part and generates a video signal. The video signal is sent to the display 10
5 and the moving image is reproduced on the display 105.

Audio decoders 1, 11, 21, 3
1, 41 generate the audio signal as described above,
The audio signal is D / A converted by a D / A converter 106, amplified by an audio amplifier 107, and sent to a speaker 108. And the speaker 10
8 reproduces the sound.

The bit rate of the system stream transferred from the external device 104 corresponds to the reading speed. Then, the bit rates of the video stream and the audio stream become the same as those of the system stream.

Therefore, the video decoder 12 generates a video output corresponding to the bit rate of the system stream. That is, if the bit rate of the system stream is higher than during normal reproduction (during standard reproduction), the moving image is reproduced at high speed on the display 105, and if the bit rate is lower than during normal reproduction, the moving image is reproduced at low speed on the display 105.

FIG. 9 shows a main block circuit of an MPEG video decoder 201 having a high-speed reproduction function. MPE
The G video decoder 201 includes a bit buffer 202, a picture header detection circuit 203, an MPEG video decode core circuit (hereinafter abbreviated as a decode core circuit) 204, a variable threshold overflow determination circuit (hereinafter abbreviated as a determination circuit) 205, and a picture skip circuit. 206, a control core circuit 207. Each of the circuits 203 to 20
Reference numeral 7 is mounted on a one-chip LSI.

The control core circuit 207 controls each of the circuits 2 to 6. The MPEG video stream transferred from the external device is transferred to the bit buffer 202.

The bit buffer 202 has a FIFO structure of R
It is constituted by a ring buffer composed of AM, and sequentially stores the transferred video stream as it is. The picture header detection circuit 203 includes a bit buffer 202
The picture header attached to the head of each picture of the video stream stored in the picture header is detected, and the picture type (I, P, B) specified in each picture header is detected.

The control core circuit 207 reads out a video stream for an appropriate picture from the bit buffer 202 every frame period based on the detection result of the picture header detection circuit 203 and the judgment result of the judgment circuit 205 described later. The video stream read from the bit buffer 202 is stored in the bit buffer 2 even after the video stream is read.
02 as it is.

Each picture read from the bit buffer 202 is transferred to the decode core circuit 204 via the picture skip circuit 206. Decode core circuit 2
The decoder 04 decodes each picture in accordance with the MPEG video part and generates a video signal for each picture. The video signal is output to the display 105 provided outside the video decoder 201.

The picture skip circuit 206 controls each of the nodes 206a and 206b according to the control of the control core circuit 207.
The connection to the side is switched. When the picture skip circuit 206 is connected to the node 206a, the picture read from the bit buffer 202 is transferred to the decode core circuit 204 as it is. Node 2
When connected to the 06b side, the picture read from the bit buffer 202 is skipped without being transferred to the bit buffer 202. As a result, the decode core circuit 20
4 are transferred to the picture skip circuit 20.
6 is skipped in picture units by the amount skipped.

The determination circuit 205 sets a threshold value Bthn of the occupation amount Bm of the bit buffer 202 based on the reproduction speed specified from the outside, and
m and the threshold value Bthn are compared. The external reproduction speed is specified by a magnification n with respect to the normal reproduction speed. For example, at the time of 2 × speed reproduction, the magnification n = 2 and the threshold value Bthn = Bth2. During normal reproduction, the magnification n = 1, and the threshold value Bthn = Bth1.

When the occupation amount Bm of the bit buffer 202 does not exceed the threshold value Bthn, the determination circuit 205 determines that the bit buffer 202 is normal without any possibility of overflow. In this case, the control core circuit 2
07 reads a video stream for one picture from the bit buffer 202. Then, the control core circuit 207
Connects the picture skip circuit 206 to the node 206a, and causes the picture read from the bit buffer 202 to be transferred to the decode core circuit 204.

When the occupancy Bm of the bit buffer 202 exceeds the threshold value Bthn, the determination circuit 205 determines that the bit buffer 202 may overflow. In this case, the control core circuit 207 operates until the occupation amount Bm of the bit buffer 202 falls below the threshold value Bthn.
A video stream for an appropriate picture is read from the bit buffer 202. Then, the control core circuit 207
The picture skip circuit 206 is connected to the node 206b, and skips all video streams for appropriate pictures read from the bit buffer 202.

FIG. 10 shows a change in the occupation amount Bm of the bit buffer 202. Occupancy Bm of bit buffer 202
Increases with the bit rate RB as the slope of the graph. The bit rate RB is defined as shown in equation (1) according to the BR (Bit Rate) of the sequence header at the beginning of the sequence. The picture rate RP of the video stream transferred from the external device is specified by the PR (Picture Rate) of the sequence header. And
The capacity B of the bit buffer 202 is determined by VBV (Vbv [Video Buffering Verifier] Buffer Siz) of the sequence header.
According to e), it is defined as shown in equation (2). Then, for each frame period, a video stream for one picture which the decode core circuit 204 is to decode at that time is read from the bit buffer 202 at a stretch. Here, the data amount X of the video stream input to the bit buffer 202 during one frame period is defined as shown in Expression (3) according to the bit rate RB and the picture rate RP. Therefore, the bit buffer 202
From the bit buffer 202 immediately after the video stream for one picture is read at a stretch from Bm (= B0
To B6) are defined based on the data amount X and the capacity B of the bit buffer 202 so as to satisfy the condition shown in Expression (4).

RB = 400 × BR (1) B = 16 × 1024 × VBV (2) X = RB / RP (3) 0 <Bm <BX = B− (RB / RP) (4) The bit buffer 20 is set so as to satisfy the condition shown in Expression (4).
If the occupation amount Bm of the bit buffer 2 is specified, the bit buffer 2
02 does not overflow or underflow. Conversely, if the occupation amount Bm of the bit buffer 202 exceeds the threshold value (BX), there is a very high possibility that the bit buffer 202 will overflow due to the video stream input to the bit buffer 202 in the next one frame period. Become.

In the video decoder 201, during normal reproduction, the values of the bit rate RB, picture rate RP, and capacity B are defined so as to satisfy Expression (4). That is, as shown in equation (2), bit buffer 2
If the capacity B of 02 is set, even if the connection of the picture skip circuit 206 is fixed to the node 206a side, the bit buffer 202 does not overflow or underflow in an ideal state. .

Therefore, during normal reproduction, the occupation amount Bm (= B0 to B4) immediately after the data for one picture is read out from the bit buffer 202 at once is equal to the threshold value Bth.
Based on 1, it is defined to satisfy the condition shown in Expression (5). The threshold value Bth1 is set based on the equation (4) as shown in the equation (6).

0 <Bm <Bth1 <B (5) Bth1 = BX = B- (RB / RP) (6) By the way, in an actual state, as shown in equation (2), Even if the capacity B of the bit buffer 202 is set, if the connection of the picture skip circuit 206 is fixed to the node 206a, the bit buffer 202 may overflow.

However, in the video decoder 201, the occupation amount Bm of the bit buffer 202 during normal reproduction.
Exceeds the threshold value Bth1, it is determined that the bit buffer 202 may overflow. Then, a video stream for an appropriate picture is read from the bit buffer 202 until the occupation amount Bm of the bit buffer 202 falls below the threshold value Bth1. Then, the picture skip circuit 206 is connected to the node 206b side, and all video streams for appropriate pictures read from the bit buffer 202 are skipped. Therefore, according to the video decoder 201, during normal playback,
The bit buffer 202 does not overflow.

Bit buffer 202 during high-speed reproduction
Occupancy Bm of the graph rises with the bit rate n × RB as the slope of the graph. For example, the occupation amount Bm of the bit buffer 202 at the time of double speed reproduction increases with the bit rate 2 × RB as the slope of the graph.

Therefore, at the time of high-speed reproduction, the occupation amount Bm (= B0 to B4) immediately after the data for one picture is read out from the bit buffer 202 at a stretch is equal to the threshold value Bthn.
Is defined to satisfy the condition shown in Expression (7). Note that the threshold value Bthn is set as shown in Expression (8).

0 <Bm <Bthn (7) Bthn = B−n × X = B− (n × RB / RP) (8) During high-speed playback, the occupancy Bm of the bit buffer 202 Exceeds the threshold value Bthn, the bit buffer 202
Is determined to be likely to overflow. For example, at the time of 2 × speed reproduction, the occupation amount Bm is equal to the threshold Bth2 (= B−2).
(2 × RB / RP)), the occupation amount Bm becomes the threshold value Bth3 (= B− (3 × RB / RP)) at 3 × speed reproduction.
Is exceeded, it is determined that the bit buffer 202 may overflow. Then, a video stream of an appropriate picture is read from the bit buffer 202 until the occupation amount Bm of the bit buffer 202 falls below the threshold value Bthn, and all the video streams are skipped. Therefore, according to the video decoder 201, the bit buffer 202 does not overflow during high-speed reproduction.

While decoding an arbitrary picture in the decode core circuit 204, the bit buffer 202
Overflows, the newly input video stream is overwritten on the remaining portion of the bit buffer 202 of the picture being decoded. As a result, the bit buffer 202 of the picture being decoded is
The remaining parts are destroyed and lost. Then, the decoding core circuit 204 cannot complete the decoding of the picture, and cannot generate a video signal of the picture. Therefore, it is absolutely necessary to prevent the bit buffer 202 from overflowing while the decoding core circuit 204 is decoding an arbitrary picture.

Therefore, it is necessary to determine whether or not the bit buffer 202 may overflow before the decoding core circuit 204 starts decoding an arbitrary picture. More precisely, when the picture header detection circuit 203 detects the picture header,
It is necessary to determine whether the bit buffer 202 may overflow and determine whether to skip the picture via the picture skip circuit 206.

Incidentally, the data amount of one picture is 0
Although the data amount is ４０40 bytes, the data amount cannot be known until the decoding at the decoding core circuit 204 is completed. The decoding processing time for one picture is
Although it depends on the data amount of the picture and the operation speed of the decode core circuit 204, it is usually 1/1 of one frame period.
It is about 3 to 3/4.

When the data amount of the picture read from the bit buffer 202 is 0 bytes, the occupation amount Bm of the bit buffer 202 does not change before and after the reading of the picture, so that even if the picture is skipped, overflow is avoided. It is not possible. Conversely, even when the data amount of the picture read from the bit buffer 202 is 0 bytes, there is no overflow if the bit buffer 202 has a sufficient free space.

Therefore, a free space for the data amount of the video stream input to the bit buffer 202 in one frame period is secured in the bit buffer 202. Then, even if the data amount of the picture read from the bit buffer 202 is 0 bytes, no overflow occurs.

The data amount of the video stream input to the bit buffer 202 during one frame period is (n × X =
nxRB / RP). If the free space of the bit buffer 202 is equal to or more than this data amount, no overflow occurs. Therefore, if the threshold value Bthn is set as shown in Expression (8), the overflow of the bit buffer 202 can be reliably avoided.

That is, the judgment circuit 205 checks the free space of the bit buffer 202 when the picture header detecting circuit 203 detects the picture header, and secures a sufficient free space (n × X = n × RB / RP). It is determined whether or not it has been performed. If sufficient free space is not secured, the control core circuit 2
07 skips the picture read from the bit buffer 202 via the picture skip circuit 206. Subsequently, when the picture header detection circuit 203 detects the next picture header, the determination circuit 205 checks the free space of the bit buffer 202 again. Since the time required for these processes is much shorter than the decoding process time of the decode core circuit 204, it is sufficient to start the decoding process of the decode core circuit 204 after securing sufficient free space in the bit buffer 202. In time.

Incidentally, the picture header detection circuit 203
At the time when the bit buffer 20 detects the picture header or after the decode core circuit 204 starts decoding.
2 may underflow. In this case, as soon as the video stream is input to the bit buffer 202,
There is no particular problem since a video stream for one picture may be sequentially read from the bit buffer 202.

As described in detail above, the video decoder 20
According to 1, the following effects can be obtained. During normal reproduction, overflow of the bit buffer 202 can be avoided.

At the time of high-speed reproduction, the bit buffer 2
02 overflow can be avoided. By providing the determination circuit 205 and the picture skip circuit 206, overflow of the bit buffer 202 can be avoided. As described above, since the control of the determination circuit 205 and the picture skip circuit 206 is simple, there is no need to configure the control core circuit 207 using a microcomputer. And each circuit 203
207 are mounted on a one-chip LSI. Therefore, the size of the video decoder 201 can be reduced.

Node 2 of picture skip circuit 206
The video stream skipped from the 06b side is a picture unit. Therefore, data is not interrupted in the middle of the picture transferred to the decode core circuit 204. Therefore, the decoding core circuit 204 can decode not only an I picture but also a P picture and a B picture. As a result, dropped frames occurring in the moving image reproduced on the display 105 are reduced. Therefore,
At the time of relatively slow high-speed reproduction of four times, it is possible to display several frames per second. Therefore, the motion of a moving image during high-speed playback can be smoothed, and the image quality can be greatly improved.

By the way, the above-mentioned video decoder 201
In (2), two thresholds B2thn and B3thn may be set so as to satisfy the rule shown in Expression (9). Note that each threshold B2t
The values of hn and B3thn may be set according to the playback speed as described above, and may be set as appropriate by actually considering the image quality of the moving image played back on the display 105.

0 <B3thn <B2thn <B (9) The determination circuit 205 determines the occupancy Bm of the bit buffer 202.
Is compared with the thresholds Bthn and B2thn to determine in which area the occupancy Bm is included in the equations (10) to (12).

Bm <B3thn ... (10) B3thn <Bm <B2thn ... (11) B2thn <Bm ... (12) As shown in the equation (10), the judgment circuit 205 If the occupation amount Bm does not exceed the threshold value B3thn, it is determined that the bit buffer 202 is normal without a risk of overflowing. In this case, the control core circuit 207 reads a video stream for one picture from the bit buffer 202. Then, the control core circuit 20
7, the picture skip circuit 206 is connected to the node 206a, and the picture read from the bit buffer 202 is transferred to the decode core circuit 204.

When the occupation amount Bm of the bit buffer 202 exceeds the threshold value B2thn and does not exceed the threshold value Bthn, the determination circuit 205 determines that the picture read from the bit buffer 202 is an I picture Or P
If it is a picture, the first flag is set. Equation (1)
As shown in 1), the occupation amount Bm of the bit buffer 202
Exceeds threshold B3thn and does not exceed threshold B2thn,
If the picture read from the bit buffer 202 is a P picture, a second flag is set. 1st or 2nd
Is set, the control core circuit 207 connects the picture skip circuit 206 to the node 206b if the picture read from the bit buffer 202 is a B picture, even in the case of the equation (10). Skip the picture.

FIG. 11 shows the occupancy Bm of the bit buffer 202 when two thresholds B2thn and B3thn are set.
Shows the change in If the occupancy Bm exceeds the threshold B3thn,
If the picture read from the bit buffer 202 is a B picture, it is skipped without decoding (illustration *
1). Here, even if the occupation amount Bm still exceeds the threshold value B3thn after skipping the B picture, the bit buffer 202
If the picture read next from is an I picture or a P picture, it is decoded (illustrated * 2).

Even when the occupation amount Bm exceeds the threshold value B3thn, if the picture read from the bit buffer 202 is an I picture or a P picture, decoding is performed (illustrated * 3). Here, if the occupation amount Bm still exceeds the threshold value B3thn after the decoding of the I picture or the P picture, if the next picture read from the bit buffer 202 is a B picture, the picture is skipped without decoding (illustration *). 4). This skipping of the B picture is performed with the occupation amount B
Repeat until m falls below the threshold B3thn (*
5).

When the occupation amount Bm exceeds the threshold value B2thn, if the picture read from the bit buffer 202 is an I picture or a P picture, the decision circuit 205
Is set (illustration * 6). When the first flag is set, if the next picture read from the bit buffer 202 is a B picture, the occupation amount Bm is set to the threshold B3t.
Even if it is less than hn, the B picture is skipped (illustrated * 7).

The occupation amount Bm exceeds the threshold value B3thn and the threshold value B
If it does not exceed 2thn, if the picture read from the bit buffer 202 is a P picture, the decision circuit 205
Sets the second flag (illustrated * 8). When the second flag is set, if the next picture read from the bit buffer 202 is a B picture, the B picture is skipped even if the occupation amount Bm is below the threshold value B3thn (illustrated * 9). ).

The occupation amount Bm exceeds the threshold value B3thn and the threshold value B
If it does not exceed 2thn, and the picture read from the bit buffer 202 is an I picture, the decision circuit 20
5 does not set the second flag (* 10 in the figure). When the second flag is not set, if the occupation amount Bm is smaller than the threshold value B3thn, decoding is performed even if the next picture read from the bit buffer 202 is a B picture.

As described above, the two threshold values B2thn and B3thn
Is set, the following effects can be obtained in addition to the effects of the video decoder 201 described above. If the occupation amount Bm of the bit buffer 202 exceeds the threshold value B3thn and does not exceed the threshold value Bthn, the I picture and P
The picture is decoded as much as possible and the B picture is skipped with priority.

Since the B picture is generated by bidirectional prediction, its importance is lower than that of an I picture or a P picture. Therefore, by skipping the B-picture of low importance with priority, it is possible to further reduce the number of dropped frames that occur in the moving image reproduced on the display 105. As a result, the motion of the moving image during high-speed playback can be further smoothed, and the image quality can be further improved.

By setting the first flag, the bit buffer 2 is decoded after decoding the I picture or the P picture.
Even if the occupation amount Bm of 02 is below the threshold value B3thn, it is possible to skip the B picture to be read from the bit buffer 202 in advance with a margin. Also, by setting the second flag, even if the occupation amount Bm of the bit buffer 202 falls below the threshold value B3thn after decoding the P picture, the B picture to be read from the bit buffer 202 next is skipped in advance with a margin. Can be.

As described above, skipping the B picture in advance is nothing but taking a preventive measure against the next overflow of the bit buffer 202. Therefore, the overflow of the bit buffer 202 can be avoided more reliably.

The data amount of an I picture is as large as two to three times that of a P picture. Therefore, the degree of decrease in the occupation amount Bm of the bit buffer 202 is greater when the I picture is read than when the P picture is read. Therefore, than after the P picture is read out,
After the I picture is read, the bit buffer 20
2 is less likely to overflow. Therefore,
Setting the first and second flags differentiates the precautionary measures between I and P pictures. That is, the threshold value B2thn of the precautionary measure for the I picture is set to P
By setting the precautionary measure for a picture to a value higher than the threshold value B3thn, the preventive measure for an I picture can be less strict than that for a P picture. As a result, unnecessary skips of B pictures can be reduced.

Simulation was performed on a case where a video stream having the following GOP structure (arrangement of picture types) shown in a) and b) was transferred from an external device, and the following results were obtained.

A) IBPBPBPBP... B) IBBPBBPBBPBBPBBIBP... [1] During double-speed playback; in a), all I and P pictures can be decoded, resulting in a full frame rate of 30 frames / sec. Can be displayed with. In the case of b), all of the I and P pictures and a part of the B picture can be decoded, and as a result, they can be displayed at 25 frames / second or more.

[2] At quadruple-speed playback; a) and b) can decode the I picture and the following 3 to 4 P pictures, and as a result, can display at 15 frames / second or more. The above embodiments may be modified as follows, and the same operation and effect can be obtained in such a case.

(1) Any two or more of the first to fourth embodiments are appropriately combined. In this case, a more excellent effect can be obtained by the synergistic action of the combined embodiments.

FIG. 7 shows a main block circuit of the MPEG audio decoder 41 in a case where all of the first to fourth embodiments are combined (fifth embodiment). The MPEG audio decoder 41 includes a bit buffer 2, a decode core circuit 3, an occupancy determination circuit 12, an analysis circuit 42, and a skip circuit 8. The decoding core circuit 3 includes an inverse quantization unit 32, a band synthesis unit 5, a PCM output unit 6, a control circuit 2,
2 is comprised. Note that the analysis circuit 42 performs the operation of each of the analysis circuits 9 and 13 by switching. In this case, an extremely excellent effect can be obtained by the synergistic action of the first to fourth embodiments.

(2) The first to fourth embodiments are replaced with software processing using a CPU. That is, the signal processing in each of the circuits (2 to 32) is replaced with software signal processing using a CPU. (3) In the embodiment shown in FIGS. 1, 2 and 7,
For simplicity of explanation, the skip circuit 8 has nodes 8a and 8b, and the connection is switched according to data. However, instead of this configuration, the skip circuit 8 is replaced by an analysis circuit. It may be configured by a logic circuit that allows only necessary data in the audio stream to pass according to the signals from 9, 13, and 42.

Similarly, the picture skip circuit 206 shown in FIG. 9 may be constituted by a logic circuit for passing only the picture data to be decoded. (4) As shown in FIG. 13, in the embodiments shown in FIGS. 1, 2 and 7, the skip circuit 8 may be omitted, and the control circuits 7 and 22 may have the same function as the skip circuit 8. .

In this case, the control circuits 7, 22 are connected to the related analysis circuits 9, 13, 42, and
When necessary data is supplied to the bit buffer 2 based on the analysis result from the third and the second buffer 42, the necessary data is stored at a regular address An in the bit buffer 2. When unnecessary data is supplied based on the analysis result, the address An + 1 next to the normal address An is used.
To store temporarily.

Subsequently, when another data is newly supplied, the control circuits 7 and 22 operate at the next address An.
The memory control of the bit buffer 2 is performed so that unnecessary data stored in +1 is replaced with new necessary data. When another unnecessary data is newly supplied while unnecessary data is stored at the next address An + 1,
The control circuits 7 and 22 perform memory control so that unnecessary data stored at the next address An + 1 is replaced with new unnecessary data.

Unnecessary data rewriting by the memory control prevents overflow of the bit buffer 2.
The unnecessary data referred to here is the first embodiment or the second data.
In the embodiment, it is data to be skipped by the skip circuit 8.

Incidentally, Japanese Patent Application Laid-Open No. 7-307677 (H03M 7/30, G10L 7/04, G10L 7/06, G10L 9/18)
In rows 40 to 46, the transfer rate of data input to the decoder (corresponding to the decode core circuit 3 in each of the above embodiments) (corresponding to the bit rate of the audio stream in each of the above embodiments) is increased. To improve the processing speed of the decoder to decode the data instantaneously.

However, as in the third embodiment, the publication does not even suggest that the occupancy of the bit buffer 2 is determined and the processing speed of the decode core circuit 3 is increased accordingly. Therefore, with the technology described in the publication, the operation and effect of the third embodiment cannot be achieved at all.

The same publication, column 8, line 29 to column 9, column 11
The row states that by controlling the writing of data to the FIFO memory (corresponding to the bit buffer 2 in each of the above embodiments), the data to be input to the decoder is thinned out.

However, as in the first embodiment, the publication does not even suggest that the decode core circuit 3 skips only unnecessary data. Further, as in the second embodiment, the publication also does not disclose how to determine the occupancy of the bit buffer 2 and skip data in accordance with the determination. Therefore, with the technology described in the publication, the operation and effect of the first embodiment or the second embodiment cannot be achieved at all.

As described above, each of the above embodiments differs from the invention described in the above publication in the configuration, operation, and effects. Further, it is difficult even for those skilled in the art to come up with the functions and effects of the above embodiments based on the publication.

Although the embodiments have been described above, technical ideas other than the claims that can be grasped from the embodiments will be described below together with their effects. (A) MPEG according to any one of claims 2 to 11
In the audio decoder, a D / A converter (10) for D / A converting the output of the decode core circuit (3).
6) and an audio amplifier (107) for amplifying the output of the D / A converter.

In this manner, an analog signal for driving a speaker can be generated from a digital audio signal. (B) In the MPEG audio decoder according to claim 2 or 3, the necessary data in the decoding core circuit (3) are a header, an error check and audio data, and the unnecessary data is ancillary data. And MPEG audio decoder which is error data.

In this way, a reliable operation can be performed based on necessary data.

[0160]

As described above, according to the present invention, it is possible to provide a decoder and an MPEG audio decoder capable of avoiding overflow of a bit buffer.

[Brief description of the drawings]

FIG. 1 is a main part block circuit diagram of a first embodiment.

FIG. 2 is a main part block circuit diagram of a second embodiment.

FIG. 3 is a graph for explaining the operation of the second embodiment.

FIG. 4 is a graph for explaining the operation of the second embodiment.

FIG. 5 is a main part block circuit diagram of a third embodiment.

FIG. 6 is a main part block circuit diagram of a fourth embodiment.

FIG. 7 is a main part block circuit diagram of a fifth embodiment.

FIG. 8 is a main part block circuit diagram of an MPEG system decoder.

FIG. 9 is a block diagram of a main part of an MPEG video decoder.

FIG. 10 is a graph for explaining the operation of the MPEG video decoder.

FIG. 11 is a graph for explaining the operation of the MPEG video decoder.

FIG. 12 is a main part block circuit diagram of a conventional mode.

FIG. 13 is a main part block circuit diagram of another embodiment.

[Explanation of symbols]

1, 11, 21, 31, 41, MPEG audio decoder 2, bit buffer 3, decoding core circuit 4, 32, inverse quantization unit 5, band synthesis unit 6, PCM output unit 7, 22, control circuit 8, skipping means , A frame skipping means, a frame control means, a skipping circuit constituting a data extracting means 9 ... an analyzing circuit constituting a data extracting means 12 ... an occupancy determining circuit constituting a speed controlling means, a frame controlling means 13 ... a frame skipping means, a frame Analysis circuit constituting control means 22 ... Control circuit constituting speed control means

Claims (13)

[Claims] 1. A decoder that controls unnecessary bit data from overflowing by eliminating unnecessary data from data input to the bit buffer. 2. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with an MPEG audio part, An MPEG audio decoder comprising: data extraction means (8, 9) for extracting only necessary data from a stream in a decode core circuit and transferring the extracted data to a bit buffer. 3. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with an MPEG audio part, An analysis circuit (9) for analyzing each frame constituting the stream; and, based on the analysis result of the analysis circuit, extract only necessary data from each frame in the decode core circuit, and transfer the extracted data to a bit buffer. And a skip means (8) for skipping the remaining data.
G audio decoder. 4. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with an MPEG audio part, MPE provided with control means (7, 9) for storing only necessary data from a stream in a decode core circuit in a bit buffer and transferring the data to the decode core circuit
G audio decoder. 5. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, An MP comprising frame control means (8, 12, 13) for controlling the number of frames of the audio stream transferred to the bit buffer based on the occupancy of the buffer
EG audio decoder. 6. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, An occupancy determination circuit (12) for detecting the occupancy of the buffer and comparing the occupancy with a predetermined threshold value; and determining a predetermined frame from the audio stream in frame units based on the determination result of the occupancy determination circuit. And a frame skip means (8, 13) for skipping the remaining frames to a bit buffer. 7. The MPEG audio decoder according to claim 6, wherein when the occupancy is smaller than a first threshold value (TH1), the frame is transferred from the audio stream to the bit buffer without skipping, and then occupied. If the amount is greater than a first threshold, the audio stream is skipped frame by frame, and if the occupancy is less than a second threshold (TH2), which is less than the first threshold, the audio stream is skipped. MPEG that transfers frames from a stream to a bit buffer without skipping
Audio decoder. 8. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, An occupancy determination circuit (12) for detecting the occupancy of the buffer and comparing the occupancy with a predetermined threshold value; An MPEG audio decoder comprising control means (7, 13) for storing data in a bit buffer in frame units and transferring the data to a decode core circuit. 9. A bit buffer (2) for storing an audio stream, a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part, An MPEG audio decoder including speed control means (12, 22) for controlling the operation speed of a decode core circuit based on the occupancy of a buffer. 10. A bit buffer (2) for storing an audio stream, and each frame constituting the audio stream read from the bit buffer is stored in an MPE.
A decoding core circuit (3) for decoding in accordance with the G audio part; and a pipeline signal generating means (12, 22) for generating a pipeline signal corresponding to the occupancy of the bit buffer. M whose operation speed is controlled in accordance with the pipeline signal generated by the pipeline signal generation means
PEG audio decoder. 11. A bit buffer (2) for storing an audio stream, and each frame constituting the audio stream read from the bit buffer is stored in an MPE.
A decoding core circuit (3) for decoding in accordance with the G audio part, wherein the decoding core circuit decodes the frame when the value of the scale factor included in the audio data included in the frame becomes equal to or less than a predetermined value. MPEG audio decoder to skip without doing. 12. A bit buffer (2) for storing an audio stream, and a decode core circuit (3) for decoding each frame constituting the audio stream read from the bit buffer in accordance with the MPEG audio part. When the occupation amount of the bit buffer is equal to or more than a predetermined value and the value of the scale factor included in the audio data included in the frame is equal to or less than the predetermined value, the decode core circuit skips the frame without decoding the frame. M
PEG audio decoder. 13. The MPEG audio decoder according to claim 2, wherein said decoding core circuit (3) performs inverse quantization on an audio stream.
A band synthesizing unit (5) that synthesizes an audio stream divided into subbands by performing a product-sum operation on an output of the inverse quantization unit; and an output unit that generates an audio signal from an output of the band synthesizing unit. (6) An MPEG audio decoder comprising: