JPH1055335A - バス・デバイスを検出する装置および方法 - Google Patents

バス・デバイスを検出する装置および方法

Info

Publication number
JPH1055335A
JPH1055335A JP9162096A JP16209697A JPH1055335A JP H1055335 A JPH1055335 A JP H1055335A JP 9162096 A JP9162096 A JP 9162096A JP 16209697 A JP16209697 A JP 16209697A JP H1055335 A JPH1055335 A JP H1055335A
Authority
JP
Japan
Prior art keywords
bus
signal
transaction
data
pci
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9162096A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1055335A5 (enExample
Inventor
John M Maclaren
ジョン・エム・マクラーレン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compaq Computer Corp
Original Assignee
Compaq Computer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compaq Computer Corp filed Critical Compaq Computer Corp
Publication of JPH1055335A publication Critical patent/JPH1055335A/ja
Publication of JPH1055335A5 publication Critical patent/JPH1055335A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP9162096A 1996-06-05 1997-06-05 バス・デバイスを検出する装置および方法 Pending JPH1055335A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US659355 1996-06-05
US08/659,355 US6052513A (en) 1996-06-05 1996-06-05 Multi-threaded bus master

Publications (2)

Publication Number Publication Date
JPH1055335A true JPH1055335A (ja) 1998-02-24
JPH1055335A5 JPH1055335A5 (enExample) 2005-04-14

Family

ID=24645068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9162096A Pending JPH1055335A (ja) 1996-06-05 1997-06-05 バス・デバイスを検出する装置および方法

Country Status (4)

Country Link
US (1) US6052513A (enExample)
EP (1) EP0811925B1 (enExample)
JP (1) JPH1055335A (enExample)
DE (1) DE69732736T2 (enExample)

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US6321335B1 (en) 1998-10-30 2001-11-20 Acqis Technology, Inc. Password protected modular computer method and device
US6718415B1 (en) * 1999-05-14 2004-04-06 Acqis Technology, Inc. Computer system and method including console housing multiple computer modules having independent processing units, mass storage devices, and graphics controllers
US6643777B1 (en) 1999-05-14 2003-11-04 Acquis Technology, Inc. Data security method and device for computer modules
US7114011B2 (en) * 2001-08-30 2006-09-26 Intel Corporation Multiprocessor-scalable streaming data server arrangement
US6832286B2 (en) * 2002-06-25 2004-12-14 Hewlett-Packard Development Company, L.P. Memory auto-precharge
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US7990724B2 (en) 2006-12-19 2011-08-02 Juhasz Paul R Mobile motherboard
US8643168B1 (en) * 2012-10-16 2014-02-04 Lattice Semiconductor Corporation Integrated circuit package with input capacitance compensation
US10037150B2 (en) * 2016-07-15 2018-07-31 Advanced Micro Devices, Inc. Memory controller with virtual controller mode
CN110399325B (zh) * 2019-07-30 2023-05-30 江西理工大学 一种基于iic总线协议的改进型ip核

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Also Published As

Publication number Publication date
DE69732736D1 (de) 2005-04-21
DE69732736T2 (de) 2005-08-04
EP0811925A3 (en) 1999-02-10
EP0811925A2 (en) 1997-12-10
US6052513A (en) 2000-04-18
EP0811925B1 (en) 2005-03-16

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