JPH1052037A - Small-loss output circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small-loss output circuit for reducing the power loss. SOLUTION: A small-loss output circuit has a magnetic amplifier MA connected to a secondary winding N2 of a transformer T for generating a rectangular AC voltage, and a rectifier element using MOSFET's Q1 and Q2 on the rectifier side and the flywheel side. A filter choke coil CH for filtering the rectified output from the rectifier elements to obtain a DC output voltage is provided. In this case a driving signal for the MOSFET Q2 on the flywheel side is fed through the filter choke coil CH. In this constitution, a power loss on the flywheel side is reduced, and a small power loss on the whole can be obtained effectively.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a low-loss output circuit, and more particularly, to a low-loss output circuit using a mag amplifier (magnetic amplifier).

[0002]

2. Description of the Related Art An example of a conventional low-loss output circuit will be described with reference to FIG.

The low-loss output circuit shown in FIG.
, A mag-amp MA and two Schottky barrier diodes (SBDs) D0 functioning as a rectifier diode and a flywheel diode are connected to the secondary winding N2 of the rectifier, and a flywheel diode DF, a smoothing coil L and a smoothing capacitor C And a DC voltage from a DC power supply (not shown) is input to the primary side of the transformer T in a switching state to induce a rectangular-wave secondary winding voltage on the secondary winding N2 of the transformer T. The secondary winding voltage is rectified by utilizing the magnetic saturation characteristics of the mag-amp MA and further by utilizing the rectification characteristics of the Schottky barrier diode D0, and is smoothed by the smoothing coil L and the smoothing capacitor C to output terminals 11 and 12. A predetermined DC voltage is output in between.

[0004] As another example of a conventional low-loss output circuit, a circuit configured with a synchronous rectification system as shown in FIG. 11 is also known.

The low-loss output circuit shown in FIG. 11 uses MOS-FETs Q1 and Q2 in place of the two Schottky barrier diodes D0 shown in FIG. 10, and the gates and sources of the MOS-FETs Q1 and Q2. A driving voltage is supplied from auxiliary windings N3 and N4 provided on the secondary side of the transformer T therebetween. Also, MOS-
A body diode DF is connected between the drain and the source of each of the FETs Q1 and Q2.

[0006]

However, each of the above-mentioned conventional low-loss output circuits has the following problems.

That is, in the case of the low-loss output circuit shown in FIG. 10, when the circuit is designed for large current output or low voltage output, the voltage applied to the Schottky barrier diode D0 is relatively low, for example, as shown in FIG. As shown in comparison with the embodiment of the present invention, the voltage becomes about 0.4 V, and the power loss increases.

In the case of the low-loss output circuit shown in FIG. 11, the gate signal of the MOS-FET Q2 is lost, and the loss when the MOS-FET Q2 is turned on increases. That is, as shown in FIG. 2 as compared with the embodiment of the present invention, the voltage on the flywheel side is
2 is determined by the product of the on-state resistance and the output current. For example, the voltage becomes as low as about 0.2 V, and the power loss can be reduced as compared with the low-loss output circuit shown in FIG. In this case, the MOS-FET Q2 on the flywheel side is not turned on, and at this time, the voltage applied to the body diode DF is about 0.7 V, so that the power loss reduction effect on the flywheel side is reduced. However, the overall loss cannot be reduced.

The power loss that occurs in the body diode DF is not so problematic on the rectifying side because the current rises from zero, but the effect is remarkable since the current suddenly rises to the peak value on the flywheel side.

Also, a MOS-FET on the flywheel side
If the supply timing of the gate signal is delayed when Q2 is off, the rectifying MOS-FET Q1 is already on, so a short-circuit current flows through both MOS-FETs Q1 and Q2,
Causes a very dangerous situation. Also, the MOS-FET Q1,
The switching speed of the body diode DF of Q2 is generally slow, and if the rectifying MOS-FET Q1 is turned on during the storage time of the body diode DF on the flywheel side even if there is no delay in the supply timing of the gate signal,
A short-circuit current flows as in the case described above.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a low-loss output circuit capable of reducing power loss and suppressing short-circuit current flowing from the rectifying side to the flywheel side. Aim.

[0012]

A low-loss output circuit according to the present invention comprises a mag-amp connected to a secondary winding of a transformer for outputting a rectangular wave AC voltage, and a rectifier-side and flywheel-side MOS-FET. In a low-loss output circuit including the used rectifying elements and a smoothing choke coil for smoothing the rectified outputs of these rectifying elements to obtain a DC output voltage, a drive signal of the rectifying element on the flywheel side is converted by a smoothing choke coil. It is characterized in that it is configured to supply.

According to this configuration, a drive signal is supplied from the smoothing choke coil for smoothing the rectified output of the rectifying element using the MOS-FET to the flywheel-side rectifying element, and the flywheel-side MOS-FET is supplied. Is turned on. Accordingly, after the polarity of the secondary winding of the transformer is inverted, the voltage from the smoothing choke coil is supplied to the flywheel side MOS-FET as a drive signal until the mag amplifier is saturated after the controlled time has elapsed, and this MOS-F
The ET can be turned on, the power loss on the flywheel side is reduced, and an overall loss reduction effect can be exhibited.

According to the present invention, in addition to the above-described configuration, a short-circuit current suppressing circuit is provided, and a closed loop is provided between the saturable reactor, the capacitor, and the gate and source of the MOS-FET on the flywheel side of the short-circuit current suppressing circuit. Is formed at the beginning of the flow of current on the flywheel side by the reverse polarity voltage detected by the saturable reactor.
The MOS-F is accelerated by accelerating the charge between the gate and the source of the FET, and conversely by the reverse polarity voltage detected by the supersaturated reactor at the end of the current flow on the flywheel side.
Since the discharge between the gate and the source of the ET is configured to be accelerated, a short-circuit current when both the MOS-FETs are simultaneously turned on can be suppressed, and safety can be improved.

According to the present invention, in addition to the above-described configuration, there is provided a supersaturated reactor for detecting a short-circuit current flowing through the MOS-FET on the flywheel side;
A short-circuit current suppression circuit comprising a transistor connected between the gate and the source of the FET and turned on by the supersaturated reactor, wherein a voltage generated in the supersaturated reactor when both the MOS-FETs are simultaneously turned on, -The transistor connected between the gate and the source of the FET is turned on to short-circuit the gate and the source of the MOS-FET.
-Short circuit current when FETs are simultaneously turned on can be suppressed, and safety can be improved.

[0016]

Embodiments of the present invention will be described below in detail.

FIG. 1 shows a low-loss output circuit according to an embodiment of the present invention. In the low loss output circuit of the present embodiment shown in FIG. 1, those having the same functions as those of the conventional circuit shown in FIG. 11 are denoted by the same reference numerals.

The low-loss output circuit according to the present embodiment has the structure shown in FIG.
Is different from the conventional circuit shown in FIG. 1 in that the auxiliary winding N4 of the transformer T is omitted, and a smoothing choke coil CH is used instead of the smoothing coil L at the subsequent stage of the mag amplifier MA connected to the secondary winding N2. The winding start side of the secondary coil la of the smoothing choke coil CH is connected to the gate of the flywheel side MOS-FET Q2, and the winding end side is connected to the source of the flywheel side MOS-FET Q2. The feature is that the flywheel side MOS-FET Q2 is turned on by the choke coil CH.

Next, the operation of the low-loss circuit having the above-described configuration will be described with reference to the waveform chart of each section of the low-loss circuit shown in FIG.

The voltage waveform of the voltage induced in the secondary winding N2 of the low loss circuit having the above configuration is shown in the uppermost stage of FIG. 2, and the voltage is supplied to the mag amplifier MA based on the voltage of the secondary winding N2. Then, the mag-amp MA becomes saturated after a lapse of a previously controlled time, becomes zero impedance, and then keeps zero impedance until a voltage of the opposite polarity is induced in the secondary winding N2. This voltage waveform is as shown in the second stage of FIG.

On the other hand, the auxiliary winding N3 also has a secondary winding N2.
Voltage of the same polarity as the voltage of the rectifier-side MOS-F
ETQ1 is turned on.

As a result, after the mag-amp MA saturates, the voltage of the mag-amp MA decreases from the time when the voltage drops to zero level until the polarity of the voltage of the secondary winding N2 is inverted.
The current having the current waveform shown in the third stage in FIG. 2 flows, and energy is stored in the smoothing choke coil CH.

The gate and source of the MOS-FET Q2 on the flywheel side are reverse-biased by the voltage generated in the secondary coil la of the smoothing choke coil CH. At this time, the MOS-
When the FET Q2 is off, charges are accumulated between its drain and source.

Next, when the polarity of the voltage of the secondary winding N2 is reversed, the current flowing through the mag-amp MA becomes zero, and the smoothing choke coil CH also reverses the voltage polarity and starts discharging the stored energy. At this time, the gate of the flywheel side MOS-FET Q2 is quickly positively biased by the voltage of the opposite polarity to the above-mentioned case in which the secondary coil la of the smoothing choke coil CH is generated, and the flywheel side MOS-FET Q2 Is turned on, and a flywheel current having a waveform shown in the fourth stage in FIG. 2 flows.

That is, the current flowing through the mag-amp MA and the current flowing through the MOS-FET Q2 on the flywheel side are alternately supplied to the smoothing choke coil CH, smoothed by the smoothing choke coil CH and the smoothing capacitor C, and output. A predetermined DC voltage is output to terminals 11 and 12.

In this case, the MO on the flywheel side
The voltage between the drain and the source of the S-FET Q2 depends only on the on-resistance of the MOS-FET Q2 on the flywheel side and the flywheel current. As shown in the fifth stage of FIG. As a result, the voltage loss due to the body diode DF as in the case of the conventional synchronous rectification method is eliminated, and the power loss on the flywheel side is reduced.
An overall loss reduction effect can be exhibited.

Next, another embodiment of the present invention will be described with reference to FIGS.

The low-loss circuit shown in FIG. 3 is characterized in that, in addition to the above-described configuration, a short-circuit current suppressing circuit for suppressing a short-circuit current when both the MOS-FETs Q1, Q2 are simultaneously turned on.

This short-circuit current suppressing circuit comprises a supersaturated reactor SL for detecting a short-circuit current flowing through the MOS-FET Q2 on the flywheel side, and a capacitor C0 connected between the smoothing choke coil CH and the gate of the MOS-FET Q2. And the two MOS-FETs Q1, Q
2 at the same time, the flywheel MO
A voltage having a polarity opposite to the voltage generated by the short-circuit current is applied between the gate and the source of the S-FET Q2 to suppress the short-circuit current.

In FIG. 3, ZD1 and ZD2 are Zener diodes for protecting the gate of the MOS-FET Q2 on the flywheel side.

According to the short-circuit current suppressing circuit of the low-loss circuit shown in FIG. 3, the secondary coil la of the smoothing choke coil CH, the saturable reactor SL, the capacitor C0, the gate and the source of the MOS-FET Q2 on the flywheel side. A closed loop is formed between them.

Then, the charge between the gate and the source of the MOS-FET Q2 is accelerated by the reverse polarity voltage detected by the saturable reactor SL at the beginning of the flow of the current on the flywheel side, thereby rectifying the current as shown in FIG. In the period of the end of the current flow on the flywheel side, the rise of the current on the flywheel side, whose rise is delayed due to the current flowing through the body diode DF, is made steep.
The MOS-FE by the voltage of the opposite polarity detected by the MOS-FE.
The discharge between the gate and source of TQ2 is accelerated.

As a result, the two MOS-FETs Q1, Q
2 can be suppressed at the same time as shown in the second stage of FIG. 4 when the transistors 2 are simultaneously turned on, and the safety can be improved. In addition, the flywheel voltage can be reduced as shown in the third stage of FIG. As in the case of the low-loss circuit shown in FIG.
V, so that the power loss on the flywheel side is reduced, and an overall loss reduction effect can be exhibited.

Next, still another embodiment of the present invention will be described with reference to FIGS.

The low-loss circuit shown in FIG. 6 is different from the low-loss circuit shown in FIG.
A feature is that a short-circuit current suppression circuit different from that shown in FIG. 3 for suppressing a short-circuit current when Q1 and Q2 are simultaneously turned on is provided.

The short-circuit current suppressing circuit shown in FIG. 6 is connected to the source of the MOS-FET Q2 on the flywheel side and detects a short-circuit current flowing through the MOS-FET Q2, and the smoothing choke coil CH.
And a collector connected to the gate of the MOS-FET Q2 through a diode D1 and a capacitor C0 connected between the supersaturated reactor S2 and the gate of the MOS-FET Q2.
L has an emitter connected to the other end thereof and the MOS-FET Q
2 and a transistor TR whose base is connected to the source via a resistor R.

The two MOS-FETs Q1, Q2
Simultaneously turns on, the transistor TR is turned on by the voltage detected by the supersaturated reactor SL, the gate and source of the MOS-FET Q2 are short-circuited, and both the MOS-FETs Q1, Q2 are turned on at the same time. 7 can suppress the short-circuit current as shown in the second stage, and can improve the safety. In addition, as shown in the third stage in FIG. 7, the flywheel voltage is reduced as compared with the case of the low-loss circuit shown in FIG. Similarly, it can be set to, for example, about 0.2 V, whereby the power loss on the flywheel side is reduced, and an overall loss reduction effect can be exhibited.

FIG. 8 shows an example in which the above-described short-circuit current suppressing circuit shown in FIG. 3 is applied to a low-loss output circuit of a synchronous rectification system similar to the conventional example shown in FIG.
11 shows an example in which the short-circuit current suppressing circuit shown in FIG. 6 is applied to a synchronous rectification type low-loss output circuit similar to the conventional example shown in FIG.

In the low-loss output circuit of the synchronous rectification system to which the short-circuit current suppressing circuit shown in FIG. 3 or the short-circuit current suppressing circuit shown in FIG.
1, Short-circuit current when Q2 is simultaneously turned on can be suppressed, and safety can be improved.

According to the present embodiment described above, since the MOS-FET Q2 on the flywheel side is driven by the voltage of the smoothing choke coil CH, the voltage drop on the flywheel side is suppressed to reduce the loss. It was confirmed that the power consumption was reduced by about several percent as compared with the conventional example (in the case of a 5 V, 20 A circuit).

Further, by adding a short-circuit current prevention circuit using a saturable reactor, an excessive short-circuit current can be suppressed, and the safety of the low-loss output circuit can be improved.

That is, according to the low-loss output circuit of the present embodiment, compared with the conventional low-loss output circuit, the loss of the rectifier element can be reduced with the same specifications, and the cost of the radiator can be reduced. Costs can be reduced. In addition, the rate of temperature rise of the rectifying element can be suppressed low, the rate of component failure can be reduced, and a longer life and higher reliability can be achieved.

Conversely, if they are designed to have the same loss,
A large current output can be obtained, and the cost merit can be increased.

[0044]

According to the present invention, it is possible to provide a low-loss output circuit capable of reducing the power loss on the flywheel side and exhibiting an overall loss reduction effect.

According to the present invention, in addition to the above-described effects, the short-circuit current suppression circuit can suppress a short-circuit current when both MOS-FETs are simultaneously turned on, thereby improving safety. A loss output circuit can be provided.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a low-loss output circuit according to an embodiment of the present invention.

FIG. 2 is a signal waveform diagram of each part of a low-loss output circuit according to an embodiment of the present invention and a conventional example.

FIG. 3 is a circuit diagram in which an example of a short-circuit current suppression circuit is added to the low-loss output circuit according to the embodiment of the present invention;

FIG. 4 is a waveform diagram of current and voltage on the flywheel side of the low-loss output circuit shown in FIG. 3;

FIG. 5 is an enlarged waveform diagram of falling and rising currents on the rectifying side and the flywheel side of the low loss output circuit shown in FIG. 3;

FIG. 6 is a circuit diagram in which another example of the short-circuit current suppressing circuit is added to the low-loss output circuit according to the embodiment of the present invention.

7 is a waveform diagram of current and voltage on the flywheel side of the low-loss output circuit shown in FIG. 6;

FIG. 8 is a circuit diagram showing an example in which the short-circuit current suppression circuit shown in FIG. 3 according to the embodiment of the present invention is applied to a synchronous rectification type low-loss output circuit.

FIG. 9 is a circuit diagram showing an example in which the short-circuit current suppressing circuit shown in FIG. 6 according to the embodiment of the present invention is applied to a synchronous rectification type low-loss output circuit.

FIG. 10 is a circuit diagram of a low-loss output circuit using a conventional mag amplifier.

FIG. 11 is a circuit diagram of a conventional synchronous rectification type low-loss output circuit using a mag amplifier.

[Explanation of symbols]

 T Transformer N2 Secondary winding N3 Auxiliary winding Q1 MOS-FET Q2 MOS-FET MA Mag amp CH Smoothing choke coil C Smoothing capacitor DF Body diode SL Supersaturated reactor C0 Capacitor ZD1 Zener diode ZD2 Zener diode TR Transistor

Claims (3)

[Claims] 1. A mag-amp connected to a secondary winding of a transformer for outputting a rectangular-wave AC voltage, a rectifying element using rectifying-side and flywheel-side MOS-FETs, and smoothing rectifying outputs of these rectifying elements. A low-loss output circuit having a smoothing choke coil for obtaining a DC output voltage, wherein a drive signal for the rectifying element on the flywheel side is supplied by the smoothing choke coil. circuit. 2. A mag-amp connected to a secondary winding of a transformer that outputs a rectangular wave AC voltage, a rectifier-side MOS-FET and a flywheel-side rectifier MOS-FET, In a low-loss output circuit having a smoothing choke coil for obtaining a DC output voltage by smoothing a rectified output by a MOS-FET, a drive signal is supplied from the smoothing choke coil to a gate of the MOS-FET on the flywheel side. And a saturable reactor for detecting a short-circuit current flowing through the flywheel-side MOS-FET, and a capacitor connected between the smoothing choke coil and the gate of the MOS-FET. When the FETs are turned on at the same time, a short circuit occurs between the gate and the source of the MOS-FET on the flywheel side. Low-loss output circuit, characterized in that, with a voltage polarity opposite to suppress short-circuit current suppressing circuit for short-circuit current by applying a voltage caused by the current. 3. A mag-amp connected to a secondary winding of a transformer that outputs a square wave AC voltage, a rectifier-side MOS-FET and a flywheel-side rectifier MOS-FET. In a low-loss output circuit having a smoothing choke coil for obtaining a DC output voltage by smoothing a rectified output by a MOS-FET, a drive signal is supplied from the smoothing choke coil to a gate of the MOS-FET on the flywheel side. And a supersaturated reactor for detecting a short-circuit current flowing through the flywheel-side MOS-FET, and the MOS-FET
A transistor connected between the gate and the source of the MOS transistor, the transistor being turned on by the supersaturated reactor.
And a short-circuit current suppressing circuit for suppressing a short-circuit current by short-circuiting the gate and the source of the MOS-FET on the flywheel side by the transistor when the S-FET is simultaneously turned on. Output circuit.