JPH1041926A - Diversity receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the diversity receiver formed by simplifying the circuit configuration of an after-detection synthesis diversity receiver used for countermeasuring deterioration in reception sensitivity due to fading in mobile communication so as to reduce the processing time. SOLUTION: The receiver is provided with reception level detection circuits 12, 13, demodulation circuits 14, 15 providing an output of I, Q signals, phase detection circuits 16, 17 to obtain phase information from the I, Q signals outputted from the demodulation circuits 14, 15, and a synthesis discrimination circuit 18 conducting branch synthesis and discrimination based on a weight of outputs of the reception level detection circuits 12, 13 in response to the reception level and the phase information outputted from the phase detection circuits 16, 17. The circuit configuration is simplified by using the phase information to conduct weight synthesis and discrimination and the processing time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diversity receiver for receiving a signal digitally modulated by phase modulation.

[0002]

2. Description of the Related Art In recent years, needs for digital mobile communication such as PHS and mobile phones have been increasing. In mobile communication, measures against deterioration of reception sensitivity due to fading have become an important problem. Conventionally, a diversity receiver has been used as an effective method for reducing reception sensitivity due to fading. Synthetic diversity reception after detection is known as a method having excellent characteristics.
26 discloses an improved configuration.

Hereinafter, a conventional diversity receiving apparatus will be described. FIG. 5 shows a block diagram of a conventional diversity receiving apparatus. In FIG. 5, reference numerals 1 and 2 denote reception level detection circuits for detecting the reception levels of the respective branches, and reference numerals 3 and 4 denote demodulation circuits for demodulating the received signals and outputting I and Q signals. Reference numerals 5, 6, 7, and 8 denote weighting circuits for performing weighting synthesis on the demodulated signals using weights corresponding to the outputs of the reception level detection circuits 1 and 2, and reference numeral 9 denotes an I signal synthesis for synthesizing the weighted I signal of each branch. Circuit, 1
Reference numeral 0 denotes a Q signal combining circuit that combines the weighted Q signals of the branches. For example, a synchronous detection circuit or a delay detection circuit is used.

[0004] The weighted I signal and Q signal are input to a decision circuit 11 for symbol decision. For example, Q
In the case of PSK synchronous detection or π / 4 shift QPSK delay detection, the phase of a symbol point is one of (Equation 1) in an ideal state with no noise or interference. Therefore, the decision phase is I> 0,
When Q> 0 (Equation 2), I> 0, when Q <0 (Equation 3), I
When <0, Q <0 (Equation 4), when I <0, Q> 0, (Equation 5).

[0005]

(Equation 1)

[0006]

(Equation 2)

[0007]

(Equation 3)

[0008]

(Equation 4)

[0009]

(Equation 5)

[0010]

However, in the above-mentioned conventional method and configuration, a weighting circuit and a synthesizing circuit are required for each of the I signal and the Q signal, which complicates the entire circuit configuration and requires a long processing time. Had problems.

An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a diversity receiver capable of simplifying a circuit configuration and reducing a processing time.

[0012]

According to a first aspect of the present invention, at each symbol timing, each of ideal phase points that can be taken as a determination phase when there is no noise or interference, and a demodulated baseband signal are obtained. The absolute value of the difference from the demodulated signal phase is weighted according to the reception level of each diversity branch, an evaluation value obtained by branch synthesis is obtained, and the ideal phase point at which the evaluation value becomes the minimum is determined as the determination phase, Output data.

According to a second aspect of the present invention, a weight for branch combining is obtained in accordance with a reception level and a phase error which is an absolute value of a difference between a decision phase and a signal phase obtained from a demodulated baseband signal.

According to a third aspect of the present invention, when the phase error is converted into a weight, the weight is fixed at a portion where the phase error is smaller than a predetermined value.

[0015]

According to the first aspect of the present invention, the phases are weighted and synthesized, so that it is not necessary to use a weighted synthesis circuit for each of the I signal and the Q signal, the circuit configuration is simple, and the processing time is reduced. Can be shortened.

According to the second aspect of the present invention, the phase error, which is the absolute value of the difference between the decision phase and the demodulation phase, is also considered in the weight of the synthesis, so that the influence of the interference wave and the delayed wave can be determined from the magnitude of the phase error. Can be estimated, and the receiving sensitivity to interference waves and delayed waves can be improved.

According to the third aspect of the present invention, there is no need to average the weights according to the phase errors, and the need for an integrator for averaging is eliminated.

(Embodiment 1) FIG. 1 is a block diagram of a diversity receiving apparatus according to Embodiment 1 of the present invention.
FIG. 4 is an explanatory diagram of a demodulated phase point and an ideal phase point using the same QPSK as an example.

In FIG. 1, reference numerals 12 and 13 are reception level detection circuits, and reference numerals 14 and 15 are demodulation circuits for demodulating a received signal and outputting an I signal and a Q signal. Reference numerals 16 and 17 denote phase detection circuits for obtaining phase information from the I signal and the Q signal output from the demodulation circuits 14 and 15, respectively. Reference numeral 18 denotes a synthesis determination circuit which obtains the evaluation value based on the weights corresponding to the reception levels of the outputs of the reception level detection circuits 12 and 13 and the phase information of the outputs of the phase detection circuits 16 and 17 and performs branch synthesis. Is determined.

As an example, a weighting synthesis method and a judgment method when QPSK is used will be described. In FIG. 2, θ _km is k (1
≤ k ≤ N) The phase information of the m-th symbol of the branch, a = (Equation 2), b = (Equation 3), c = (Equation 4), d
= (Equation 5) is an ideal phase point that can be taken. The absolute value of the difference from ideal phase points a to d that can be taken for each symbol point of the N branches is weighted according to the reception level.
_km , branch synthesis is performed, and evaluation values δ _am , δ _bm ,
Determine δ _cm and δ _dm . As an example, the evaluation value for a is shown in (Equation 6).

[0021]

(Equation 6)

The ideal phase point at which the evaluation value obtained in this way becomes the minimum is defined as the judgment phase. That is, δ from δ _am to δ _{dm
If bm} is the minimum, the determination phase of the m-th symbol is b = (Equation 3).

(Embodiment 2) FIG. 3 is a block diagram of a maximum likelihood decision diversity receiving apparatus in which a phase error is also taken into account in Embodiment 2 of the present invention, and FIG. FIG. 9 is a conversion table diagram for performing the conversion. In FIG. 3, reference numerals 19 and 20 are reception level detection circuits, and 21 and 22 are demodulation circuits for demodulating a reception signal and outputting an I signal and a Q signal. Reference numerals 23 and 24 denote phase detection circuits for obtaining phase information from the I signal and the Q signal output from the demodulation circuits 21 and 22, respectively. Reference numerals 25 and 26 denote 1-symbol delay circuits that delay the phase before the judgment by one symbol in consideration of the delay required for the judgment. Numerals 27 and 28 denote phase error detection circuits for calculating the absolute value of the difference between the decision phase and the demodulation phase. When the decision phase of the m-th symbol of the k-th branch is φ _km and the demodulation phase is θ _km (Equation 7) Indicated by

[0024]

(Equation 7)

Reference numerals 29 and 30 denote low-pass filters (LPFs).
And the outputs of the phase error detection circuits 27 and 28 are averaged. Reference numerals 31 and 32 denote synthesis weight calculation circuits for calculating a synthesis weight ω _km from a weight corresponding to the reception level and a weight corresponding to the determination error. The outputs of the LPFs 29 and 30 are P _km and the reception level (amplitude) is R _km . In other words, it can be expressed as, for example, (Equation 8).

[0026]

(Equation 8)

Numeral 33 denotes a combination judging circuit. The combination weights of the outputs of the combination weight calculation circuits 31, 32 and the phase detection circuit 23,
The evaluation value is obtained from the phase information of 24 outputs, and branch synthesis is performed to determine the evaluation value. The evaluation value is expressed by an equation obtained by replacing the reception level weight ω _km of Expression 6 with the composite weight ω ′ _km . As an example, the evaluation value for a is shown in (Equation 9).

[0028]

(Equation 9)

In a portion where the phase error is smaller than a predetermined value as shown in FIG. 4, a conversion table in which the weight is constant is used. If the phase error is converted into the weight, the LPF for averaging the weight of the phase error is unnecessary. Becomes

[0030]

As described above, according to the present invention, the circuit configuration of the diversity receiver can be simplified and the processing time can be shortened. In addition, it is possible to improve reception sensitivity deterioration due to interference waves and delay waves, and it becomes unnecessary to use an LPF for averaging phase errors.

[Brief description of the drawings]

FIG. 1 is a block diagram of a diversity receiver according to Embodiment 1 of the present invention.

FIG. 2 is an explanatory diagram of demodulated phase points and ideal phase points using QPSK as an example of the diversity receiver according to Embodiment 1 of the present invention.

FIG. 3 is a block diagram of a maximum likelihood determination diversity receiving apparatus in which a phase error is also taken into consideration as a weight according to the second embodiment of the present invention;

FIG. 4 is a conversion table diagram for converting a phase error into a weight according to the second embodiment of the present invention.

FIG. 5 is a block diagram of a conventional diversity receiving apparatus.

[Explanation of symbols]

 12, 13, 19, 20 reception level detection circuit 14, 15, 21, 22 demodulation circuit 16, 17, 23, 24 phase detection circuit 18, 33 synthesis judgment circuit

Claims (3)

[Claims] 1. A diversity receiver for receiving a signal phase-modulated by digital data, wherein at each symbol timing, each of ideal phase points that can be taken as decision phases when there is no noise or interference, and demodulated. The absolute value of the difference from the demodulated signal phase obtained from the baseband signal is weighted according to the reception level of each diversity branch, an evaluation value obtained by branch synthesis is obtained, and an ideal phase point at which the evaluation value is minimized is determined. A diversity receiver that outputs received data as a determination phase. 2. A weight for branch combining is obtained in accordance with a reception level, a phase error which is an absolute value of a difference between a decision phase and a signal phase obtained from a demodulated baseband signal. Diversity receiver. 3. The diversity receiver according to claim 2, wherein, when converting the phase error into a weight, the weight is fixed at a portion where the phase error is smaller than a predetermined value.