JPH1040069A - Method for controlling error of fifo and fifo circuit and network forming device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To invalidate only block data related to a produced error, and a evade any effect on the input and output of another block data by interrupting the output of the block data when the produced error is, for example, an output error, and changing the value of an output pointer into a value obtained by adding 1 to the input destination address of the final unit data of the block data. SOLUTION: When the result of the discrimination of an error detecting and discriminating circuit 55 is negative, and a produced error is an error following the input control of an inputting part 52, an error processing part 56 interrupts the input of a communication frame, and changes the value of an input pointer to the input destination address of the leading unit data of the communication frame whose input is interrupted. Also, when the result of the discrimination of the error detecting and discriminating circuit 55 is negative, and the produced error is an error following the output control of an outputting part 53, the output of the communication frame is interrupted, and the value of an output pointer is changed to a value obtained by adding 1 to the input destination address of the final unit data of the communication frame whose output is interrupted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a FIFO (FIFO) which outputs block data of its own block or other block data for each unit data during input of each unit data obtained by dividing block data of a finite size into predetermined units. Fifo, Fi
rst in first out) error input / output control.
The present invention relates to a FIFO error input / output control and a FIFO circuit suitable for efficiently coping with an input / output error, and a network configuration device using the same.

[0002]

2. Description of the Related Art FIFO is a technique for controlling a pointer so that an address of a memory is on a ring and data can be first-in, first-out of the memory. In this FIFO, block data having a finite size is input for each unit data serving as a basic unit of input / output to / from the FIFO. Some output. In such a FIFO, the next block data is input even if the output of the already input block data is not completed.

Conventionally, in such a FIFO, an input prohibition event during block data input, such as input cancellation from an input source, FIFO overflow, or input data abnormality, and output abort or FI from an output destination.
When an output inhibit event during block data output such as FO underflow occurs, the FIFO
During the input to O, all the block data already input to the FIFO were invalidated.

FIG. 6 is a block diagram showing a configuration example of a portion related to error control of a conventional FIFO circuit for performing error control of a FIFO. The conventional FIFO shown in FIG.
FIFO main body 61 as a memory, input pointer of FIFO main body 61 (described as "Iptr" in the figure) 62, FIFO
A block management table that manages, for each block data, an output pointer (indicated as “Optr” in the figure) 63 and a head pointer information (block information) indicating the address of the head unit data of the block data on the FIFO body 51. 64
And an input block information pointer (“IB” in the figure) indicating the address on the block management table 64 of the block information corresponding to the block data to be input or input next.
ptr ") 65 and an output block information pointer (" OBpt "in the figure) pointing to the address on the block management table 64 of the block information corresponding to the block data being output.
r) 66).

In inputting the previous block data, when the head unit data of the block data is input to the FIFO main unit 61, the value of the input pointer 62 is input to the head pointer of the block information indicated by the input block information pointer 65. . Each time the unit data is input, the input pointer 62 is incremented by one, and when the last unit data of the block data is input, the input block information pointer 65
Then, the address on the block management table 64 of the block information to be input next is set. Even if the output of the already input block data is not completed, the next block data is input.

In normal output of block data,
The output of the head data unit is started from the point in time when the input of a predetermined number of unit data of the block data indicated by the output block information pointer 66 is completed, and the output pointer 63 is incremented by one every time the unit data is output. Then, when the last unit data is output, the address on the block management table 64 of the block information corresponding to the next output is set to the output block information pointer 66.

During such an operation, input cancel, F
When an input / output error such as an overflow of the FIFO, an error in the input data, an output abort, and an underflow of the FIFO occurs, the same value is set in the input pointer 62 and the output pointer 63 and the input block information pointer 6 is set.
5 and the output block information pointer 66 are set to the same value, and the entire FIFO is initialized. Thus, the conventional F
In the error control technology of the IFO, no consideration is given to specifying the block data affected by the generated error, and even if the generated error is related to the specific block data, all of the errors in the FIFO are considered. Invalidates the block data.

[0008]

The problem to be solved is that the conventional technique cannot specify the block data affected by the error that has occurred. SUMMARY OF THE INVENTION It is an object of the present invention to solve the problems of the prior art, to invalidate only block data relating to an error that has occurred, and not to affect the input / output of other block data. And a FIFO circuit and a network configuration device using the FIFO circuit.

[0009]

In order to achieve the above object, the FIFO error control method according to the present invention comprises the following steps: (1) Input / output by first-in / first-out of data to / from a memory; Error control of a FIFO which outputs the own block data or other block data for each unit data while inputting each of the unit data obtained by dividing the block data of a finite size into a predetermined unit while performing the designation by the structure. When an input / output error occurs in block data x and y (step 401), it is determined whether or not the same block data is being input / output (steps 402 and 409). If data input / output is being performed, block data input / output is interrupted (steps 405, 40).
6) Change the values of the input pointer and the output pointer to the input destination address of the first unit data of the block data whose input / output has been interrupted (steps 407 and 408);
If the result of the determination is negative and the error occurred is an input error (step 402), the input of the block data is interrupted (step 403), and the value of the input pointer is changed to the value of the block data whose input has been interrupted. Change to the input destination address of the first unit data (step 404).
If the result of the determination is negative and the error occurred is an output error (step 409), the output of the block data is interrupted (step 410), and the value of the output pointer is changed to the value of the block data whose output has been interrupted. It is characterized in that the input destination address of the last unit data is changed to a value incremented by 1 (step 413) (step 414). Also,
(2) In the FIFO error control method described in the above (1), when an input / output error of block data occurs, there is a block data being input and a block data being output, and when inputting each block data, Input destination address (Fptr, IB
If (ptr, OBptr) match each other, it is determined that the same block data is being input / output. (3) In the FIFO error control method described in the above (1), input completion information (input completion state Ists (C)) at the time of completion of block data input and information being output during block data output ( The output status (Osts (O)) is set in association with the block data, and the error that occurred is an input error, and the output information corresponds to the block data that was input when the input error occurred. (Osts
(O)) is set, or the error that occurred is an output error, and the input completion information (Ists
If (C)) is set, it is determined that the same block data is being input / output. Also, (4)
In the FIFO error control method described in the above (3), the input completion information (input completion state Ists (C)) and the outputting information (outputting state Osts (O)) are input to the first unit data of the block data. It is characterized in that it is set in association with the destination address. (5) Input / output of data in a memory on a first-in first-out basis is performed by specifying an address in a ring structure using an input pointer and an output pointer, and unit data obtained by dividing finite-size block data into predetermined units. This is a FIFO error control method for outputting the unit data of the own block data or other block data for each unit data during each input, and when the input of the last unit data of the block data is completed, information indicating this input completion First step of registering (C) (input completion state Ists (C)) in association with the input destination address of the unit data at the head of the block data to the memory (step 204)
Registering information Osts (O) indicating that the block data is being output during the output of the block data in association with the input destination address of the head unit data of the block data. 302) and when an input prohibition event occurs during input of block data (step 401), information Osts (O) is registered in association with the input destination address of the head unit data of the block data being input. A third step (step 402) of determining whether or not there is no information, and if the information Osts (O) has not been registered in the determination of the third step, the input of block data is interrupted (step 403), and this input is performed. The fourth step (step 404) of setting the input destination address of the first unit data of the block data in which the data has been interrupted to the input pointer, and the third step Information in another Osts
If (O) is registered, the input and output of the block data are interrupted (steps 405 and 406), and the input destination address of the first unit data of the block data whose input / output is interrupted is indicated by the input pointer and the output pointer. In the fifth step (step 407), and when an output prohibition event occurs during the output of the block data (step 401), the information Ists is associated with the input destination address of the first unit data of the block data. A sixth step (step 409) of determining whether or not (C) is registered;
If the information Ists (C) is not registered in the determination of the sixth step, the output and input of the block data are interrupted (steps 405 and 406), and the input and output of the head unit data of the interrupted block data are interrupted. The seventh step (Step 407) of setting the input destination address to the input pointer and the output pointer, and if the information Ists (C) is registered in the determination of the sixth step, the output of the block data is interrupted ( Steps 410 and 411), information Ists associated with the block data whose output has been interrupted
Eighth step of deregistering (C) (step 412), incrementing the input destination address of the last unit data of the block data whose output has been interrupted by one (step 413), and setting the output pointer (step 413) 414), and when an input / output error of block data occurs, block data affected by this error is specified and invalidated. Further, the FIFO circuit of the present invention
(6) First-in first-out input / output of data to / from the memory is performed by designating an address in a ring structure using an input pointer and an output pointer, and divides block data of a finite size into predetermined units for each unit data. A FIFO circuit that outputs, during input, unit data of its own block data or other block data for each unit data,
When an input / output error of block data occurs, means (error detection / determination unit 55) for determining whether or not input / output of the same block data is being performed. Interrupting the input / output of the block data, changing the values of the input pointer and the output pointer to the input destination address of the first unit data of the block data whose input / output has been interrupted, and the result of the determination is negative, If the error occurred is an input error, the input of the block data is interrupted, the value of the input pointer is changed to the input destination address of the first unit data of the interrupted block data, and If the result is negative and the error occurred is an output error, the output of the block data is interrupted, and the value of the output pointer is Means for changing the input destination address of the last unit data to a value incremented by 1 (error processing unit 56). When an input / output error of block data occurs, block data affected by this error is specified. It is characterized by invalidation. (7) Input / output by first-in first-out of data to / from the memory is performed by specifying an address in a ring structure using an input pointer 2 (Iptr) and an output pointer 3 (Optr), and a block data of a finite size is stored. A FIFO circuit for outputting, for each unit data of its own block data or other block data, during input of each unit data divided into a predetermined unit, and inputting when inputting the first unit data of each block data. Register the address pointed to by the pointer,
In response to each of the registered addresses, input completion status information indicating that block data including the head unit data has been input up to the last unit data, and block data including the head unit data are being output. And a table (block information management table 4) for setting the output status information indicating that the block data is being input. The input information pointer 5 (IBptr) pointing to the registration position (x, x + 1, y) on the block information management table 4 of the address indicated by the address and the block information management table of the address indicated by the output pointer 3 of the block data being output Output information pointer 6 pointing to the registration position (x, x + 1, y) on
(OBptr), and when the input of the last unit data of the block data being input is completed, the input completion status information corresponding to the address on the block information management table 4 indicated by the input information pointer 5 (IBptr) When (IBptr (C)) is set and the output of the first unit data of the block data being output is started, the output status is set in accordance with the address on the block information management table 4 indicated by the output information pointer 6 (OBptr). The information (OBptr (O)) is set, and when the output of the last unit data of the block data being output is completed, the information is set corresponding to the address on the block information management table 4 indicated by the output information pointer 6 (OBptr). Input completion status information (IBpt
r (C)) and the output status information (OBptr (O)) are released, and when an input / output error of block data occurs, the input information pointer 5
(IBptr) and each address (x, x +) on the block information management table 4 indicated by the output information pointer 6 (OBptr).
(Y, Fptr) is the same, it is determined whether or not the same block data is being input / output when an error occurs.As a result of this determination, each address is the same and the same block data If input / output is in progress, input / output of the block data is interrupted, and the input pointer 2 and the output are stored in the address on the block information management table 4 indicated by both the input information pointer 5 (IBptr) and the output information pointer 6 (OBptr). If the value of the pointer 3 is changed, and if it is determined that each address is different and the error that has occurred is an input error, the input of the block data is interrupted and the block indicated by the input information pointer 5 (IBptr) is stopped. If the value of the input pointer 2 is changed to an address on the information management table 4 and the result of determination is that each address is different and the error occurred is an output error, The output of the data pointer is interrupted, the value of the output information pointer 6 (OBptr) is incremented by one, and the address of the output pointer 3 on the block information management table 4 indicated by the incremented output information pointer 6 (OBptr) is added. By changing the value, when an input / output error of the block data occurs, the block data affected by the error is specified and invalidated. Also,
(8) First-in first-out input / output of data to / from the memory is performed by the input pointer 2 (Iptr) and the output pointer 3
(Optr) is used to specify the address in a ring structure, and the unit data of the own block data or other block data is input during the input of each unit data obtained by dividing the finite block data into predetermined units. A FIFO circuit that performs an output for each block, registers an address pointed to by an input pointer when inputting the first unit data of each block data, and, corresponding to each registered address,
Input completion status information indicating that block data including the first unit data has been input up to the last unit data,
Also, a table (block information management table 4) for setting output status information indicating that block data including each head unit data is being output, and an input during block data input during block data input. If it is not inside, the registration position (x, x + 1,
y), and an output information pointer 6 pointing to the registered position (x, x + 1, y) on the block information management table 4 at the address pointed to by the output pointer 3 of the block data being output. (OBptr), and when the input of the last unit data of the block data being input is completed,
Input completion status information (IBptr (C)) is set corresponding to the address on the block information management table 4 pointed to by the input information pointer 5 (IBptr), and the output of the first unit data of the block data being output is started. , Output information pointer 6 (OBpt
r) sets the output status information (OBptr (O)) corresponding to the address on the block information management table 4 indicated by r), and completes the output of the last unit data of the block data being output.
Input completion status information (IBptr (C)) and output status information (OBptr (O)) set corresponding to the address on the block information management table 4 pointed to by the output information pointer 6 (OBptr)
Is released, and when an input error of the block data occurs, the output status information (OBptr) corresponding to the address on the block information management table 4 indicated by the input information pointer 5 (IBptr).
r (O)) is set, and when an output error of block data occurs, the output information pointer 6 (OB
Whether or not the same block data is being input / output during the occurrence of an error, depending on whether or not the input completion status information (IBptr (C)) is set corresponding to the address on the block information management table 4 indicated by (ptr). If the result of this determination is that the same block data is being input / output, the input / output of the block data is interrupted, and the block information indicated by both the input information pointer 5 (IBptr) and the output information pointer 6 (OBptr). If the values of the input pointer 2 and the output pointer 3 are changed to the addresses on the management table 4, and if the error occurred is an input error and the result of the determination indicates that the same block data is not being input / output, the block data Is interrupted, the value of the input pointer 2 is changed to the address on the block information management table 4 indicated by the input information pointer 5 (IBptr), and If there is an output error and the result of the determination is that the same block data is not being input / output, the output of the block data is interrupted and the address on the block information management table 4 indicated by the input information pointer 5 (IBptr) is Release the setting of the corresponding input completion status information (IBptr (C)), and set the value of the output information pointer 6 (OBptr) to 1
The output pointer 3 is added to the address on the block information management table 4 indicated by the incremented output information pointer.
When the input / output error of the block data occurs, the block data affected by the error is specified and invalidated. Further, a network configuration device of the present invention is (9) a network configuration device including at least a router or a hub, comprising the FIFO circuit according to any one of the above (6) to (8), and receiving a communication frame. When an output error occurs, a communication frame affected by the error is specified and invalidated.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, block data having a finite size is input for each unit data which is a basic unit of input / output to / from a FIFO. From the input, the output is performed for each unit data in the input order. Also, even if the output of the already input block data is not completed, when the next block data is input, whether the input of the block data is completed (input Completion status), input status indicating whether or not (input status),
Also, an output status indicating whether the output of the block data has been started (outputting state) or not (non-output state) is added to the block information.

That is, when the last unit data of the block data is input, the input block information pointer (IB
Set the input completion status (Ists (C)) to the input status of the block information pointed to by ptr), and when the output of the first data unit of the block data starts, the block information pointed by the output block information pointer (OBptr) Set the output status to the output status (Osts (O)), and when the last unit data of the block data is output, set the input status to the input status (Ists (L)) and not output to the output status Set the state (Osts (W)).

When an input prohibition event during block data input occurs, such as input cancellation from the input source, FIFO overflow, or input data abnormality, the block information pointed to by the input block information pointer (IBptr) If the output status (Osts) is not output (Osts (W)), the input of the remaining unit data of the block data is interrupted, and the input block information pointer (IB
The value of the head pointer (Fptr) of the block information indicated by (ptr) is set to the input pointer (Iptr).

When the input prohibition event occurs and the output status (Osts) of the block information pointed to by the input block information pointer (IBptr) is in the output state (Osts (O)), the remaining block data is output. Of the block information pointed by the input block information pointer (IBptr), the input pointer (Iptr), and the output pointer (Op).
tr), and set the output status (Ost) of the block information pointed to by the input block information pointer (IBptr).
Set the non-output state (Osts (W)) to s).

When an output abort event from an output destination or an output prohibition event during block data output such as FIFO underflow occurs, the input status (Ists) of the block information pointed to by the output block information pointer (OBptr). Is in the input completion state (Ists (C)), the output of the unit data is interrupted, and the output block information pointer (OB
Output status of block information pointed to by ptr) (Osts)
, The non-output state (Osts (W)) is set, the input status (Ists) is set to the input state (Ists (L)), and the output block information pointer (OBptr) is incremented by 1. The value of the head pointer (Fptr) of the block information indicated by the output block information pointer (OBptr) is set in the output pointer (Optr).

If an output prohibition event occurs and the input status (Ists) of the block information pointed to by the output block information pointer (OBptr) is the inputting state (Ists (L)), the remaining block data The input of unit data is interrupted, the output of unit data is interrupted, and the start pointer (Fptr), input pointer (Iptr), and output pointer (Optr) of the block information indicated by the output block information pointer (OBptr)
r) and the same value as the output block information pointer (O
Output status (Osts) of block information pointed to by Bptr)
To the non-output state (Osts (W)). As a result of such an operation, error processing is performed for block data affected by an input / output error.

An embodiment of the present invention relating to such a FIFO error control technique will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a configuration according to the present invention of a FIFO circuit for executing the FIFO error control method of the present invention. In FIG. 1, 1 is a FIFO main body as a memory, 2 is an input pointer (described as “Iptr” in the figure), 3 is an output pointer (described as “Optr” in the figure),
4 is a block information management table, 5 is an input block information pointer (described as "IBptr" in the figure), and 6 is an output block information pointer (described as "OBptr" in the figure).

The FIFO circuit of the present embodiment has an F
First-in first-out input / output of data to / from the IFO main unit 1 is performed by designating an address in a ring structure using an input pointer 2 and an output pointer 3, and each unit data obtained by dividing a finite block data into predetermined units. The input pointer 2 indicates the input destination address of the FIFO main unit 1 during the input of the unit data of the own block data or other block data for each unit data.
Each unit data of the block data is stored in the FIFO main unit 1 in the address unit indicated by the input pointer 2. The output pointer 3 indicates an output destination address of the FIFO main unit 1, and each unit data of the block data is transferred from the FIFO main unit 1 in an address unit indicated by the output pointer 3.

Block information management table 4 according to the present invention
Is a head pointer (Fptr) indicating the address of the head unit data on the FIFO main unit 1, and whether or not the input of the block data is completed (input completed state Ists (C)) (input state Ists (L) ), And the output of block data has started (outputting status Osts)
(O)) Registers and manages block information including an output status (Osts) indicating whether or not (unoutput state Osts (W)) for each block data. Input block information pointer 5
Indicates the address on the block information management table 4 of the block information corresponding to the next input or input block data. The output block information pointer 6 points to an address on the block information management table 4 of the block information corresponding to the block data being output.

A description will be given of an error control method according to the present invention for a FIFO circuit having such a configuration with reference to FIGS. FIG. 2 is a flowchart showing an operation example according to the present invention when block data is input to the FIFO circuit in FIG. 1. FIG. 3 is a flowchart showing an operation example according to the present invention when block data is output. 9 is a flowchart illustrating an operation example according to the present invention when an error occurs.

As shown in FIG. 2, in the block data input processing, first, when the input unit data is the head of the block data (step 201), the block information management table pointed to by the input block information pointer (IBptr) The value of the input pointer (Iptr) is input to the top pointer (Fptr) of the upper block information (step 202), and the input pointer (Iptr) is incremented by 1 (step 203). In step 201, if the input unit data is in the middle of block data,
Proceeding to 3, simply increment the input pointer (Iptr) by one.

In step 201, when the input unit data is the last block data, the input status (Ists) of the block information pointed to by the input block information pointer (IBptr) is set to the input completion state (C ) Is set (step 204). Then, as before, the input block information pointer (IBptr) is incremented by 1, and the address of the next block information to be input on the block information management table is set (step 205). To increase the input pointer (Iptr) by one.

Next, as shown in FIG. 3, in the block data output processing, first, when the unit data to be output is the head of the block data (step 301), the output block information pointer (OBptr ) Is set to the output status (Osts) of the block information on the block information management table indicated by () (step 302), and the output pointer (Optr) is incremented by 1 (step 303). If the output unit data is in the middle of the block data in step 301, the process directly proceeds to step 303, and the output pointer (Optr)
Is increased by one.

If the output unit data is the last block data in step 301, the input status (Ists) is set to the input status (I) as the operation according to the present invention (step 304), and the output is performed. Set the non-output state (W) to the status (Osts) (Step 3)
05), then the output block information pointer (OBptr)
Is incremented by 1 and an address on the block information management table 4 corresponding to the next output is set (step 306), and the routine proceeds to step 303, where the output pointer (Optr) is incremented by 1.

When error processing occurs in such a pointer and status management control state accompanying input / output of block data, as shown in FIG. 4, processing is performed according to the type of error that has occurred. That is, first, errors such as an input cancellation from the input source, an overblow of the FIFO 100, or an abnormality of the input data,
In the case where it is caused by the block data being input (step 4
01), and when the output status (Osts) of the block information indicated by the input block information pointer (IBptr) is not output (W) (step 402), the input of the remaining unit data of the block data is interrupted. (Step 40
3) The value of the head pointer (Fptr) of the block information pointed to by the input block information pointer (IBptr) is set to the input pointer (Iptr) (step 404).

In step 402, if the output status (Osts) of the block information indicated by the input block information pointer (IBptr) is in the output state (O), that is, if the same block data is being input / output, the block data The input of the remaining unit data is interrupted (step 405), and the output of the unit data is interrupted (step 40).
6) The value of the head pointer (Fptr) of the block information indicated by the input block information pointer (IBptr) (in this case, IBptr = OBptr) is set to the input pointer (Iptr) and the output pointer (Optr) ( (Step 407), the output status (Osts) of the block information pointed to by the input block information pointer (IBptr = OBptr) is set to a non-output state (W) (Step 408).

If it is determined in step 401 that an error is caused by the block data being output, such as an output abort from the output destination or an under-blow of the FIFO 100, a determination process in step 409 is performed.
Here, when the input status (Ists) of the block information indicated by the output block information pointer (OBptr) is the input completion state (C), the output of the unit data is interrupted (step 410), and the output block information pointer (OBptr) is output. ) Is set to the non-output state (W) as the output status (Osts) of the block information indicated by (step 411), and the input status (I) is set to the input status (Ists) (step 41).
2), the output block information pointer (OBptr) is incremented by 1 (step 413), and the head pointer (Fptr) of the block information indicated by the output block information pointer (OBptr)
Is set to the output pointer (Optr) (step 41).
4).

In step 409, if the input status (Ists) of the block information pointed to by the output block information pointer (OBptr) is in the input state (I), the processing from step 405 described above is performed. That is, in step 405, the input of the remaining unit data of the block data is interrupted, in step 406, the output of the unit data is interrupted, and in step 407, the block information indicated by the output block information pointer (OBptr = IBptr) Is set as an input pointer (Iptr) and an output pointer (Optr), and in step 408, an output block information pointer (OBptr = Iptr) is set.
Output status (Os) of block information indicated by Bptr)
ts) is set to a non-output state (W).

As described above, according to the procedure described with reference to FIGS.
Error processing corresponding to only block data relating to an input / output error can be performed. Next, an example will be described in which a FIFO circuit for performing error control according to such a procedure is applied to a network component device such as an inter-LAN connecting device represented by a router or a gateway.

FIG. 5 is a block diagram showing a configuration example of the FIFO circuit of the present invention and a network configuration device provided with the FIFO circuit. In this embodiment, the block data is regarded as a communication frame between computers, and the FIFO circuit of the present invention is applied to a network configuration device. The network configuration device of the present embodiment is used for a LAN (Local Area Network). A router that controls connection.

In FIG. 5, reference numeral 50 denotes an FI according to the present invention.
FO circuit, 51 is a memory serving as a FIFO main body, 52 is an input unit for controlling input of a communication frame to the memory 51, 53 is an output unit for controlling output of a communication frame from the memory 51, and 54 is an entire FIFO circuit 50. An FIFO control unit for performing operation control, 55 is an error detection / judgment unit according to the present invention, 56 is an error processing unit for performing error control according to the present invention, 57 is a first-in first-out process of a communication frame by the FIFO circuit 50 and a LAN as a router It is a main control unit that controls the entire apparatus including connection control between them.

The FIFO control unit 54 has the configuration shown in FIG. 1, and performs the input / output control of the communication frame by the input unit 52 and the output unit 53 according to the procedure shown in FIGS.
First-in first-out processing is performed for each unit data of the communication frame. The error detection / determination unit 55 detects the occurrence of an error during input / output control of a communication frame by the input unit 52 and the output unit 53, and performs the same communication between the input unit 52 and the output unit 53 when the error occurs. It is determined whether or not input / output is being performed on the frame, and the error processing unit 55 performs error control based on the determination result of the error detection / determination unit 55 according to the procedure shown in FIG.

That is, if the error detection / determination circuit 55 determines that the same communication frame is being input / output, the error processing unit 55 interrupts the input / output of the communication frame and returns the values of the input pointer and the output pointer. Is changed to the input destination address of the first unit data of the communication frame whose input / output has been interrupted. If the result of the determination by the error detection / determination circuit 55 is negative, and the generated error is an error associated with the input control of the input unit 52, the input of the communication frame is interrupted, and the value of the input pointer is changed. Is changed to the input destination address of the first unit data of the communication frame whose input has been interrupted.
If the result of the determination by the error detection / determination circuit 55 is negative, and if the generated error is an error associated with the output control of the output unit 53, the output of the communication frame is interrupted and the value of the output pointer is changed. Then, the input destination address of the last unit data of the communication frame whose output has been interrupted is changed to a value increased by one.

As described above with reference to FIGS. 1 to 5, in the FIFO error control method according to the present embodiment and the network configuration device using the FIFO circuit,
For each block data (communication frame), the address of the head unit data, and the input status (Ists) and the output status (Osts) are managed as block information, and error control using the information is performed, so that the communication frame is controlled. When an input / output error occurs, the communication frame affected by the error is specified and invalidated. As described above, when the error that occurred is related to specific block data, only the block data related to the generated error is invalidated without invalidating all the block data in the FIFO. It is possible not to affect the input / output of other block data.

The present invention is not limited to the embodiment described with reference to FIGS. 1 to 5, but can be variously modified without departing from the gist thereof. For example, in the above-described embodiment, when the head unit data of the block data is input, the value of the input pointer (Iptr) is set to the head pointer (Fptr).
When the input of the previous block data is completed, it is possible to set the value of “input pointer + 1” in the head pointer (Fptr).

Similarly, the input status (Ists)
Can be changed from the input completion state to the input state, or the output status (Osts) can be changed from the output state to the non-output state at a timing different from the above-described embodiment. That is, these changes are the initialization of the block information, and it is sufficient that the initialization be completed by the time the next block information is used.

In the embodiment shown in FIGS. 2 to 4, the input status (Ists) and the output status (Osts) of the block information management table 4 shown in FIG.
When an input / output error occurs, it is determined whether or not the same block data is being input / output, but the value of the input block information pointer (IBptr) 5 and the value of the output block information pointer (OBptr) 6 in FIG. A similar determination may be made depending on whether they match. Further, in the embodiment shown in FIG. 5, a router is described as an example of a network configuration device, but the present invention can be applied to other network devices such as a hub.

[0037]

According to the present invention, block data affected by an error that has occurred can be specified. When an error occurs, only block data relating to the error that has occurred is invalidated, and input / output of other block data is performed. Is not affected, and it is possible to efficiently deal with input / output errors.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a configuration according to the present invention of a FIFO circuit for executing a FIFO error control method of the present invention.

FIG. 2 is a flowchart showing an operation example according to the present invention when block data is input to the FIFO circuit in FIG. 1;

FIG. 3 is a flowchart illustrating an operation example according to the present invention when the FIFO circuit in FIG. 1 outputs block data;

FIG. 4 is a flowchart showing an operation example according to the present invention when an error occurs in the FIFO circuit in FIG. 1;

FIG. 5 is a block diagram illustrating a configuration example of a FIFO circuit of the present invention and a network configuration device including the FIFO circuit.

FIG. 6 shows a FIFO for performing error control of a conventional FIFO.
FIG. 3 is a block diagram illustrating a configuration example of a part related to error control of a circuit.

[Explanation of symbols]

1: FIFO main unit, 2: input pointer, 3: output pointer, 4: block information management table, 5: input block information pointer, 6: output block information pointer, 50:
FIFO circuit, 51: memory, 52: input section, 53: output section, 54: FIFO control section, 55: error detection / determination section, 56: error processing section, 57: main control section, 61: FI
FO body, 62: input pointer, 63: output pointer,
64: block information management table, 65: input block information pointer, 66: output block information pointer.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Toshihiko Muranoshi 3-19-2 Nishishinjuku, Shinjuku-ku, Tokyo Nippon Telegraph and Telephone Corporation

Claims (9)

[Claims] A unit data obtained by inputting / outputting data to / from a memory in a first-in first-out manner by specifying an address in a ring structure using an input pointer and an output pointer, and dividing block data of a finite size into predetermined units. This is an FIFO error control method for outputting, for each unit data, the own block data or another block data during each input, and when the input / output error of the block data occurs, the same block data is being input / output. It is determined whether or not, if the result of the determination is that the same block data is being input / output, the input / output of the block data is interrupted,
The value of the input pointer and the output pointer is changed to the input destination address of the first unit data of the block data for which the input / output is interrupted, and the result of the determination is negative,
And, if the generated error is an input error, the input of the block data is interrupted, and the value of the input pointer is changed to the input destination address of the first unit data of the block data whose input is interrupted, If the result of the determination is negative, and if the error occurred is an output error, the output of the block data is interrupted, and the value of the output pointer is changed to the last unit of the block data whose output has been interrupted. A FIFO error control method, wherein a data input destination address is changed to a value incremented by one. 2. The FIFO error control method according to claim 1, wherein when an input / output error of the block data occurs, there is a block data being input and a block data being output. A FIFO error control method, characterized in that it is determined that the input and output of the same block data are being performed if the set input destination addresses of the respective set head data match. 3. The FIFO error control method according to claim 1, wherein input completion information at the time of completion of input of the block data, output information during output of the block data, and the block data correspond to the block data, respectively. If the generated error is an input error and the output information is set corresponding to the block data input at the time of the input error, or if the generated error is an output error If the input completion information is set corresponding to the block data output at the time of occurrence of the output error, it is determined that the input / output of the same block data is being performed. Control method. 4. The FIFO error control method according to claim 3, wherein the input completion information and the output information are set in association with an input destination address of a head unit data of the block data. FIFO
Error control method. 5. A unit data obtained by inputting / outputting data to / from a memory in a first-in first-out manner by specifying an address in a ring structure using an input pointer and an output pointer, and dividing block data of a finite size into predetermined units. A FIFO error control method for outputting a unit data of the own block data or another block data during each input, wherein when the input of the last unit data of the block data is completed, information indicating the completion of the input is provided. Ists (C)
A first step of registering the block data in association with an input destination address of the first unit data of the block data to the memory, and during output of the block data, information Osts indicating that the block data is being output. (O) is registered in association with the input destination address of the head unit data of the block data, and when an input prohibition event occurs during the input of the block data, the block data being input is A third step of determining whether or not the information Osts (O) is registered in association with the input destination address of the first unit data of the first unit data; and determining the information Osts (O) in the determination of the third step. If not registered, the input of the block data is interrupted, and the input destination address of the first unit data of the block data whose input has been interrupted is set to the input pointer. A step of, the third
If the information Osts (O) is registered in the determination of the step, the input and output of the block data are interrupted, and the input destination address of the first unit data of the block data whose input / output is interrupted is input to the input unit. A fifth step of setting the pointer and the output pointer, and when an output inhibition event occurs during the output of the block data, the information Ists (C) is associated with the input destination address of the head unit data of the block data. ) Is registered, and if the information Ists (C) is not registered in the determination of the sixth step, the output and input of the block data are interrupted. A seventh step of setting the input destination address of the head unit data of the block data whose input / output has been interrupted to the input pointer and the output pointer; If the information Ists (C) is registered in the determination of the step, the output of the block data is interrupted, and the registration of the information Ists (C) associated with the block data whose output is interrupted is canceled. An eighth step of incrementing the input destination address of the last unit data of the block data whose output has been interrupted by one and setting the incremented address to the output pointer. A method for controlling an error of a FIFO, comprising identifying and invalidating block data affected by the error. 6. A unit data obtained by performing first-in first-out input / output of data to / from a memory by designating an address in a ring structure using an input pointer and an output pointer, and dividing block data of a finite size into predetermined units. A FIFO circuit for outputting, for each unit data of the own block data or another block data during each input, whether or not the same block data is being input / output when the above-mentioned block data input / output error occurs Means for determining whether the input / output of the block data is interrupted, and if the result of the determination indicates that the input / output of the same block data is in progress, the input / output of the input pointer and the output pointer is interrupted. Change to the input destination address of the unit data at the beginning of the block data, and if the result of the above determination is negative and the error If the input is an input error, the input of the block data is interrupted, the value of the input pointer is changed to the input destination address of the first unit data of the block data whose input is interrupted, and the result of the determination is No, and if the error occurred is an output error, the output of the block data is interrupted, and the value of the output pointer is changed to the input destination address of the last unit data of the block data whose output has been interrupted. And a means for changing the value of the block data to a value increased by one, and when an input / output error of the block data occurs, the block data affected by the error is specified and invalidated. 7. A unit data obtained by inputting / outputting data to / from a memory in a first-in first-out manner by specifying an address in a ring structure using an input pointer and an output pointer, and dividing block data of a finite size into predetermined units. A FIFO circuit for outputting, during each input, unit data of the own block data or other block data for each unit data, and registers an address pointed to by the input pointer at the time of inputting the first unit data of each block data. And input completion state information indicating that the block data including the head unit data has been input up to the last unit data corresponding to each of the registered addresses, and
A table for setting output status information indicating that block data including each head unit data is being output, and if the block data is being input,
If not being input, the input information pointer indicating the registration position on the table of the address pointed to by the input pointer of the block data to be input next, and the input information pointer indicating the address pointed to by the output pointer of the block data being output on the table An output information pointer that points to a registration position, and when the input of the last unit data of the block data being input is completed, the input completion state corresponding to the address on the table pointed to by the input information pointer At the start of output of the unit data at the beginning of the block data being output, the output status information is set in accordance with the address on the table pointed to by the output information pointer. When the output of the last unit data of the block data of the above is completed, the address on the table indicated by the output information pointer The input completion status information and the output status information set corresponding to the input data are released, and when an input / output error occurs in the block data, the input information pointer and the output information pointer point to the table. It is determined whether or not the same block data is being input / output at the time of the occurrence of the error, based on whether or not each of the addresses is the same. If output is being performed, input / output of the block data is interrupted, and the values of the input pointer and the output pointer are changed to addresses on the table pointed to by both the input information pointer and the output information pointer. As a result of the determination, if the addresses are different and the generated error is an input error, the input of the block data is interrupted. And changing the value of the input pointer to an address on the table pointed to by the input information pointer, and as a result of the determination, if the addresses are different and the error that has occurred is an output error, the block The output of the data is interrupted, the value of the output information pointer is incremented by one, and the value of the output pointer is changed to the address on the table indicated by the incremented output information pointer. Wherein when an input / output error occurs, the block data affected by the error is specified and invalidated. 8. A unit data obtained by inputting / outputting data to / from a memory in a first-in first-out manner by specifying an address using an input pointer and an output pointer in a ring structure, and dividing block data of a finite size into predetermined units. A FIFO circuit for outputting, during each input, unit data of the own block data or other block data for each unit data, and registers an address pointed to by the input pointer at the time of inputting the first unit data of each block data. And input completion state information indicating that the block data including the head unit data has been input up to the last unit data corresponding to each of the registered addresses, and
A table for setting output status information indicating that block data including each head unit data is being output, and if the block data is being input,
If not being input, the input information pointer indicating the registration position on the table of the address pointed to by the input pointer of the block data to be input next, and the input information pointer indicating the address pointed to by the output pointer of the block data being output on the table An output information pointer that points to a registration position, and when the input of the last unit data of the block data being input is completed, the input completion state corresponding to the address on the table pointed to by the input information pointer At the start of output of the unit data at the beginning of the block data being output, the output status information is set in accordance with the address on the table pointed to by the output information pointer. When the output of the last unit data of the block data of the above is completed, the address on the table indicated by the output information pointer The input completion status information and the output status information set corresponding to the input data are released, and when an input error of the block data occurs, the output corresponding to the address on the table pointed to by the input information pointer is released. Depending on whether or not the middle state information is set, when an output error of the block data occurs, whether or not the input completion state information is set corresponding to the address on the table pointed to by the output information pointer, It is determined whether or not the same block data is being input / output at the time of the error. If the result of the determination is that the same block data is being input / output, the input / output of the block data is interrupted, and The values of the input pointer and the output pointer are stored in the addresses on the table pointed to by both the pointer and the output information pointer. Further, if the generated error is an input error and the result of the determination is that the same block data is not being input / output, the input of the block data is interrupted, and the input To the address, change the value of the input pointer, and if the generated error is an output error, and the result of the determination is that the same block data is not being input / output, the output of the block data is interrupted. The setting of the input completion state information corresponding to the address on the table pointed to by the input information pointer is released, the value of the output information pointer is incremented by 1, and the address on the table pointed to by the output information pointer incremented by 1 By changing the value of the output pointer, when an input / output error occurs in the block data, FIFO characterized by identifying and invalidating data
circuit. 9. A network configuration device including at least a router or a hub, comprising the FIFO circuit according to claim 6, wherein when a communication frame input / output error occurs, the influence of the error occurs. A network configuration device for identifying and invalidating a communication frame to be received.