JPH1039831A - Driving circuit of display and display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To selectively realize improving luminance, the degradation of picture quality called as animation pseudo contours, and the reduction of power consumption, in a driving circuit performing multi-gradation display on a display of a single gradation display by dividing a video data signal of multi-gradation into plural sub-frames and making sustain-periods (light emitting period) in each sub-frame variable. SOLUTION: Sub-frame constitution corresponding to a video data signal being an input can be selectively changed in accordance with a sub-frame external control signal by a sub-frame variable processing section being one of constituting components. Therefore, picture data of sub-frame constitution being suitable for the video data signal can be sent to a display panel.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for driving a display panel constituted by a set of cells which are display elements having a memory function, and more particularly to a technique for performing multi-tone display in a plasma display panel. The present invention relates to a display driving circuit and a display device.

[0002]

2. Description of the Related Art In a single-tone display such as a PDP (plasma display panel) which can only display on / off, multi-gradation display is performed, so that one frame has a different luminance, in other words, sustain. It is composed of a plurality of sub-frames having different periods (emission periods) (for example, Japanese Patent Laid-Open No. 186927/1994).

The method of expressing gradation using such a sub-frame configuration has the disadvantage that the sustain period is shortened and the light emission luminance is reduced because an address period not related to light emission is required for the number of sub-frames. is there. Further, in PDP, there is a problem of deterioration of image quality called a moving image pseudo contour. Hereinafter, the generation principle of the moving image pseudo contour will be described with reference to FIG.

FIG. 12 (a) shows a single subframe configuration when displaying 128-, 127-, and 255-level images in the case of 256 gradations of 8 bits and 0 to 255 levels. Next, FIG. 12B shows a subframe configuration when images of 128 levels and 127 levels are continuously displayed. The gray level recognized by the human eye corresponds to a temporal integration value of light stimulating the eyes. Therefore, the portion where the 128-level and 127-level images are continuously displayed is shown in FIG.
Since it becomes equal to the temporal integration value of the 255 level light shown in FIG. 2 (a), it is recognized as a 255 level bright line by human eyes. This bright line is a moving image pseudo contour. The moving image pseudo contour is particularly conspicuous when there is a portion where the gradation of the moving image changes smoothly.

[0005]

When a gradation is expressed by using a plurality of sub-frames, it is impossible in principle to completely eliminate the moving image pseudo contour. However, as a method of mitigating a moving image false contour, a subframe configuration in which a sustain period is dispersed in one frame,
There have been proposed methods of increasing the number of subframes and concentrating the sustain period in one frame.

Also, in the current PDP, heat generation in the panel is a problem as cooling fins for heat dissipation are an important development factor. However, in order to fundamentally solve the problem related to heat generation, a technique for reducing power consumption in a panel is definitely required.

In this display driving circuit,
There is a demand for higher luminance, elimination of moving image false contours, and power saving. SUMMARY OF THE INVENTION It is an object of the present invention to achieve the above object by changing a subframe configuration according to a type of a video data signal.

[0008]

According to a first aspect of the present invention, a multi-gradation video data signal is divided into a plurality of sub-frames on a single-gradation display panel, and sustaining is performed in each sub-frame. A drive circuit for performing multi-gradation display by changing a period (light emission period), comprising a sub-frame variable processing unit that receives the video data signal and changes a sub-frame configuration according to a sub-frame external control signal. And the display panel can be driven by an output signal of the sub-frame variable processing unit.

According to a second aspect of the present invention, a multi-gradation video data signal is divided into a plurality of sub-frames on a single-gradation display panel, and the sustain period is varied in each sub-frame to perform multi-gradation display. A circuit for receiving the video data signal as input, and for determining a type of the video data signal; a signal discriminating circuit for inputting the video data signal; and changing a subframe configuration according to the type of video data signal. A subframe variable processing unit, having a switching circuit that receives the video data signal and the output signal of the subframe variable processing unit as input, and switches the input signals according to the output signal of the signal determination circuit; The display panel can be driven by an output signal of a switching circuit.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS.

(Embodiment 1) FIG. 1 shows a display driving circuit for explaining the configuration of the first invention. Conventionally,
The configuration of the subframe has a fixed format, and the subframe configuration is not changed by an external control signal. A feature of the drive circuit of the present invention is that it has a subframe variable processing unit that changes a subframe configuration in accordance with a subframe external control signal that controls a sustain period. This makes it possible to change the luminance corresponding to the video data signal according to the external control signal. FIG. 2 shows an embodiment of the subframe variable processing unit. The sub-frame data processing is performed on the input video data signal in the data processing unit in FIG. 2, but this processing is rewritable, and the processing method can be changed according to the use of the panel. And
In accordance with this processing method, the scan timing signal for driving the panel, the data transfer timing signal, and the control signal for the sustain period are made variable by the timing generator.
An example of the operation will be described later with reference to FIG.

This sub-frame variable processing circuit uses a moving image memory using a semiconductor memory when a short-time repetitive image is projected, calculates the video data in advance according to the sub-frame, and adjusts the timing. Can be realized by adding In this case, the subframe processing can be changed by changing the software for calculation.

Further, a general moving image in a display device requires real-time processing. An example of this specific structure is shown in FIG. 3 and will be described together with a driving circuit of a display panel. In FIG. 3, reference numeral 101 denotes a subframe variable processing unit;
Is a control data RAM, 103 is a memory control FPGA (Fi
eld Programmable Gate Array (104), frame memory 104, timing control FPGA (Field Programmable FPGA)
ble Gate Array), 106 is a display panel, 10
7 is a scan driver, 108 is a data driver, 10
9 is a sustain driver and 110 is a PDP cell.

The sub-frame variable processing unit 101 includes a control data RAM 102, a memory control FPGA 103, a frame memory 104, and a timing control FPGA 105. The output signals of the frame memory 104 and the timing control FPGA 105 are sent to the data driver 108, the scanning driver 107, and the sustain driver 109 of the display panel 106 in synchronization with each other.
As a result, the PDP cell is blinking.

Since the data in the control data RAM 102 can be rewritten, the logic of the memory control FPGA 103 can be changed according to the subframe external control signal. Therefore, by reading the data corresponding to one screen stored in the frame memory 104 by the logic of the FPGA changed according to the sub-frame external control signal, it is possible to change the arrangement of the data input to the panel and start the sustain. The end time can be controlled.

An example of the operation of the display driving circuit having the above-described features will be described below. The subframe configuration of the video data signal is selectively changed according to the external control signal. A specific operation will be described with reference to FIG. 4 taking a subframe configuration per frame in 127-level display as an example.

In the new method, for example, the lower 4 bits are not scanned, and the number of sub-frames per frame is reduced by the number of non-scanned bits (4 in this case), and the address period per frame that does not contribute to light emission is used. Is reduced and the sustain period is lengthened to increase the luminance by performing a sub-frame variable process.

If the lower bits are not scanned, the accuracy of the gradation expression is reduced, but the sustain period is increased by reducing the number of subframes, so that high luminance can be realized. In addition, the number of subframes can be increased from, for example, 8 subframes to 10 subframes by an external control signal in order to increase the accuracy of gradation expression and reduce moving image false contours.

According to the first invention, panels having the same structure
It is possible to provide a degree of freedom to select display characteristics such as luminance, gradation display, and moving image pseudo contour according to the application.

(Embodiment 2) FIG. 5 shows a display drive circuit for explaining a first configuration of an embodiment of the second invention. The features of this drive circuit include various signal discriminating circuits for discriminating the type of video data signal, a sub-frame variable processing unit that changes the sub-frame configuration according to the type of video data signal, and output signals of the various signal discriminating circuits. That is, a switching circuit for switching an input signal in response to the signal is provided. As a result, image data having a subframe configuration suitable for a video data signal can be sent to the panel.

The actual configuration, operation and effects of the display driving circuit will be described below with reference to FIGS.

FIG. 6 shows a display driving circuit for explaining the second configuration of the present invention. The features of this drive circuit are
5 corresponds to a moving image / still image determining circuit that determines whether a video data signal is a moving image signal or a still image signal.

The operation of the display driving circuit having the above features will be described below. Only when the video data signal is a moving image signal, in the case where images before and after a specific gradation in which a moving image false contour is likely to occur continue, a specific number of gradation levels is added and subtracted between these two consecutive frames.

For example, the difference between the conventional method and the new method will be compared more specifically with respect to the subframe configuration per two frames when 128 levels and 127 levels are continuously displayed in FIG. In this case, in the conventional method, a bright line (moving image pseudo contour) is generated for the reason described in the related art. Therefore,
The continuous 128-level and 127-level subframe configurations are changed to 131-level and 124-level subframes, for example, by adding 3 levels plus 3 levels, respectively, so that the sustain period is dispersed and the moving image pseudo contour is reduced. I do. Note that the sub-frame configuration of the still image signal in which the moving image pseudo contour does not occur as long as the user does not move his / her eyes has 128 levels and 127 levels as in the related art.

According to the present invention, since the sustain period can be dispersed, the moving image pseudo contour can be reduced.

FIG. 8 shows a display driving circuit for explaining the third structure of the present invention. The features of this drive circuit are
The PC for determining whether the video data signal is a low gradation signal (PC signal) of a computer or the like or a multi-gradation natural image signal (AV signal) of a television or the like is used by the various signal discrimination circuits in FIG. / AV signal discriminating circuit and PC
That is, subframe variable processing is performed on a signal.

The operation of the display driving circuit having the above features will be described below. Only when the video data signal is a PC signal, the following two types of operations can be selected for an image of a specific gradation in which a moving image false contour is likely to occur.

(Operation 1) Subframe scanning of a specific lower bit is not performed. (Operation 2) The subframe scanning of a specific lower bit is not performed, and the number of subframes of the PC signal is reduced from the number of subframes of the AV signal by the number of bits.

By these two operations, if the number of sub-frames is reduced without scanning the lower bits, the accuracy of gradation expression is reduced. However, according to the operation 1, the moving image of the PC image is obtained by concentrating the sustain period. The pseudo contour can be alleviated, and the power consumption in the drive circuit can be reduced by not scanning the lower bits. Further, according to the operation 2, since the sustain period per frame can be made longer than before, there is an optional effect that high luminance can be realized.

Referring to FIG. 9, the difference between the conventional method and the new method will be compared more specifically with respect to the subframe configuration per frame in 127-level display. The subframe configuration of the AV signal is the same as the conventional one. On the other hand, the following two subframe variable processes are performed on the PC signal. The first is a process in which the lower 4 bits are not scanned in the subframe, and the second is a process in which the lower 4 bits are not scanned and the number of the subframes is reduced by the number of bits.

FIG. 10 shows a display driving circuit for explaining the fourth structure of the present invention. The feature of this drive circuit is that the various signal discriminating circuits shown in FIG.
PC / AV that determines whether the signal is an AV signal
It is equivalent to a signal discrimination circuit, and performs subframe variable processing on an AV signal.

The operation of the display driving circuit having the above features will be described below. Only when the video data signal is an AV signal, the sub-frame variable processing unit compares the number of sub-frames of the AV signal with the number of sub-frames of the PC signal for an image of a specific gradation in which a moving image false contour is likely to occur. Increase. For example, with reference to FIG. 11, the difference between the conventional method and the new method will be compared more specifically regarding the subframe configuration per frame in the 127-level display. The subframe configuration of the PC signal has 256 gradations as in the related art. On the other hand, for an AC signal, this is a process of increasing the number of subframes to 10 compared to the conventional eight.

According to the present invention, since the number of sub-frames is increased, it is possible to reduce the moving image pseudo contour of the AC image.

In this embodiment, a plasma display panel is described as an example. However, a display using a liquid crystal or the like can be applied as long as it is a type that drives a display having an adaptive sub-frame configuration. .

[0035]

As described above, according to the first aspect of the present invention, it is possible to provide a panel having the same configuration with a degree of freedom in selecting display characteristics such as luminance, gradation display, and moving image pseudo contour according to the application. There is a great practical effect that it becomes possible.

According to the second aspect of the present invention, the sustain period is dispersed by changing the conventionally fixed sub-frame configuration according to the video data signal, and the temporal integration value of the light stimulating the human eyes is obtained. Are averaged, so that a remarkable effect can be obtained in reducing the moving image false contour.

According to the second aspect of the present invention, a low-bit sub-frame is not scanned with respect to a low-gradation PC signal, so that a selective effect for a user can be obtained as follows.

If the number of sub-frames is not changed, the sustain period in one frame is concentrated, so that the present invention has a remarkable effect in reducing the false contour of a moving image. Further, since subframe processing of lower bits is not required, the present invention is also effective in reducing power consumption in the driving circuit.

If the number of subframes is reduced instead of not performing subframe scanning of lower bits, the sustain period can be lengthened, so that high luminance can be realized.

According to the second aspect of the present invention, by increasing the number of subframes only for AV signals requiring high-definition and high-speed operation, address periods not directly related to light emission increase, and conversely, sustain periods. , The luminance decreases, but a remarkable effect is obtained in reducing the false contour of the moving image.

[Brief description of the drawings]

FIG. 1 is a block diagram of a display drive circuit showing a configuration of an embodiment of a first invention.

FIG. 2 is a block diagram for explaining a sub-frame variable processing unit;

FIG. 3 is a specific configuration diagram of FIG. 2;

FIG. 4 is a diagram showing an operation of the embodiment of the first invention;

FIG. 5 is a block diagram of a display driving circuit showing a first configuration of one embodiment of the second invention;

FIG. 6 is a block diagram of a drive circuit of the display showing the second configuration.

FIG. 7 is a diagram showing the operation of FIG. 6;

FIG. 8 is a block diagram of a drive circuit of the display showing the third configuration.

FIG. 9 is a diagram showing the operation of FIG. 8;

FIG. 10 is a block diagram of a drive circuit of a display for explaining the fourth configuration.

11 is an explanatory diagram of the operation in FIG.

12A and 12B are conceptual diagrams for explaining a moving image pseudo contour.

[Description of Signs] 101 Subframe variable processing unit 102 Control data RAM 103 Memory control FPGA (Field Programmable Gate)
Array) 104 Frame memory 105 Timing control FPGA (Field Programmable)
Gate Array) 106 Display panel 107 Scan driver 108 Data driver 109 Sustain driver 110 PDP cell

Claims (11)

[Claims] 1. A driving circuit for displaying a multi-gradation by dividing a multi-gradation video data signal into a plurality of sub-frames on a display panel of a single gradation display and varying a sustain period (light-emitting period) in each sub-frame. And a subframe variable processing unit that receives the video data signal as input and changes a subframe configuration according to a subframe external control signal, and can drive the display panel by an output signal of the subframe variable processing unit. A drive circuit for a display, comprising: 2. The sub-frame variable processing section receives a video data signal as an input, and in accordance with a sub-frame external control signal,
A data processing unit capable of rewriting data processing of a sub-frame of the video data signal; and a timing generation unit that generates a scanning timing signal, a data transfer timing signal, and a control signal for a sustain period according to the content of the data processing unit. The display driving circuit according to claim 1, wherein: 3. The sub-frame variable processing unit receives a video data signal as an input, and in response to a sub-frame external control signal,
2. The display driving circuit according to claim 1, wherein the data processing of the subframe of the video data signal is rewritable, and a control signal for a scanning timing, a data transfer timing, and a sustain period is generated according to the contents. 4. A driving circuit for displaying a multi-gradation by dividing a multi-gradation video data signal into a plurality of sub-frames on a display panel of a single gradation display and varying a sustain period in each sub-frame. Various signal discriminating circuits that receive the video data signal and determine the type of the video data signal, and a subframe variable processing unit that receives the video data signal and changes a subframe configuration according to the type of the video data signal And a switching circuit that receives the video data signal and the output signal of the sub-frame variable processing unit as input, and switches the input signals according to the output signal of the signal discriminating circuit. A display driving circuit for driving the display panel. 5. A moving picture / still picture discriminating circuit for discriminating whether a video data signal is a moving picture signal or a still picture signal, and when the video data signal is a moving picture signal, In the change of the sub-frame configuration by the sub-frame variable processing unit, the opportunity to change the sub-frame configuration for a specific gray level is limited, and when the video data signal is a still image signal, the sub-frame configuration is changed for all gray levels. The display driving circuit according to claim 4, wherein the frame configuration is not changed. 6. A signal discriminating circuit for discriminating whether a video data signal is a low gradation signal (PC signal) of a computer or the like or a multi-gradation natural image signal (AV signal) of a television or the like. When the subframe configuration is changed by the subframe variable processing unit, the video data signal
5. The display driving circuit according to claim 4, wherein a subframe configuration is changed between a signal and an AV signal. 7. When the video data signal is an AV signal, the subframe configuration is not changed for all gradations.
7. The display driving circuit according to claim 6, wherein when the video data signal is a PC signal, the sub-frame variable processing unit does not scan the lower-order bits of the sub-frame. 8. When the video data signal is an AV signal, the subframe structure is not changed for all gradations.
7. The display driving circuit according to claim 6, wherein when the video data signal is a PC signal, the number of subframes of the PC signal is made smaller than the number of subframes of the AV signal by the subframe variable processing unit. . 9. When the video data signal is a PC signal, the subframe configuration is not changed for all gradations.
7. The display driving circuit according to claim 6, wherein when the video data signal is an AV signal, the number of subframes of the AV signal is made larger than the number of subframes of the PC signal by the subframe variable processing unit. . 10. A multi-level display by dividing a multi-level video data signal into a plurality of sub-frames and varying a sustain period (light emission period) in each sub-frame. A drive circuit for displaying a toned image, wherein the drive circuit has a subframe variable processing unit that receives the video data signal as input and changes a subframe configuration according to a subframe external control signal; A display device for driving the display means by an output signal of the display device. 11. A display means for displaying a single gradation, and a drive for dividing the multi-gradation video data signal into a plurality of sub-frames on the display means and varying the sustain period in each sub-frame to perform the multi-gradation display. A driving circuit, which receives the video data signal as input, and various signal discriminating circuits that determine the type of the video data signal; A sub-frame variable processing unit that changes the configuration, a switching circuit that receives the video data signal and the output signal of the sub-frame variable processing unit as inputs, and switches the input signals according to the output signal of the signal determination circuit; A display device, wherein the display means is driven by an output signal of the switching circuit.