JPH10336749A - Intermittent operation method for condition continuous updater - Google Patents
Intermittent operation method for condition continuous updaterInfo
- Publication number
- JPH10336749A JPH10336749A JP9146473A JP14647397A JPH10336749A JP H10336749 A JPH10336749 A JP H10336749A JP 9146473 A JP9146473 A JP 9146473A JP 14647397 A JP14647397 A JP 14647397A JP H10336749 A JPH10336749 A JP H10336749A
- Authority
- JP
- Japan
- Prior art keywords
- state
- register
- time
- update
- stopped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は例えばＣＤＭＡ
（符号分割多元接続）移動通信における移動機に適用さ
れ、時間と共に状態を更新させる必要がある状態連続更
新器を間欠的に動作させる方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention
(Code division multiple access) The present invention relates to a method of intermittently operating a state continuous updater which is applied to a mobile device in mobile communication and needs to update a state with time.
【０００２】[0002]
【従来の技術】通信の分野では、送信側と受信側が適切
なタイミング関係を保持し、通信を維持するために常に
互いに状態の管理が必要である。状態を保持するレジス
タとしては、例えば情報ビット数を数える場合はカウン
タ、符号系列を発生させるにはシフトレジスタなどがあ
る。2. Description of the Related Art In the field of communication, it is necessary for a transmitting side and a receiving side to always maintain an appropriate timing relationship, and to maintain a state of each other in order to maintain communication. Examples of the register for holding the state include a counter for counting the number of information bits and a shift register for generating a code sequence.
【０００３】例えば、直接拡散法のＣＤＭＡ方式では、
送信側から送信された信号は長い周期を持った拡散コー
ドにより拡散される。拡散コードはシフトレジスタによ
り生成される。受信側では、送信側の拡散コードと同じ
タイミング、同じパターンの拡散コードを用いて受信信
号を逆拡散させる必要がある。このため直接拡散法のＣ
ＤＭＡ方式で待機中の消費電力を少なくするために間欠
受信を行う際、無線機の受信回路が動作中であるときだ
けでなく、停止中でも拡散コード発生用のシフトレジス
タを動作させ、送信側の拡散コードと位相（タイミン
グ）を一致させた状態を保持する必要があった。For example, in the CDMA system of the direct spreading method,
The signal transmitted from the transmitting side is spread by a spreading code having a long period. The spreading code is generated by a shift register. On the receiving side, it is necessary to despread the received signal using the same timing and the same pattern of spreading code as the transmitting side spreading code. Therefore, the direct diffusion method C
When performing intermittent reception in order to reduce power consumption during standby in the DMA system, the shift register for generating a spreading code is operated not only when the receiving circuit of the wireless device is operating but also when the receiving circuit is stopped, and the transmitting side is operated. It was necessary to maintain the state where the phase (timing) and the spreading code were matched.
【０００４】また、周波数ホッピング法のＣＤＭＡ方式
では、送信部の信号は長い周期を持ったホッピングパタ
ーンの搬送波により拡散され、送信される。受信側で
は、送信側のホッピングパターンと同じタイミング、同
じパターンで局部発振波を発生させることにより逆拡散
を行う必要がある。このため、周波数ホッピング法のＣ
ＤＭＡ方式で間欠受信を行う際、無線機の受信回路が動
作中であるときだけでなく、停止中でも常にホッピング
パターンを更新させ、送信側のホッピングパターンと位
相（タイミング）を常時一致させている必要があった。[0004] In the CDMA system of the frequency hopping method, a signal of a transmitting section is spread and transmitted by a carrier having a hopping pattern having a long cycle. On the receiving side, it is necessary to perform despreading by generating a local oscillation wave with the same timing and the same pattern as the hopping pattern on the transmitting side. Therefore, the frequency hopping method C
When performing intermittent reception using the DMA method, it is necessary to always update the hopping pattern even when the receiving circuit of the wireless device is operating as well as when it is stopped, so that the phase (timing) matches the hopping pattern on the transmitting side. was there.
【０００５】また、伝送情報の秘匿のためには送信側の
ディジタルデータにスクランブル回路によって秘匿コー
ドを加える。受信側のデスクランブル回路では、受信デ
ータに送信側の秘匿コードと同じ種類で同じ位相（タイ
ミング）の秘匿コードを加える必要がある。このため、
受信側のデスクランブル回路では、受信回路が動作中で
あるときだけでなく、停止中でもデスクランブル回路を
動作させ、送信側の秘匿コードと位相を一致させる必要
があった。[0005] In order to conceal transmission information, a confidential code is added to digital data on the transmission side by a scramble circuit. In the descrambling circuit on the receiving side, it is necessary to add a concealment code of the same type and the same phase (timing) as the concealment code on the transmission side to the received data. For this reason,
In the descrambling circuit on the receiving side, it is necessary to operate the descrambling circuit not only when the receiving circuit is operating but also when the receiving circuit is stopped, and to match the phase with the secret code on the transmitting side.
【０００６】移動体通信の無線機は、間欠受信と呼ばれ
る技術が用いられている。間欠受信とは、待ち受け中、
受信回路の動作と停止を繰り返す技術である。受信回路
の動作と停止の時間を適当な値にすることにより、無線
機の消費電力の大幅な低減を図ることができる。[0006] A wireless device for mobile communication uses a technique called intermittent reception. Intermittent reception means that
This is a technique that repeats the operation and stop of the receiving circuit. By setting the operation and stop times of the receiving circuit to appropriate values, the power consumption of the wireless device can be significantly reduced.
【０００７】[0007]
【発明が解決しようとする課題】ところが、受信時に使
用するレジスタ値を常に更新する必要のある通信方式で
は、間欠受信を行う場合に、レジスタ以外の受信回路を
停止させた場合においてもレジスタは常に動作させ、レ
ジスタ値を更新する必要があり、消費電力が増加してし
まう欠点があった。However, in a communication system in which a register value used at the time of reception needs to be constantly updated, the register is always kept at the time of intermittent reception even when a receiving circuit other than the register is stopped. It is necessary to operate and update the register value, and there is a disadvantage that power consumption increases.
【０００８】この発明は、前述した各種の事例のよう
に、時間経過と共にレジスタの状態を更新させる必要が
ある状態連続更新器において、その動作を間欠的に行
い、しかもその動作中は、停止中を加えた状態連続更新
が保持される間欠動作方法を提供することを目的とす
る。According to the present invention, as in the various cases described above, in a state continuous updater which needs to update the state of a register with the passage of time, the operation is performed intermittently, and the operation is stopped during the operation. It is an object of the present invention to provide an intermittent operation method in which a state continuous update to which the above is added is held.
【０００９】[0009]
【課題を解決するための手段】請求項１の発明によれば
動作停止時は、その時のレジスタの状態から次に動作開
始時の状態を求め、その求めた状態をレジスタに設定
し、これを保持したまま動作を停止し、動作開始時には
先に設定されたレジスタの状態より動作を開始する。According to the first aspect of the present invention, when the operation is stopped, the state at the start of the operation is obtained from the state of the register at that time, and the obtained state is set in the register. The operation is stopped while the data is held, and when the operation is started, the operation is started from the previously set register state.
【００１０】請求項２の発明によれば動作停止時に、そ
の時のレジスタの状態を保持したまま動作を停止し、動
作開始時にその時のレジスタの状態から、その直前の動
作停止から現在までの時間経過に応じた更新状態を求
め、この更新状態をレジスタに設定して動作を開始す
る。請求項３の発明は前記請求項１又は２の方法を実施
するために必要な機能構成であって、レジスタの状態を
読み出す手段と、その読み出した状態をもとに、これよ
り与えられた時間に、レジスタの更新されるべき状態を
計算する手段と、その計算された更新されるべき状態を
レジスタに設定する手段とが設けられる。According to the second aspect of the present invention, when the operation is stopped, the operation is stopped while holding the state of the register at that time, and when the operation is started, the time elapsed from the immediately previous operation stop to the present time from the state of the register at that time. Is obtained, and the operation is started by setting the updated state in the register. According to a third aspect of the present invention, there is provided a functional configuration necessary for implementing the method of the first or second aspect, wherein a means for reading out the state of the register and a time given based on the read out state are provided. Means for calculating the state of the register to be updated and means for setting the calculated state to be updated in the register.
【００１１】[0011]
【発明の実施の形態】この発明の実施の形態を直接拡散
法のＣＤＭＡ方式無線機に適用した場合について説明す
る。この種の無線機は図３に示すように、アンテナ１１
よりの受信信号は増幅器１２で増幅され、周波数変換器
１３で局部信号により周波数変換され、その変換出力で
はＡＤ変換器１４でディジタル信号に変換され、更に逆
拡散器１５で拡散コード生成器１６よりの拡散コードに
より逆拡散され、その逆拡散出力は信号処理器１７で信
号処理され、端末インタフェース部１８を通じてスピー
カやパソコンなどの端末（図示せず）へ供給される。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A case where an embodiment of the present invention is applied to a CDMA radio apparatus using a direct spreading method will be described. This type of wireless device has an antenna 11 as shown in FIG.
The received signal is amplified by an amplifier 12, frequency-converted by a local signal by a frequency converter 13, converted into a digital signal by an AD converter 14, and further converted by a spreading code generator 16 by a despreader 15. The despread output is subjected to signal processing by a signal processor 17 and supplied to a terminal (not shown) such as a speaker or a personal computer through a terminal interface unit 18.
【００１２】拡散コード生成器１６は例えば図３Ｂに示
すようにシフトレジスタ２１の終段Ｓｅより拡散コード
が出力されると共にその出力と途中のシフト段の出力と
の排他的論理和が回路２２でとられ、その出力が初段Ｓ
ｉに帰還入力される。初期値として各シフト段にすべて
が０でないレジスタ値が入力され、シフトクロックごと
に１段づつ終段Ｓｅ側にシフトされ、そのシフトごと
に、シフトレジスタ２１の値（状態）が更新される。The spreading code generator 16 outputs a spreading code from the last stage Se of the shift register 21 as shown in FIG. 3B, and an exclusive OR of the output of the spreading code and the output of the intermediate shift stage is generated by a circuit 22. And its output is the first stage S
The signal is fed back to i. A register value that is not all 0 is input to each shift stage as an initial value, and is shifted to the end stage Se by one stage for each shift clock, and the value (state) of the shift register 21 is updated for each shift.
【００１３】拡散コードにより決った無線チャネルのみ
が端末インタフェース部１８へ出力される。送信側の拡
散コードと同期した拡散コードにより逆拡散をする必要
があり、図に示していない同期手段で拡散コード生成器
１６は受信信号の拡散コードに同期するようになされて
いる。しかも、この同期は常に維持する必要がある。間
欠受信を行う点からは、受信動作停止時には、拡散コー
ド生成器１６も、停止した方が消費電力の点から好まし
い。しかし、送信側の拡散コードとの同期を維持する点
から、図３Ｃに示すように請求項３の発明の実施例では
シフトレジスタ２１のレジスタ値（状態）を随時読み出
すことができる機能２３が設けられ、その読み出したレ
ジスタ値から、停止時間に応じた更新すべきレジスタ値
がレジスタ値計算機能２４で計算され、またその計算さ
れた更新すべきレジスタ値を随時、シフトレジスタ２１
に設定機能２５により設定することができるようにされ
る。Only the radio channel determined by the spreading code is output to the terminal interface unit 18. It is necessary to perform despreading with a spreading code synchronized with the spreading code on the transmitting side, and the spreading code generator 16 is synchronized with the spreading code of the received signal by a synchronization means not shown in the figure. Moreover, it is necessary to maintain this synchronization at all times. From the viewpoint of performing intermittent reception, it is preferable that the spread code generator 16 be stopped when the reception operation is stopped, in terms of power consumption. However, in order to maintain synchronization with the spread code on the transmission side, a function 23 capable of reading the register value (state) of the shift register 21 at any time is provided as shown in FIG. From the read register value, the register value to be updated according to the stop time is calculated by the register value calculating function 24, and the calculated register value to be updated is shifted from the shift register 21 as needed.
Can be set by the setting function 25.
【００１４】請求項１の発明を適用すると、図１に示す
ような手順で処理がなされる。即ちまずレジスタ２１を
動作状態にし（Ｓ１）、また受信回路も動作状態にする
（Ｓ２）。その後、シフトクロックが発生するとレジス
タ２１を１ビットシフトし（Ｓ３）、受信回路をＯＦＦ
とする時刻になったかを調べ（Ｓ４）、その時刻になっ
ていなければステップＳ３に戻り、つまりシフトクロッ
クが来るとレジスタ２１を１ビットシフトし、再びＯＦ
Ｆ時刻になったかを調べる（Ｓ４）。ここでＯＦＦ時刻
になると、その時のレジスタ２１のレジスタ値を読み出
し機能２３で読み取り、計算機能２４へ与える（Ｓ
５）。計算機能２４は、次に受信回路をＯＮにする時刻
までにレジスタ２１をシフトクロックでシフトさせ、つ
まり状態更新した時のレジスタ値（更新状態）を計算す
る（Ｓ６）。この更新レジスタ値を設定機能２５でレジ
スタ２１に設定し（Ｓ７）、その後、レジスタ２１の動
作を停止し（Ｓ８）、また受信回路の動作を停止する
（Ｓ９）。ただレジスタ２１のレジスタ値は先に設定さ
れた更新レジスタ値に保持されている。When the invention of claim 1 is applied, the processing is performed according to the procedure shown in FIG. That is, first, the register 21 is set to the operating state (S1), and the receiving circuit is also set to the operating state (S2). Thereafter, when a shift clock is generated, the register 21 is shifted by one bit (S3), and the receiving circuit is turned off.
(S4). If not, the process returns to step S3. That is, when the shift clock arrives, the register 21 is shifted by one bit, and the OF is again turned on.
It is checked whether the time has reached F (S4). Here, when the OFF time comes, the register value of the register 21 at that time is read by the read function 23 and is given to the calculation function 24 (S
5). The calculation function 24 shifts the register 21 by the shift clock until the next time the receiving circuit is turned on, that is, calculates the register value (updated state) when the state is updated (S6). This update register value is set in the register 21 by the setting function 25 (S7), and thereafter, the operation of the register 21 is stopped (S8), and the operation of the receiving circuit is stopped (S9). However, the register value of the register 21 is held at the previously set update register value.
【００１５】この状態で次に受信回路を動作させるべき
時刻、つまりＯＮ時刻になるのを待つ（Ｓ１０）。ＯＮ
時刻になると、ステップＳ１に移り、前記動作を再開す
る。この時、レジスタ２１は先に設定された更新レジス
タ値からシフト動作を行う。つまり、レジスタ２１は前
記動作停止を行わずに動作を継続していたと同一のレジ
スタ値で動作を再開する。よって送信側の拡散コードと
の同期は維持される。In this state, it waits until the next time when the receiving circuit should be operated, that is, the ON time (S10). ON
When the time comes, the process proceeds to step S1, and the operation is restarted. At this time, the register 21 performs the shift operation from the previously set update register value. In other words, the register 21 resumes the operation with the same register value as if the operation was continued without stopping the operation. Therefore, synchronization with the spread code on the transmission side is maintained.
【００１６】なお計算機能２４による計算は次のように
行う。例えば図３Ｂに示した拡散コード生成器のシフト
レジスタ２１の各シフト段に“１”が設定された状態に
あるとする。この状態からレジスタ２１をｎ段（ｎ＝
１，２，…）シフトさせた時のレジスタ値Ｒ（ｎ）は次
式で与えられる。 ただし、和は排他的論理和とする。The calculation by the calculation function 24 is performed as follows. For example, assume that “1” is set in each shift stage of the shift register 21 of the spreading code generator shown in FIG. 3B. From this state, the register 21 is stored in n stages (n =
The register value R (n) when shifted by (1, 2,...) Is given by the following equation. However, the sum is an exclusive OR.
【００１７】例えばｎ＝３であれば つまり更新レジスタ値は０００１１となる。予め停止時
間が知られており、その停止時間に応じてレジスタ２１
を更新すべきクロック数（シフト回数）ｎが決まるた
め、このｎに対する更新レジスタ値を予め計算しておけ
ば、短時間で更新レジスタ値を求めることができる。For example, if n = 3 That is, the update register value becomes 00011. The stop time is known in advance, and the register 21 is set according to the stop time.
Since the number of clocks (the number of shifts) n for updating is determined, if the update register value for this n is calculated in advance, the update register value can be obtained in a short time.
【００１８】本演算は簡単なロジック回路で実現できる
ので、一回の行列の計算を１０-8ｓ程度で終了すること
が出来る。ＣＤＭＡ方式におけるシフトレジスタは１０
-6ｓ程度を単位として動作するから、行列の計算時間
は、シフトレジスタの１クロックよりも十分小さい。ま
た、レジスタへの書き込みや、読み出しもシフトレジス
タの１クロックの計算時間よりも十分小さい。従って、
ＯＦＦ時刻になり、次のシフトクロックが発生する前
に、更新レジスタ値を計算して、レジスタ２１に設定し
た後、シフトレジスタ２１をＯＦＦにすることができ
る。Since this operation can be realized by a simple logic circuit, one matrix calculation can be completed in about 10 −8 s. Shift register in CDMA system is 10
Since the operation is performed in units of about -6 s, the calculation time of the matrix is sufficiently smaller than one clock of the shift register. Further, writing and reading to and from the register are sufficiently shorter than the calculation time of one clock of the shift register. Therefore,
At the OFF time, before the next shift clock is generated, the update register value is calculated and set in the register 21, and then the shift register 21 can be turned off.
【００１９】次に請求項２の発明の実施例を図２を参照
して説明する。レジスタ２１を動作状態とし（Ｓ１）、
かつ受信回路を動作状態とする（Ｓ２）。シフトクロッ
クが発生するとレジスタ２１を１ビットシフトし（Ｓ
３）、動作停止時刻（ＯＦＦ時刻）になったかを調べ
（Ｓ４）、ＯＦＦ時刻になっていなければステップＳ３
に戻り、ＯＦＦ時刻になれば、レジスタ２１の動作を停
止し、その時のレジスタ値を保持し（Ｓ５）、また受信
回路の動作を停止する（Ｓ６）。次に動作させる時刻
（ＯＮ時刻）になるのを待つ（Ｓ７）。ＯＮ時刻になる
と、レジスタ２１のレジスタ値、つまり直前に動作停止
させた時のレジスタ値を読み出し機能２３で読み出し
（Ｓ８）、このレジスタ値をもとに、その動作停止時か
ら、現時刻まで連動的に動作していた場合の更新レジス
タ値を計算機能２４で計算し（Ｓ９）、その更新レジス
タ値を設定機能２５によりレジスタ２１に設定してステ
ップＳ１に戻る（Ｓ１０）。Next, an embodiment of the present invention will be described with reference to FIG. The register 21 is set to the operating state (S1),
At the same time, the receiving circuit is brought into an operating state (S2). When the shift clock is generated, the register 21 is shifted by one bit (S
3) It is checked whether the operation stop time (OFF time) has come (S4), and if not, step S3
When the OFF time comes, the operation of the register 21 is stopped, the register value at that time is held (S5), and the operation of the receiving circuit is stopped (S6). It waits for the next operation time (ON time) (S7). When the ON time comes, the register value of the register 21, that is, the register value at the time when the operation was stopped immediately before is read by the reading function 23 (S8), and based on this register value, the operation is interlocked from the time when the operation is stopped until the current time. The update function is calculated by the calculation function 24 (S9), the updated register value is set in the register 21 by the setting function 25, and the process returns to step S1 (S10).
【００２０】この動作により、動作停止後、受信回路及
びレジスタ２１を再動作させると、この時の拡散コード
は、その前に同期していた送信側の拡散コードと、同期
したものとなる。拡散コード発生器における、レジスタ
の状態（レジスタ値）、更新のみならず、レジスタ値を
連続的に更新させる必要がある場合（従来技術の項で述
べた各種の場合など）においてもレジスタを一定時間停
止させ、状態更新動作を再開させる際に、停止させるこ
となく、連続的に動作していた場合と、同一の更新状態
（レジスタ値）からレジスタの状態更新動作を再開させ
ることをこの発明により行うことができる。With this operation, when the receiving circuit and the register 21 are operated again after the operation is stopped, the spreading code at this time is synchronized with the spreading code on the transmitting side which has been synchronized before. In the spreading code generator, not only the state of the register (register value) and updating, but also when the register value needs to be continuously updated (such as various cases described in the section of the prior art), the register is kept for a certain period of time. According to the present invention, when the operation is stopped and the state update operation is restarted, the register update operation of the register is restarted from the same update state (register value) as in the case where the operation is continuously performed without stopping. be able to.
【００２１】[0021]
【発明の効果】以上述べたようにこの発明によれば、レ
ジスタの状態更新を停止させ再開することを繰返して
も、その再開時に、停止させることなく連続的に状態更
新動作を行っている場合の更新状態から状態更新動作を
再開することができ、従って、この更新動作停止中にそ
の更新動作のための各機能素子への電力の供給を停止す
ることができ、それだけ電力の消費を小とすることがで
きる。特に実施例のように携帯電話機では電源の消耗を
なるべく小さくすることが望まれており、この発明によ
れば間欠受信の受信回路動作停止中は拡散コード生成器
の動作も停止することができ、その効果は頗る大であ
る。As described above, according to the present invention, even if the updating of the register state is repeatedly stopped and restarted, the state updating operation is continuously performed without stopping at the restart. State update operation can be resumed from the update state of the above, so that the supply of power to each functional element for the update operation can be stopped during this update operation stop, thereby reducing power consumption. can do. In particular, as in the embodiment, it is desired that the power consumption of the mobile phone be reduced as much as possible. According to the present invention, the operation of the spread code generator can be stopped while the operation of the receiving circuit for the intermittent reception is stopped. The effect is very large.
【図１】請求項１の発明の実施例の手順を示す流れ図。FIG. 1 is a flowchart showing a procedure according to an embodiment of the present invention.
【図２】請求項２の発明の実施例の手順を示す流れ図。FIG. 2 is a flowchart showing a procedure according to an embodiment of the present invention;
【図３】ＡはＣＤＭＡ方式携帯無線機の概略機能構成を
示すブロック図、Ｂは図３中の拡散コード生成器１６の
例を示す図、Ｃはこの発明の状態連続更新器の実施例の
要部を示すブロック図である。3A is a block diagram showing a schematic functional configuration of a CDMA portable radio, FIG. 3B is a diagram showing an example of a spread code generator 16 in FIG. 3, and FIG. 3C is an embodiment of a state continuous updater according to the present invention. FIG. 3 is a block diagram showing a main part.
Claims (3)
間と共に更新する必要がある状態連続更新器に対し、前
記状態の更新を保持しながら、間欠的に動作させる方法
であって、 動作停止時に、その時のレジスタの状態から次に動作開
始時のレジスタの状態を求め、 上記求めた動作開始時のレジスタの状態を上記レジスタ
に設定して動作を停止し、 動作開始時に、上記設定されたレジスタの状態から動作
を開始することを特徴とする状態連続更新器の間欠動作
方法。1. A method for intermittently operating a state continuous updater, which needs to update a state over time with a state held in a register, while maintaining the state update, comprising: Sometimes, the state of the register at the start of the next operation is obtained from the state of the register at that time, the state of the register at the start of the operation obtained above is set in the register, and the operation is stopped. An intermittent operation method of a state continuous updater, wherein the operation is started from a state of a register.
間と共に更新する必要がある状態連続更新器に対し、前
記状態の更新を保持しながら、間欠的に動作させる方法
であって、 動作停止時に、その時の上記レジスタの状態を保持して
動作を停止し、 動作開始時にその直前の動作停止からの時間経過に応じ
て、上記レジスタの状態から、動作再開時の状態を求
め、 その求めた動作再開時の状態を上記レジスタに設定して
動作を開始することを特徴とする状態連続更新器の間欠
動作方法。2. A method for intermittently operating a state continuous updater which needs to update its state with time while holding the state in a register and holding said state update, comprising: At the time, the operation is stopped while holding the state of the register at that time, and at the time of operation start, the state at the time of operation restart is obtained from the state of the register according to the lapse of time from the immediately preceding operation stop, and the obtained state is obtained. An intermittent operation method for a state continuous updater, wherein a state at the time of restart of operation is set in the register and operation is started.
の状態を更新させる必要がある状態連続更新器におい
て、 上記レジスタの状態を読み出す手段と、 上記読み出された状態をもとにこれより与えられた時間
に上記レジスタの更新されるべき状態を計算する更新状
態計算手段と、 上記計算された更新されるべき状態を上記レジスタに設
定する手段とを具備することを特徴とする状態連続更新
器。3. A continuous state updater which needs to hold a state in a register and update the state with time. A means for reading the state of the register, and a means for reading the state based on the read state. Update state calculating means for calculating the state of the register to be updated at a set time; and means for setting the calculated state of the register to be updated in the register. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14647397A JP3284082B2 (en) | 1997-06-04 | 1997-06-04 | Intermittent operation method of continuous state updater |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14647397A JP3284082B2 (en) | 1997-06-04 | 1997-06-04 | Intermittent operation method of continuous state updater |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10336749A true JPH10336749A (en) | 1998-12-18 |
| JP3284082B2 JP3284082B2 (en) | 2002-05-20 |
Family
ID=15408443
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14647397A Expired - Lifetime JP3284082B2 (en) | 1997-06-04 | 1997-06-04 | Intermittent operation method of continuous state updater |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3284082B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003529272A (en) * | 2000-03-29 | 2003-09-30 | モトローラ・インコーポレイテッド | Method and apparatus for call recovery after power interruption for a CDMA cellular phone |
| US7027419B1 (en) | 1999-09-14 | 2006-04-11 | Nec Corporation | Transmitting and receiving circuit, mobile communication terminal device employing the same and control method therefor |
| US7768953B2 (en) | 2001-10-19 | 2010-08-03 | Interdigital Technology Corporation | System for improved power savings during full DTX mode of operation in the downlink |
-
1997
- 1997-06-04 JP JP14647397A patent/JP3284082B2/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7027419B1 (en) | 1999-09-14 | 2006-04-11 | Nec Corporation | Transmitting and receiving circuit, mobile communication terminal device employing the same and control method therefor |
| JP2003529272A (en) * | 2000-03-29 | 2003-09-30 | モトローラ・インコーポレイテッド | Method and apparatus for call recovery after power interruption for a CDMA cellular phone |
| JP4841792B2 (en) * | 2000-03-29 | 2011-12-21 | モトローラ モビリティ インコーポレイテッド | Method and apparatus for call recovery after interruption of power supply for CDMA cellular phone |
| US7768953B2 (en) | 2001-10-19 | 2010-08-03 | Interdigital Technology Corporation | System for improved power savings during full DTX mode of operation in the downlink |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3284082B2 (en) | 2002-05-20 |
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