JPH10335327A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid rapid increase in the temp. of a wiring pattern or connection holes to improve the reliability of the wiring and connection holes, esp. electromigration resistance by radiating the heat produced in the wiring which is excited by an applied current or connection holes. SOLUTION: This semiconductor device having a multilayered wiring structure is provided with a wiring pattern and connection hole pattern serving as a heat sink. When a current is applied from PAD 107, it flows through a first wiring 104 and first connection holes in a diffused layer 101 with second connection holes 103 provided near first holes 102 to allow the head to escape. The device comprises a second wiring 105 near the first wiring 104 and a third wiring 106 through an interlayer film as a heat sink.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a wiring pattern in a multilayer wiring structure and a pattern of connection holes between wirings.

[0002]

2. Description of the Related Art As semiconductor devices become finer and more highly integrated, wiring patterns and inter-wiring hole patterns in a semiconductor device having a multilayer structure are conventionally required to apply a current for operating the semiconductor device. Only a proper pattern was formed. FIG. 3 shows a conventional semiconductor device having a multilayer wiring. In FIG. 3, reference numeral 301 denotes a diffusion layer;
Is a connection hole grounded on the diffusion layer 301; 303 is a wiring connected to the diffusion layer 301 through the connection hole 302;
Is a pad electrically connected to the wiring 303.
With the conventional structure, the wiring and the connection hole have been reduced in reliability such as the electromigration effect and the fusing of the wiring and the connection hole due to heat generation with miniaturization.

[0003]

In the conventional wiring and inter-wiring connection hole, only the pattern necessary for applying a current for operating the semiconductor device is formed, so that the wiring and the inter-wiring connection hole are miniaturized. As a result, there is a problem in that heat generation causes a decrease in reliability such as an electromigration effect of a wiring and a connection hole between the wirings and fusing.

[0004]

An example of the present invention for solving the above-mentioned problems will be described.

In a wiring of a semiconductor device having a multi-layer wiring, a second wiring pattern for heat dissipation that does not apply a current is provided near a first wiring pattern formed on a first insulating film, The problem is solved by providing a semiconductor device characterized by discharging heat from wiring.

[0006] The problem can be solved by forming the first wiring pattern and the second wiring pattern with a size not less than the minimum processing interval and not more than 10 times the minimum processing interval.

In a wiring of a semiconductor device having a multilayer wiring, a second wiring pattern is formed on the second insulating film on the first wiring pattern so as to cover the first wiring. The problem is solved by providing a semiconductor device characterized by discharging heat from wiring.

In a semiconductor device having a multi-layer wiring, when forming a connection hole between a diffusion layer and the first wiring formed on the first insulating film, a dummy second not applying a current around the connection hole. This problem is solved by providing a semiconductor device characterized by providing the connection hole of (1) and releasing heat from the first connection hole.

[0009]

FIG. 1 is a pattern diagram in one embodiment of the present invention. In all the drawings of the embodiment, components having the same function are denoted by the same reference numerals, and the repeated description thereof will be omitted. Hereinafter, one embodiment will be described. P in FIG.
When a current is applied from the AD 107, a current flows through the first wiring 104 and the first connection hole 102 formed on the diffusion layer 101. The second connection hole 1 is disposed near the first connection hole 102 to release heat generated from the first connection hole.
03 is provided. Further, a second wiring 105 as a heat sink is provided near the first wiring 104. It is desirable that the distance between the wiring 105 of the heat sink and the pattern that actually generates heat by flowing an electric current be the minimum value of the processing dimension. Also,
The third wiring 106 is also provided as a heat sink with the interlayer film interposed therebetween. It is preferable to form the first wiring and the first connection hole formed in the lower layer so as to cover the first wiring and the first connection hole.

Next, FIG. 2 shows a sectional view of this embodiment in FIG. Hereinafter, the cross-sectional view of FIG. 2 will be described. Diffusion layer 202 formed on semiconductor substrate 101 and first wiring 204
A second connection hole 207 for dissipating heat generated in the first connection hole 206 is provided near the connection hole 206 for connecting the first and second connection holes. Further, a second wiring 205 is formed in order to release heat generated in the wiring 204. The second
Since the wirings serve as heat sinks, it is desirable to use a large pattern. Next, a third wiring is formed so as to cover the first connection hole, the first wiring, the second connection hole, and the second wiring with the interlayer insulating film 208 interposed therebetween. The third
It is desirable that the wiring be a large pattern because the wiring serves as a heat sink. In a semiconductor device having a multilayer wiring, a similar pattern is formed for wirings and connection holes in the second and subsequent layers.

As for the wiring material of the embodiment shown in FIGS. 1 and 2, all of the first wiring, the second wiring and the third wiring are made of Al (aluminum) or a wiring material mainly composed of Al. In this case, the first and second wirings are wiring materials containing polysilicon, and the third wiring is Al or A
For example, the wiring material is mainly composed of l.

[0012]

As described above, according to the present invention, by disposing a heat-dissipating wiring pattern near a wiring pattern to which a current is actually applied, the heat generated by the current flowing through the wiring can be reduced. By dissipating heat, it is possible to prevent reliability failures such as melting and movement of wiring due to a rapidly rising temperature, particularly deterioration of electromigration resistance. Further, by providing a heat dissipation connection hole near the connection hole to which the current is actually applied, heat generated by the current flowing through the connection hole is dissipated by the heat dissipation connection hole,
It is possible to prevent the reliability from deteriorating due to the melting of the wiring due to the rapidly rising temperature or the heat generated in the moving connection hole portion, particularly the deterioration of the electromigration resistance. By providing the heat-dissipating wires and heat-dissipating connection holes near the pattern to which a higher current is applied, a great effect can be obtained. In addition, the reliability can be improved in the case of a connection hole structure that is finer and uses a high melting point metal and easily generates heat.

[Brief description of the drawings]

FIG. 1 is an example of a plan view of a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view illustrating a semiconductor device of the present invention.

FIG. 3 is an example of a plan view of a conventional semiconductor device.

[Explanation of symbols]

 101, 202, 301: diffusion layers 102, 206, 302: first connection holes 103, 207: second connection holes 104, 204, 303: first wirings 105, 205,... Second wirings 106, 209 ... Third wiring 107, 304 PAD 201 Semiconductor substrate 203 First interlayer insulating film 208 Second interlayer insulating film

Claims (4)

[Claims] A wiring for a semiconductor device having a multi-layered wiring, wherein the wiring has a second wiring pattern for heat dissipation that does not apply a current near the first wiring pattern formed on the first insulating film; A semiconductor device wherein heat generated from the first wiring is released. 2. The semiconductor device according to claim 1, wherein said first wiring pattern and said second wiring pattern are formed to have a size not less than a minimum processing interval and not more than 10 times the minimum processing interval. 3. A wiring of a semiconductor device having a multilayer wiring, wherein a second wiring pattern is formed on the second insulating film on the first wiring pattern so as to cover the first wiring. A semiconductor device wherein heat generated from the first wiring is released. 4. In a semiconductor device having a multi-layer wiring, a heat-dissipating device that does not apply a current around the connection hole when forming a connection hole between the diffusion layer and the first wiring formed on the first insulating film. Wherein the second connection hole is provided, and heat generated from the first connection hole is released.