JPH10334600A - Reproducing device and reproducing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize fast response and stabilized automatic equalization by detecting error in the equalized signals of reproduced digital signals and determining the amount of change which adjusts the equalization characteristics in response to the detection output of error. SOLUTION: A signal reproduced by a head 2 is amplified by an amplifier 3 to be inputted into a second equalization circuit 9 through a reproducing equalization circuit 4 with fixed equalization characteristics. The equalization characteristics of the circuit 9 are variably set by the CPU 10. A data detection circuit 5 detects error after converting analogue signals to digital signals to output the signals to an ECC decoding circuit 6. The circuit 6 corrects the error in reproduced signals using parity data added at the time of recording and in addition generates the number-of-error information E of uncorrectable error. Based on the information E during a specified period immediately before, the CPU 10 defines the magnitude of the step which changes the frequency characteristics of the circuit 9 for control and sets the optimum equalization characteristics promptly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a reproducing apparatus and method, and more particularly, to control of an equalization characteristic of a reproduced signal.

[0002]

2. Description of the Related Art As a device of this type, a digital VTR for digitizing an image signal and recording / reproducing the same on a magnetic tape has been known.

[0003] Particularly in a digital VTR for consumer use,
In order to obtain good reproduction signals from magnetic tapes of different manufacturers with different frequency characteristics, the error rate in the reproduction signal is detected, and according to the detection result, the reproduction equalizer is equalized so that errors in the reproduction signal are reduced. One that performs so-called automatic equalization processing for automatically controlling the characteristics has been considered.

[0004]

However, in the automatic equalization as described above, since the hill-climbing control is generally performed while monitoring the number of errors per unit time, there is a problem that the response of the equalization circuit is slow. .

Further, what can be controlled by the automatic equalization as described above is the frequency characteristic of the reproduction equalizer, so that a so-called random error can be suppressed.
A random error is a stochastic event, and automatic equalization by hill-climbing control is performed using an average value of these random errors as error information. In the hill-climbing control, the time for obtaining the optimum equalization characteristics is a distance (a difference between the optimum equalization characteristics and the current equalization characteristics), a control response speed (an interval for actually controlling the characteristics), and a step. (The amount of change in the equalization characteristic that is changed by one control).

The response speed is determined by the error averaging period. If the averaging period is short, the effects of quantization errors and disturbances cannot be ignored for random errors. Equalization does not occur stably. In order to perform stable hill-climbing control while suppressing the effects of quantization errors and disturbances, the number of errors in a certain period (for example, several tens to several hundred tracks) must be averaged. In particular, the characteristics change drastically when the tape to be handled changes, but in such an automatic equalization process, since it takes time to average the number of errors, it takes time to obtain the optimum equalization characteristics. Is slow.

On the other hand, if the step is made too large, the equalization characteristics will change too much, and the control will be disturbed when the control operation of automatic equalization reacts to the influence of disturbance, or the control will be performed accurately to the optimum characteristics. It became difficult to do.

An object of the present invention is to solve the above-mentioned problems.

Another object of the present invention is to provide a quick response and
The point is to realize stable automatic equalization.

[0010]

In order to solve the above problems and achieve the object, the present invention provides a reproducing means for reproducing a digital signal from a recording medium, an equalizing means for equalizing the reproduced digital signal, An error detection unit that detects an error in the digital signal processed by the equalization unit; and a control unit that changes an equalization characteristic of the equalization unit according to an output of the error detection unit. Is configured to determine a change amount of the equalization characteristic according to an output of the error detection unit.

[0011]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a reproduction system of a digital VTR to which the present invention is applied.

In FIG. 1, a signal reproduced from a tape 1 by a head 2 is amplified by a reproduction amplifier 3 and output to a reproduction equalization circuit 4. The reproduction equalization circuit 4 has a fixed equalization characteristic, and the reproduction signal equalized by the equivalent circuit 4 is output to the second equalization circuit 9. The equalization circuit 9 can control the equalization characteristics as described later, equalizes the reproduction signal from the equalization circuit 4 with the equalization characteristics set by the CPU 10,
Output to the data detection circuit 5.

The data detection circuit 5 converts the signal reproduced in the state of an analog signal into a digital signal and outputs the digital signal to an error correction decoding circuit (hereinafter, ECC circuit) 6. The ECC circuit 6 corrects errors in the reproduction signal using the parity data added at the time of recording, and generates error number information E indicating the error that cannot be corrected, and outputs the error number information E to the CPU 10.

The reproduced signal that has been subjected to the error correction processing by the ECC circuit 6 is decoded by the reproduced signal processing circuit 7 and subjected to reproduction processing such as data rearrangement, data amount expansion, interpolation, and the like. It is converted into a signal of the form and output.

Reference numeral 10 denotes a CPU, which controls the frequency characteristic of the reproduction equalization circuit 9 based on error number information E indicating the number of errors for one track obtained from the ECC circuit 6.

Next, the equalizing circuit 9 in this embodiment will be described.

FIG. 2 is a block diagram showing the structure of the equalizing circuit 9.

In FIG. 2, reference numeral 14 denotes a terminal to which a reproduction signal from the equalizing circuit 4 is input, 16 denotes a delay circuit having a delay time t,
15 is a matching resistor of the delay circuit 16, 17 and 18 are high impedance input buffers, 19 is a multiplier, 20
Is a differential amplifier circuit, 21 is an output terminal to the data detection circuit 5, 22 is a D / A converter that converts the output of the register 23 into an analog signal and outputs it to the multiplier 19, and 23 is the frequency of the equalization circuit 9. This is a register that stores a coefficient KA for controlling characteristics.

A signal obtained by delaying the input signal by the time t by the delay circuit 16 is supplied to the input of the buffer 17. Here, since the impedance of the buffer 17 is high, the signal is reflected and supplied to the delay circuit 16 from the opposite direction. The output of the buffer 17 is output from a multiplier 19 to the control coefficient KA of the frequency characteristic.
And the output of the buffer 17 and the differential amplifier circuit 2
0 is supplied.

In the circuit shown in FIG.
The transfer characteristic G of the output signal at the output terminal 21 with respect to the input signal at

[0022]

[Outside 1] Although there is a delay of time t, even if the amplitude characteristic is changed, no phase distortion occurs.

Here, KA is a control coefficient KA of the frequency characteristic.
Is an analog value obtained by D / A conversion of the value of. FIG.
The frequency characteristic of the transfer characteristic G with A as a parameter is shown.
The frequency characteristic of the equalizing circuit 9 can be controlled by selecting the delay time t so that the range used as the reproducing equalizing circuit is up to f = １ ／ t and changing the coefficient KA.

As described above, the frequency characteristic of the equalizing circuit 9 can be controlled by changing the control coefficient of the frequency characteristic. As a result, the error number information E indicating the number of errors per track is obtained. Change.

FIG. 4 shows an example of the relationship between the error number information E and the coefficient KA. Here, the smaller the error number information E, the better the characteristics.

The characteristics shown in FIG. 4 change from a solid line to a dotted line, for example, due to the compatibility of the tape and the change with time. That is, the value of KA corresponding to the minimum value of E changes due to a change in the frequency characteristic of the reproduced signal.

The CPU 10 performs stable automatic equalization by controlling the control coefficient KA of the frequency characteristic while monitoring the error number information E.

The operation of the CPU 10 according to the present embodiment will be described below with reference to the flowcharts of FIGS.

FIG. 5 is a flowchart showing the entire operation of the automatic equalization according to this embodiment.

When the reproduction is started as described above, first,
Each variable used for control is reset (step S
101). In the present embodiment, the count value ER_COUNT of the number of errors indicated by the error number information E, the variables NOW_ER and OLD_ER used for control, and the number of times AEQ_COUNT executed the control operation of the equalization characteristic are set to 0.

Next, error number information E from the ECC circuit 6
, The number of errors in the reproduced signal is counted (step S102), and it is determined whether or not the number of errors for a predetermined period has been counted (step S103). This is because if the counting period of the number of errors is too short, the number of errors often increases due to factors other than the characteristics of the equalization circuit, such as dropout of a reproduced signal, and the error number information cannot be used for equalization control. . In this embodiment, the equalization characteristic is controlled by a count value obtained by counting the number of errors for 100 tracks in consideration of the influence of the dropout and the like.

When the number of errors for 100 tracks is counted, each variable used for control is set according to the count value of the number of errors. NOW_ER is a count value of the number of errors obtained at present, and OLD_ER is a count value of the number of errors used for the control immediately before the present. In step S103, NOW_ER is input to OLD_ER,
Input the value of ER_COUNT into NOW_ER,
Set COUNT to 0. By this processing, NOW
_ER is set to the count value of the number of errors for the current 100 tracks, and OLD_ER is set to the count value of the number of errors for the immediately preceding 100 tracks.

Next, an equalizing circuit 9 is operated by an operation unit (not shown).
It is determined whether or not the automatic equalization mode for controlling the characteristics of the above has been set.
AEQ_COU indicating the number of times the AEQ process described later is executed, and if not set, the number of times the automatic equalization process is executed
Set NT to 0. Then, in a step S105, it is determined whether or not the apparatus is still in the reproduction mode. If the apparatus is in the reproduction mode, the process returns to the step S102 again, and the above processing is repeated. Stops the processing.

Next, the AEQ processing for actually changing the equalization characteristics will be described.

FIG. 6 is a flowchart showing the AEQ process.

As described above, in the present embodiment, the value of the frequency characteristic control coefficient KA is changed to control the equalization characteristic to an optimum point (a point at which an error is minimized). In the figure, KB indicates a direction in which the equalization characteristic KA is changed, and takes a value of 1 or -1. KC indicates the size (step) at which KA is actually changed.

First, in step S201, EQ_
Check whether COUNT is 0 or not. Where EQ_
If COUNT is 0, it is determined that this is the first equalization characteristic control process, KB is set to 1, and KC is set to a relatively small value (1/8 in this embodiment).

If it is determined in step S201 that the process is the second or subsequent equalization characteristic control process, the process proceeds to step S202.
Compare NOW_ER and OLD_ER. Here, if OLD_ER is smaller than NOW_ER, the number of errors has decreased, so that it is determined that the direction of change in the equalization characteristics is the correct direction, and the process proceeds to step S203. If NOW_ER is larger than OLD_ER, it is determined that the number of errors has increased due to a change in the equalization characteristic, and KB indicating the direction of change in the characteristic is inverted.
Proceed to step S203.

In step S203, a change step KC of the equalization characteristic is determined in accordance with the detected error count value NOW_ER. That is, NOW_ER is 10
In the following cases, there are almost no errors, the error is near the optimal equalization characteristic, and the number of errors may increase due to a sudden change in the equalization characteristic. Therefore, the step KC is set to 1/8 and the NOW_ER is KC is 1/4 for 10-50
Further, when NOW_ER is 50 or more, the step KC is set to １ ／ to make the change relatively large.

After KB and KC are set, the current KA is further reduced to the control limit minimum value K _min and the maximum value K _{max of the} equalization characteristic.
To determine whether it is between K _min or K _max
In the case of, the values are fixed to the respective values, and the processing is terminated. Also, if it is between K _min and K _max , K
A × KB is added to A to obtain a new KA, which is output to the equalization circuit 9. Further, 1 is added to AEQ_COUNT, and the AEQ process ends.

As described above, in the present embodiment, the size of the step is determined based on the number of errors for the predetermined period counted immediately before, so that it is possible to stably and quickly respond to the error state of the reproduced signal. An optimal equalization characteristic can be set.

That is, when the number of errors is small, it is determined that the characteristic is set near the optimum equalization characteristic, and the amount of change in the equalization characteristic is set small. Is determined to be greatly deviated from the optimal equalization characteristic, and the amount of change in the equalization characteristic is set large.

The period for counting the number of errors is 10
It is constant in the zero track period, and the optimum equalization characteristics can be realized stably and quickly.

In the above embodiment, the case where the present invention is applied to a digital VTR has been described.
The present invention is not limited to this, and the present invention can be applied to any device that controls the equalization characteristics of a reproduced signal.
It has a similar effect.

[0045]

As described above, according to the present invention, the amount of change in the equalization characteristic is determined according to the error in the reproduced signal. In addition, the optimum equalization characteristics can be set quickly.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a digital VTR as an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of an equalization circuit in FIG. 1;

FIG. 3 is a diagram illustrating characteristics of the equalization circuit of FIG. 2;

FIG. 4 is a diagram illustrating a relationship between an equalization characteristic of the circuit in FIG. 1 and an error in a reproduced signal.

FIG. 5 is a flowchart showing the operation of the apparatus of FIG. 1;

FIG. 6 is a flowchart illustrating an automatic equalization process in FIG. 5;

[Explanation of symbols]

 6 ECC decoding circuit 9 Second equalizing circuit 10 CPU

Claims (6)

[Claims] A reproducing means for reproducing a digital signal from a recording medium; an equalizing means for equalizing the reproduced digital signal; and an error detecting means for detecting an error in the digital signal processed by the equalizing means. Control means for changing an equalization characteristic of the equalization means according to an output of the error detection means, wherein the control means determines a change amount of the equalization characteristic according to an output of the error detection means. A reproducing apparatus characterized by the above-mentioned. 2. The control device according to claim 1, wherein the control unit decreases the change amount when the error state is good, and increases the change amount when the error state is bad. The playback device according to claim 1. 3. The reproducing apparatus according to claim 1, wherein the control unit counts the number of errors for a predetermined period, and sets the change amount according to the count value. 4. The apparatus according to claim 1, wherein said control means further determines a change direction of said equalization characteristic based on a previous change direction of said equalization characteristic and an output of said error detection means. 3. The reproducing device according to 3. 5. The error detecting means has error correcting means for correcting an error in the reproduced digital signal using an error correction check code added to the reproduced digital signal, and the error correcting means corrects the error in the reproduced digital signal. 5. The reproducing apparatus according to claim 1, wherein error information indicating an impossible error is output to the control unit. 6. A method for changing an equalization characteristic of an equalizing means for equalizing the reproduced digital signal according to the number of errors in the reproduced digital signal generated during a predetermined period, wherein the equalization characteristic is changed according to the number of errors. A reproduction method characterized by determining a change amount.