JPH10333998A - Data transfer device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain a fail/safe function not influenced by the abnormality of a transmission destination device by independently ending data transmission operation in the case of transferring data to be transmitted between devices connected to a device to be driven independently of the transmission destination device from one device to the other device. SOLUTION: An interface (data transfer device) 10 connected to a driving circuit 20 to be driven by a battery in a device body or an independent backup power supply and capable of controlling the transfer of data to/from the device body is provided with a timer 14. The timer 14 counts up time elapsed from the start of data transfer control, and when the time elapsed reaches previously set time, sends a pseudo end signal b2 at least to a serial control part 11 to forcedly end the control of data transfer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transfer apparatus, and more particularly, to a data transfer apparatus which is connected to a device that can be driven independently of a transmission destination and has a fail-safe function when a device abnormality occurs in the transmission destination. About.

[0002]

2. Description of the Related Art Conventionally, a driving device that drives independently has
For example, a control device including a CPU or the like is connected to use data of the drive device.
A data transfer device is connected to the drive device to enable data transmission (transmission and reception of data) between the devices. In such a drive device, a power supply completely independent of the control device is used (independent type), and when cooperating with the control device, power supply such as battery replacement is performed using the power supply of the control device. There is a mode (built-in type) that uses a backup power supply when the power is cut off.

[0003] This type of data transfer device is interposed between a system connecting another device such as a control device and a drive device, and is designed to accurately transfer data to be transmitted between each other. In many cases, data is transferred periodically according to a transfer clock. For example, by receiving an access start signal before receiving a clock signal and a data signal from another device (hereinafter, described as a control device), data signal transfer control is performed while synchronizing between devices. I have.

At this time, when the control device operates normally and sends out a clock signal or a data signal, the drive device can receive data normally, but noise may be added to the clock signal or the data signal. (Case) If the CPU of the control device runs out of control (Case) or the like occurs, data cannot be normally received. More specifically, if case noise occurs during data transfer control, the transfer clock may be out of synchronization, or the data to be transferred itself may be changed (or garbled) due to the noise. C
When a runaway of a PU occurs, a data signal or the like may not be sent.

[0005] In order to prevent such a problem beforehand, it is common to provide a filter circuit in front of the data transfer device and a Schmitt trigger circuit as a filter circuit to remove noise from the case. It is being done. In addition, Japanese Patent Application Laid-Open No. Hei 5-91146 proposes a data transfer device for preventing a malfunction due to noise.

[0006] In the case of runaway of the CPU in the case, a so-called watchdog timer (WD) is provided on the control device side.
T) is provided so that a reset is applied during a runaway, and peripheral devices such as a drive device are also initialized, thereby returning to a normal state.

[0007]

However, in such a conventional data transfer device, if the control device stops sending data due to some cause (for example, battery replacement), The transfer clock stops. At this time, since the driving device is driven by its own power supply to maintain the data waiting state, there is a possibility that noise may enter and the data may be destroyed. It should be noted that this problem is not a countermeasure because the filter circuit only removes noise on the data signal, and the WDT does not provide any countermeasure if the control device side goes down.

Accordingly, the present invention provides a fail-safe method for independently terminating data transfer control, thereby preventing the influence of an abnormality such as data not being transmitted from spreading to connected devices. It is an object to realize a function and enable the self-recovery of the device.

[0009]

According to the present invention, there is provided a data transfer device connected to one device which can be driven by a power source independent of the other device between data transmitting devices. Means for counting the time elapsed since the start of the data transfer control, and forcibly enforcing the data transfer control when the elapsed time measured by the timer reaches a preset time. And end control means for ending the operation.

In the present invention, the data transfer control is forcibly terminated when the elapsed time from the start of the data transfer control reaches the set time. Therefore, by setting a time corresponding to the time required to transfer data to be transmitted between the devices as the set time, for example, data transmission from the transmission destination device is inadvertently stopped. Also independently terminates the transfer control.

Here, the one device may be of a type using a power source completely independent of the other device, or may be a backup power source when the power supply is interrupted by using the power source of the other device in a normal state. The present invention can be suitably applied to a device that can be independently driven with respect to the other device.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing one embodiment of a data transfer device according to the present invention. In FIG. 1, reference numeral 10 denotes a serial interface (hereinafter, simply referred to as an interface). The interface 10 is connected to a drive circuit (drive device) 20 in a portable device equipped with a battery and having a predetermined function. It is interposed between the device main body (control device) side. The main body of the apparatus operates using a replaceable battery as a power source under the drive control of a CPU (Central Processing Unit), while the drive circuit 20 uses the battery of the main body in a normal state and supplies power when the battery is exchanged. For example, a clock circuit or an SRAM (Static Ran) driven by a separate backup power supply when
dom Access Memory).

The interface 10 includes a serial control unit 1
1, pulse counter 12, shift register 13 and timer 1
4 is provided with a two-wire data transfer device, which receives a clock signal transmitted from the device via a clock line, and synchronizes the clock signal with the clock signal via a data line. The transfer control of serial data transmitted between the device body and the drive circuit 20 is executed.

The serial control section 11 sends a transfer control start command a to the pulse counter 12 when receiving an access start signal from the apparatus main body via the clock line and the data line, and receives the access end signal from the apparatus main body. To the transfer control end command b1. When receiving the start command a from the serial control unit 11, the pulse counter 12 sends a control signal c for storing a data signal based on the clock signal sent to the shift register 13 and counts the clock signal. Then, for example, when the count reaches 8 (8 bits), the control signal d for sending the data signal stored in the shift register 13 to the drive circuit 20 is sent. On the other hand, when receiving the end command b1 from the serial control unit 11, the pulse counter 12 sends a signal indicating the end of the transfer control to the drive circuit 20 via the shift register 14, and ends the transfer control. When data from the drive circuit 20 is transferred to the apparatus main body, the data may be similarly transmitted to the apparatus main body side while being stored in the shift register 13. A case where data is transferred to the drive circuit 20 will be described.

At this time, the transfer time of the data to be transferred from the device body to the drive circuit 20 can be determined by the size of the data to be handled, and the timer 14 is preset to a value larger than the maximum time. . The timer 14 measures the elapsed time from when the transfer control start command a is received simultaneously with the pulse counter 12 from the serial control unit 11 to when the end command b1 is received, and the elapsed time exceeds the set time. When the end command b1 is received before, the timer is reset and the process ends normally. On the other hand, when the elapsed time exceeds a preset time, a transfer control end command based on an access end signal from the device body side. The end command b2 corresponding to b1 is sent to the serial control unit.
11 and the pulse counter 12 to execute the normal transfer control end operation. That is, the timer 14 constitutes a time measuring means and also constitutes an end control means for forcibly terminating the data transfer control.

Therefore, for example, even if the CPU of the apparatus main body suddenly goes down due to battery replacement or the like while the drive circuit 20 is being accessed to back up the time adjustment or adjustment data on the apparatus main body side, the timer 14 When the elapsed time measured by the timer exceeds the set time, the serial control
The data transfer control that has been started by sending the pseudo end signal b2 to the pulse counter 11 or the pulse counter 12 can be forcibly ended.
It is possible to prevent beforehand that the driving circuit 20 remains in the data waiting state and the noise enters and the data is destroyed. This forced termination also functions when data is not sent due to runaway of the CPU of the apparatus main body or the like, so that it is possible to cope with the case where the WDT is not provided.

As described above, in this embodiment, the timer
A drive circuit that can be driven separately from the device main unit even if an error such as an inadvertent stop occurs so that the data transfer control does not end even after the time set in 14
The data transfer control on the side of the device 20 can be forcibly terminated, and the drive circuit 20 can be prevented from being affected by an abnormality on the device body side. Therefore, it is possible to realize a fail-safe function for avoiding a problem that cannot be prevented by the filter circuit, the WDT, or the like, and the drive circuit 20 can self-recover separately from the apparatus main body.

It is needless to say that the present embodiment is not limited to a two-wire type data transfer device. For example, a three-wire data transfer device as shown in FIG.
It can also be applied to a line type data transfer device. Similarly, when the rising and rising of the CE signal (chip enable signal) and the H level are controlled to transfer data as an access start command from the device main body side, an error on the device main body side is similarly caused I can deal with it. Further, as shown in FIG. 3, the present invention can be applied to a four-wire data transfer device having input / output line terminals for data signals. Although the present embodiment describes the data transfer processing in the same device, the data transfer device incorporated in the drive device separate from the control device, or the control device and the drive device separately from each other. It goes without saying that the present invention can be applied to a data transfer device interposed between the data transfer device and the data transfer device.

[0019]

According to the present invention, when the elapsed time from the start of the data transfer control reaches the set time, the transfer control is forcibly terminated. Even if an error that does not end transmission occurs on the transmission destination device side, the data transfer control can be terminated independently, and the device that is driven by another power supply may be affected by the careless stop of data transmission. Can be prevented from occurring. Therefore, the filter circuit and W
It is possible to realize a fail-safe function for avoiding a problem that cannot be prevented by the DT or the like. As a result, the connected device can recover by itself regardless of the transmission destination device.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic overall configuration of an embodiment of a data transfer device according to the present invention, and is a relationship diagram illustrating exchange of signals.

FIG. 2 is a diagram showing a first other mode.

FIG. 3 is a diagram showing a second other mode.

[Explanation of symbols]

 10 Serial interface (data transfer device) 11 Serial control unit 12 Pulse counter 13 Shift register 14 Timer 20 Drive circuit (Drive device)

Claims (1)

[Claims] 1. A data transfer device connected to one device side that can be driven by a power supply independent of the other device between data transmission devices, the elapsed time since the start of data transfer control. And end control means for forcibly terminating the data transfer control when the elapsed time measured by the clock means reaches a preset time. Data transfer device.