JPH1032926A - Power supply voltage control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stably supply an arbitrary power supply voltage by controlling the switching ratio of the interconnection between batteries to serial connection or parallel connection. SOLUTION: A power supply voltage generating circuit PS is provided with a plurality of batteries B1 an B2, a switch circuit SW which switches the interconnection between the batteries B1 and B2 to serial connection or parallel connection by using control signals S and SB, and a filter circuit LPF which outputs a power supply voltage VDD by leveling the output voltage of the output terminal 9 of the circuit SW. A pulse converting circuit VPC is provided with a variable oscillation circuit VFC, the oscillation frequency of which changes correspondingly to the power supply voltage VDD and a pulse width converting circuit FPC which inputs the output V4 of the oscillator VFC and converts the width of a pulse correspondingly to the power supply voltage VDD. In other words, a power supply voltage control circuit PS supplies the power supply voltage VDD to a circuit to be supplied, by leveling the output voltages of the batteries B1 and B2 by switching the interconnection between the batteries B1 and B2 by using the control signals S and SB.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply voltage control circuit, and more particularly to a power supply voltage control circuit for a portable electric device or the like using a battery as a power supply.

[0002]

2. Description of the Related Art Conventionally, this type of power supply voltage control circuit has been widely used in portable electric equipment and the like in order to stably supply an arbitrary constant voltage using a battery as a power supply. For example, FIG.
Is disclosed in Japanese Patent Application Laid-Open No. Hei 4-29531,
FIG. 11 is a circuit diagram showing a conventional power supply voltage control circuit described in Japanese Patent Application Publication No. 043. This conventional power supply voltage control circuit,
A switching circuit SWT for switching a series-parallel connection between two batteries B3 and B4, and a voltage detection circuit V for detecting a power supply voltage Vo
D2, mainly to extend the service life of the battery,
And to warn you that you are approaching the limits of use. That is, first, when the battery is used for a new period in parallel connection, when the power supply voltage Vo decreases, the voltage detection circuit VD2 detects the decrease in the voltage and inputs the result to the switching circuit SWT. By switching to series connection, and increasing the voltage Vo again, the service life of the battery is extended.

[0003] FIG. 19 is a Japanese Patent Publication No. 63-61678.
FIG. 2 is a circuit diagram showing another conventional power supply voltage control circuit described in Japanese Patent Application Laid-Open Publication No. H11-209,036. This conventional power supply voltage control circuit is a circuit that converts the voltage of a single battery B5 into a voltage, and includes capacitors CP1 and CP2, and switching circuits SW1 to SW7 using MOS transistors.
By switching SW7 with a periodic signal, etc.,
It is possible to obtain a boosted voltage that is about twice the battery voltage V (B5) and a step-down voltage that is about の the battery voltage. That is, as shown in FIGS. 20 (a) and 20 (b), first, the capacitors CP1 and CP2 connected in series are connected to the battery B5 to accumulate electric charge, and then the switching circuits separate the capacitors CP1 and CP2 from the battery B5. By changing the connection to the parallel connection, a voltage about 1/2 times the battery voltage can be obtained from the terminal Vo2.

As shown in FIGS. 20 (c) and 20 (d), the capacitor CP2 is first connected to the battery B5 to accumulate electric charge, and then the capacitor CP2 is connected in series to the battery B5 by a switching circuit. , A voltage about twice the battery voltage is applied to the terminal V
It can be obtained from o1. At this time, in the state of FIG. 20C, the capacitance CP1 is connected to the terminal Vo1.
Has a role of maintaining the output voltage of the battery at about twice the battery voltage B5.

This power supply voltage control circuit mainly assumes a battery power supply such as a lithium battery that generates a high voltage. When a load circuit does not require a high voltage, the power supply voltage control circuit uses a battery voltage that is about half as high. In order to reduce the power consumption by using it, conversely, when the load circuit requires high voltage or large current, use the battery voltage about twice as much to eliminate the malfunction of the circuit. I have.

[0006]

However, in the conventional power supply voltage control circuit described above, the power supply voltage to be supplied can only be changed to 1/2, 2 and 1 times the battery voltage. There is a drawback that an arbitrary voltage cannot be output.

Accordingly, an object of the present invention is to switch the interconnection of a plurality of batteries and to stably supply an arbitrary power supply voltage.

[0008]

SUMMARY OF THE INVENTION Accordingly, the present invention provides a power supply voltage control circuit having a series / parallel switching circuit for switching the interconnection of a plurality of batteries to a series or parallel connection by a control signal to control and supply a power supply voltage. A power supply voltage generation circuit for leveling the output voltage of the series-parallel switching circuit and supplying the power supply voltage, a pulse conversion circuit for generating a pulse signal having a duty ratio corresponding to the power supply voltage and outputting the pulse signal as the control signal, It has.

Further, the power supply voltage generating circuit includes the plurality of batteries, the series / parallel switching circuit, and a filter circuit for leveling the output voltage.

Further, the pulse conversion circuit includes a variable oscillation circuit whose oscillation frequency changes in accordance with the power supply voltage;
A pulse width conversion circuit that receives an output of the variable oscillator and converts a pulse width in accordance with the power supply voltage.

Alternatively, the pulse conversion circuit compares a constant frequency oscillation circuit that outputs a constant frequency oscillation signal, a level conversion circuit that converts the level of the power supply voltage, and the output of the level conversion circuit and the oscillation signal. A comparison circuit that outputs the comparison result as the control signal.

[0012]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing Embodiment 1 of the power supply voltage control circuit of the present invention. Referring to FIG.
The power supply voltage control circuit of the present embodiment switches the interconnection of a plurality of batteries under the control of control signals S and SB, levels the output voltage thereof, and supplies the power supply voltage VDD and the power supply voltage generation circuit PS. And a pulse conversion circuit VPC that generates a pulse signal having the adjusted duty ratio and outputs the pulse signal as control signals S and SB.
Are supplied with the power supply voltage VDD. FIG. 2 and FIG.
These power supply voltage generation circuit PS and pulse conversion circuit VP
It is a block diagram which shows the example of a detailed structure of C, respectively.

Referring to FIG. 2, power supply voltage generating circuit PS
Further comprises a plurality of batteries B1, B2 and a plurality of batteries B
A switch circuit SW for switching the interconnection between B1 and B2 to a series or parallel connection by control signals S and SB, and a filter circuit LPF for leveling the output voltage of its output terminal 9 and outputting the power supply voltage VDD. The negative electrode of the battery B1 is connected to the ground potential GND, and both ends of the batteries B1 and B2 are connected to the switch circuit SW. Further, the switch circuit SW receives the control signals S and SB and receives the batteries B1 and B.
2 is switched, and the positive electrode of battery B2 is used as output terminal 9 to output an output voltage. The filter circuit LPF is
The output voltage V3 of the switch circuit SW is input and leveled, and is output from the terminals 12 and 3 as the power supply voltage VDD.

Referring to FIG. 3, a pulse conversion circuit VPC
Further includes a variable oscillation circuit VFC whose oscillation frequency changes in accordance with the power supply voltage, and an output V
4 and a pulse width conversion circuit FPC for converting the pulse width in accordance with the power supply voltage VDD. The pulse width conversion circuit FPC of this embodiment converts only the low-level pulse width without changing the high-level pulse width with respect to the power supply voltage VDD. The power supply voltage VDD is supplied to a variable oscillation circuit VFC and a pulse width conversion circuit FP through a terminal 4.
C and the output V4 of the variable oscillation circuit VFC is input to the pulse width conversion circuit FPC. The output of the pulse width conversion circuit FPC is output as control signals S and SB through terminals 16, 17 and 5, 6.

Next, the operation of the power supply voltage control circuit of the present embodiment will be described with reference to FIGS.

FIG. 4 is an explanatory diagram for explaining the operation of the power supply voltage control circuit of FIG. The respective waveforms in FIG.
D or control signal S is shown. The control signal SB is the control signal S
Are omitted because they are complementary signals. The power supply voltage VDD of the power supply voltage control circuit of the present embodiment includes the control signals S and SB.
, A feedback operation is performed, and the power supply voltage VDD operates so as to be a preset constant voltage. Arrows (a) to FIG.
(D) shows the operation order of the feedback loop. That is,
When the power supply voltage VDD increases, the pulse width ratio or the number of pulses of the control signal S decreases by the pulse conversion circuit VPC as shown by the arrow (b), and when the number of pulses of the control signals S and SB decreases, the power supply voltage generation circuit circuit PS reduces the power supply voltage VDD as shown by the arrow (c). When the power supply voltage VDD decreases, the pulse conversion circuit VPC increases the number of pulses of the control signal S as shown by the arrow (d). When the number of pulses of the control signals S and SB increases, the pulse conversion circuit VPC changes the number of pulses as shown by the arrow (a). Then, the power supply voltage VDD increases.

FIG. 5 shows the power supply voltage generating circuit P of FIG.
FIG. 9 is an explanatory diagram illustrating an operation of S. Each waveform in FIG. 5 shows the control signal S in the power supply voltage generation circuit PS in FIG. 2, and the output voltage V3 and the power supply voltage VDD of the switch circuit SW corresponding thereto. The switch circuit SW in the power supply voltage control circuit of the present embodiment operates to connect the batteries B1 and B2 in series when the control signal S is at a high level, and to connect the batteries B1 and B2 in parallel when the control signal S is at a low level. I do. Therefore, the output voltage V3 of the switch circuit SW is
It increases when the control signal S is at a high level, and decreases when the control signal S is at a low level. The integration circuit or the filter circuit LPF equalizes the output voltage V3 of the switch circuit SW and outputs the same, so that the pulse width ratio PW1 / P
It operates so as to output a power supply voltage VDD proportional to W2. FIG. 5A is a waveform when VDD is set to output a high potential, and VDD is also high because the pulse width ratio is large. FIG. 5B shows the VD
D is a waveform when D is set to output a low potential, and VDD is low because the pulse width ratio is small.

FIG. 6 shows the pulse conversion circuit V of FIG.
FIG. 4 is an explanatory diagram illustrating an operation of a PC. Each waveform in FIG.
Power supply voltage VDD in pulse conversion circuit VPC of FIG.
And an oscillation output V4 of the variable oscillation circuit VFC and a control signal S corresponding thereto. The pulse conversion circuit VPC in the power supply voltage control circuit of the present embodiment has a power supply voltage VDD.
Is a circuit that detects and feeds back the control signals S and SB.
As shown in FIG. 6 (a), when the power supply voltage VDD is low, the frequency of the oscillation output V4 is increased by the variable oscillation circuit VFC, and the oscillation output V4 is input to the pulse width conversion circuit FPC. The conversion is performed so that the pulse width ratio increases. Also, as shown in FIG. 6B, when the power supply voltage VDD is low, the frequency of the oscillation output V4 is reduced by the variable oscillation circuit VFC, and the oscillation output V4 is input to the pulse width conversion circuit FPC, whereby the high level is output. Is converted so that the pulse width ratio on the side becomes smaller.

In the description of FIGS. 4 to 6, FIG.
(A) and (b) correspond to the conversion of (a) and (c) in FIG. 4, respectively, and (a) and (b) in FIG.
(D) and (b).

In the power supply voltage control circuit of this embodiment, FIG.
As shown in the figure, the pulse width conversion circuit FPC
With respect to DD, the pulse width PW1 on the high level side of the control signals S and SB is not changed, and only the pulse width PW2 on the low level side is converted by changing the pulse period. As a result, the duty ratio changes with respect to the power supply voltage VDD,
The ratio of the series connection and the parallel connection of the batteries B1 and B2 is changed. Next, Embodiment 2 of the power supply voltage control circuit of the present invention
A method of changing the duty ratio without changing the pulse period of the control signal to change the ratio of the series connection and the parallel connection of the batteries B1 and B2 will be described.

FIG. 7 is a block diagram showing a pulse conversion circuit VPC in a power supply voltage control circuit according to a second embodiment of the present invention. Other blocks in the power supply voltage control circuit of the present embodiment are the same as those in FIGS.

Referring to FIG. 7, a pulse conversion circuit VPC in the power supply voltage control circuit of the present embodiment includes a constant frequency oscillation circuit FG for outputting a constant frequency oscillation signal V8, and a level conversion circuit for level converting power supply voltage VDD. LC and a comparison circuit DET for comparing the output V7 and the oscillation signal V8 of the level conversion circuit LC and outputting the comparison result as control signals S and SB.

The constant frequency oscillation circuit FG generates an oscillation signal V8 having a substantially constant frequency regardless of the power supply voltage VDD. The level conversion circuit LC detects the power supply voltage VDD,
The output voltage V7 is output in proportion to the power supply voltage VDD. Here, it is described that the power supply voltage VDD is level-shifted and amplified. When the output voltage V7 and the oscillation signal V8 are input to the comparison circuit DET, the output voltage V7 functions as a comparison threshold voltage with respect to the oscillation signal V8, so that the level of the output voltage V7 changes.
The operation is performed so that the duty ratio of the control signals S and SB output from the comparison circuit DET changes.

FIG. 8 is an explanatory diagram for explaining the operation of the power supply voltage control circuit of this embodiment. Each waveform in FIG. 8 indicates the power supply voltage VDD or the control signal S. The control signal SB is omitted because it is a complementary signal of the control signal S. As in the feedback operation of the power supply voltage control circuit of the first embodiment shown in FIG. 4, the power supply voltage VDD is fed back by the control signals S and SB.
The operation is performed so that the power supply voltage VDD becomes a predetermined constant voltage. Arrows (a) to (d) in FIG. 8 indicate the operation order of the feedback loop. That is, when the power supply voltage VDD increases, the pulse width PW1 of the control signal S decreases by the pulse conversion circuit VPC as shown by the arrow (b), and when the pulse width PW1 of the control signals S and SB decreases, the power supply voltage generation circuit circuit decreases. PS, the power supply voltage VD as shown by the arrow (c).
D becomes smaller. Further, when the power supply voltage VDD decreases, the pulse width PW1 of the control signal S increases as shown by the arrow (d) by the pulse conversion circuit VPC, and the control signals S,
When the pulse width PW1 of the SB increases, the power supply voltage VDD increases as indicated by an arrow (a).

In the feedback operation of the power supply voltage control circuit of the present embodiment, the duty ratio changes while the control signal S has a constant period in this case. Pulse duty ratio PW1 / P
Since the increase / decrease of W2 changes in the same direction as in the first embodiment in FIG. 4, the function is the same.

FIG. 9 shows the pulse conversion circuit VP of FIG.
It is a waveform diagram which shows operation | movement of C. Each waveform in FIG. 9 shows the power supply voltage VDD in the pulse conversion circuit VPC in FIG. 7 and the level conversion circuit LC and the constant frequency oscillation circuit FG corresponding thereto.
And the control signal S. As in the operation of the pulse conversion circuit VPC of the first embodiment shown in FIG. 6, the pulse conversion circuit VPC is a circuit that detects the power supply voltage VDD and feeds back the control signals S and SB. FIG. 9 (a)
As shown in the figure, when the power supply voltage VDD is large, the output voltage V7 of the level conversion circuit LC increases in proportion thereto, and the pulse width PW1 on the high level side of the control signal S which is an output compared with the oscillation signal V8. Becomes narrower, and the pulse width PW2 on the low level side becomes wider. Further, as shown in FIG. 9B, when the power supply voltage VDD is low, the output voltage V7 of the level conversion circuit LC decreases in proportion thereto,
The pulse width PW1 of the control signal S, which is the output compared with the oscillation signal V8, increases, and PW2 decreases. This allows
The increase / decrease of the duty ratio PW1 / PW2 is the same as that of the first embodiment in FIG.

The power supply voltage control circuit according to these embodiments, when there are a plurality of batteries or a power supply having the same function as the batteries, has a range from the voltage value when the batteries are connected in parallel to the voltage value when the batteries are connected in series. Thus, any power supply voltage can be generated. That is, in FIG. 1, the supply power supply voltage VDD is changed to the battery B shown in FIG. 2 by the setting of the power supply voltage generation circuit PS and the pulse conversion circuit VPC.
An arbitrary power supply voltage VDD can be set within a range from the voltage value V (B1) or V (B2) of V1, B2 to the value of V (B1) + V (B2).

[0028]

Next, each block in the power supply voltage control circuits of the first and second embodiments will be described in detail with reference to more specific drawings.

FIG. 10 is a circuit diagram showing an example of the switch circuit SW and the filter circuit LPF in the power supply voltage generation circuit PS of FIG. 2 in the power supply voltage control circuit of the first embodiment.

The switch circuit SW includes three relay elements S
1, S2, S3, each relay element S
1, S2 and S3 are connected in series. The connection point between the relay elements S1 and S2 is connected to one electrode of the battery B1, the connection point between the relay elements S2 and S3 is connected to one electrode of the battery B2, and the other end of the relay element S1 is connected to the battery. The other end of the relay element S3 is connected to the other electrode of B2, and is connected to the other electrode of B1, that is, the ground potential GND. The relay elements S1 and S3 are turned on when the control signal SB is at a high level, the potentials V1 and V3 become the same potential, and the potential V2 becomes the ground potential GND. The relay element S2 is turned on when the control signal S is at a high level, and the potentials V1 and V2 are the same. Assuming that the generated voltage of the battery B1, that is, the voltage between the potential V1 and the ground potential GND is V (B1), and the generated voltage of the battery B2, that is, the voltage between the potentials V3 and V2 is V (B2), the control signals S and SB are output. It can be seen that the voltage V3 has a waveform as shown in FIG.

The filter circuit LPF includes a resistor R1 and a capacitor C
1 and functions to output the average voltage of the input signal V3. In this case, the voltage can be averaged by setting the cut-off frequency sufficiently lower than the fundamental frequency of the input signal V3. Therefore, there is no problem even if a low-pass filter having another configuration is used. Further, the filter circuit LPF can use a circuit having a voltage averaging function, for example, an integration circuit, and thus need not be limited to the filter circuit.

FIG. 11 is a circuit diagram showing another example of the switch circuit SW in the power supply voltage generation circuit PS of FIG. 2 in the power supply voltage control circuit of the first embodiment. A switch is realized by using a MOS transistor instead of the relay element shown in FIG. Also in this circuit, when the control signals S and SB are at high level and low level, the transistors P1 and N2 are turned off, and the transistor P
2, N1 is turned on. When S and SB are at low level and high level, the transistors P1 and N2 are turned on and the transistors P2 and N1 are turned off. As a result, a waveform of the output voltage V3 as shown in FIG. 5 is obtained.

FIG. 12 is a circuit diagram showing an example of the variable oscillation circuit VFC in the pulse conversion circuit VPC of FIG. 3 in the power supply voltage control circuit of the first embodiment. The variable oscillation circuit VFC includes a voltage conversion circuit VD that converts the input voltage VDD to a voltage V5 having the opposite characteristic, and a variable oscillation unit VFC1 that inputs the voltage V5 having the opposite characteristic to the current source.
As shown in (2), when the voltage VDD increases, the voltage V5 decreases and the frequency of V4 decreases. In addition, the voltage VDD
Decreases, the voltage V5 increases, and the oscillation signal V4
Operate so as to increase the frequency.

The voltage conversion circuit VD includes resistors R2, R3, R
4 and an NMOS transistor N3, and a resistor R connected in series between the power supply voltage VDD and the ground potential GND.
2 and R3, the power supply voltage VDD is level-shifted to N
3, a resistor R4 and a transistor N
3 constitutes an inverter, and outputs a converted voltage V5 having a characteristic opposite to that of the power supply voltage VDD. The reverse characteristic means that the conversion voltage V5 decreases as the power supply voltage VDD increases, and the conversion voltage V5 increases as the power supply voltage VDD decreases. Therefore, the voltage conversion circuit VD can function as long as it is a circuit that level-shifts the value of VDD and reverses the characteristics by an inverter, and need not be limited to the circuit shown here. .

The variable oscillating unit VFC1 has a C with current control.
It is composed of a MOS inverter chain. In other words, when the oscillation circuit is composed of an odd-numbered stage inverter feedback circuit and a MOS transistor for controlling the current flowing through the inverter, and the gate voltage input to the NMOS transistors N4, N5 and N6 shown in FIG. , The frequency of V4 increases, and conversely, if the gate voltage is low, the frequency of V4 decreases. Although the variable oscillation unit VFC1 forms an inverter chain with three stages, there is no need to limit to this, and the variable oscillation unit VFC1 operates if it is an odd-numbered stage. In addition, since the variable oscillation unit VFC1 functions as long as it is an oscillation circuit whose frequency can be varied by a voltage, there is no need to be particularly limited to the circuit of FIG. The set value of the power supply voltage VDD is set in advance by circuit constants. However, when the power supply voltage VDD is to be externally controlled for evaluation or fine adjustment, the conversion voltage V5 can be controlled by applying a control voltage from the outside. Becomes

FIG. 13 is a circuit diagram showing an example of the pulse width conversion circuit FPC in the pulse conversion circuit VPC of FIG. 3 in the power supply voltage control circuit of the first embodiment. The pulse width conversion circuit FPC includes an odd-numbered stage CMOS inverter and outputs a signal V6 obtained by delaying and inverting the input signal V4, and a CMOS transistor. The input signal V4 and the signal V6 are supplied to the control signal. And an AND / NAND circuit PD that outputs S and SB. This pulse width conversion circuit FPC generates pulse signals as control signals S and SB in accordance with the frequency of the input signal V4, and the pulse width is equal to the delay amount of the delay circuit DL. The delay circuit DL functions if it has the functions of delay and inverted output, and need not be limited to the circuit shown in FIG. Further, the AND / NAND circuit PD can be replaced with, for example, an OR / NOR circuit or an EXOR circuit.

FIG. 14 is a waveform chart showing the operation of pulse width conversion circuit FPC of FIG. Each waveform in FIG.
The input signal V4, the signal V6, and the control signal S are shown. The delay amount of the block DL is equal to PW1, and P
The value obtained by subtracting W1 is PW2. PW1 is block DL
, PW2 increases as the wavelength of the input signal V4 increases, and PW2 decreases as the wavelength of the input signal V4 decreases. As a result, PW1 / PW1 /
An operation is performed so that the value of PW2 changes.

FIG. 15 is a circuit diagram showing an example of the level conversion circuit LC in the pulse conversion circuit VPC of FIG. 7 in the power supply voltage control circuit of the second embodiment. This level conversion circuit LC includes a VDD voltage dividing circuit composed of resistors R5 and R6 and P
The inverter circuit includes an MOS transistor P12 and a resistor R7. As shown in FIG. 9, as the power supply voltage VDD approaches the potential V (B1) + V (B2), the conversion voltage V7 becomes equal to the power supply voltage VDD, and the power supply voltage VDD becomes the potential V (B1) or V (B1). B
As approaching 2), the conversion voltage V7 becomes the ground potential GND.
Operate to be equal to

FIG. 16 is a circuit diagram showing an example of the constant frequency oscillation circuit FG in the pulse conversion circuit VPC of FIG. 7 in the power supply voltage control circuit of the second embodiment. This oscillation circuit FG
Is a diode-connected PM with source and gate electrodes
It is composed of an odd-numbered stage CMOS inverter chain circuit in which OS transistors P16 to P18 and NMOS transistors N16 to N18 are inserted between the power supply and the ground, respectively. These diode-connected transistors P1
Reference numerals 6 to P18 and N16 to N18 denote diodes for reducing the output amplitude width. This is because when comparing the oscillation output V8 of the constant frequency oscillation circuit FG with the conversion output V7 of the level conversion circuit LC, as shown in FIG. 9, the amplitude of the oscillation output V8 is smaller than the variable width of the conversion output V7. Therefore, there is an effect that the comparison sensitivity is increased. The constant frequency oscillation circuit FG does not need to be limited to the circuits listed here as long as the oscillation width can control the amplitude width to some extent.

FIG. 17 shows a comparison circuit DE in the pulse conversion circuit VPC of FIG. 7 in the power supply voltage control circuit of the second embodiment.
FIG. 9 is a circuit diagram showing an example of T. This comparison circuit DET
Are NMOS transistors N22-N23, resistor R8-
The differential amplifier circuit includes a differential amplifier circuit including R9 and a current source CS1, and buffer circuits BUF1 and BUF2. The conversion output V7 and the oscillation output V8 are input to the differential amplifier circuit, and the comparison results are sufficiently amplified by the buffer circuits BUF1 and BUF2 to output the control signals S and SB. This comparison circuit D
As shown in FIG. 9, ET indicates that the oscillation output V8 is the conversion output V
If it is larger than 7, the control signal S operates to be at a high level.

[0041]

As described above, the power supply voltage control circuit according to the present invention, when a plurality of batteries are used, controls the rate at which the interconnection of the batteries is switched in series or in parallel, thereby reducing An arbitrary power supply voltage can be generated and stably supplied in a voltage range from the output voltage of the power supply to the output voltage at the time of parallel connection.

Also, there is an effect that a constant power supply voltage can be stably supplied without depending on the voltage drop of each battery due to the life of each battery.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a power supply voltage control circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a detailed configuration example of a power supply voltage generation circuit PS of FIG. 1;

3 is a block diagram illustrating a detailed configuration example of a pulse conversion circuit VPC of FIG. 1;

FIG. 4 is an explanatory diagram illustrating an operation of the power supply voltage control circuit of FIG. 1;

FIG. 5 is an explanatory diagram illustrating an operation of the power supply voltage generation circuit PS of FIG. 2;

FIG. 6 is an explanatory diagram illustrating an operation of the pulse conversion circuit VPC of FIG. 3;

FIG. 7 is a block diagram showing a pulse conversion circuit VPC in a power supply voltage control circuit according to a second embodiment of the present invention.

FIG. 8 is an explanatory diagram illustrating the operation of the power supply voltage control circuit according to the second embodiment of the present invention.

9 is a waveform chart showing an operation of the pulse conversion circuit VPC of FIG.

10 is a diagram showing a switch circuit SW and a filter circuit LP shown in FIG. 2;
It is a circuit diagram showing an example of F.

FIG. 11 is a circuit diagram showing another embodiment of the switch circuit SW of FIG. 2;

FIG. 12 is a circuit diagram illustrating an embodiment of the variable oscillation circuit VFC of FIG. 3;

FIG. 13 is a circuit diagram showing an embodiment of the pulse width conversion circuit FPC of FIG. 3;

14 is a waveform chart showing an operation of the pulse width conversion circuit FPC of FIG. .

FIG. 15 is a circuit diagram showing an embodiment of the level conversion circuit LC of FIG. 7;

FIG. 16 is a circuit diagram showing an embodiment of the constant frequency oscillation circuit FG of FIG.

FIG. 17 is a circuit diagram showing an embodiment of the comparison circuit DET of FIG. 7;

FIG. 18 is a schematic circuit diagram showing an example of the related art.

FIG. 19 is a circuit diagram showing another example of the related art.

FIG. 20 is a circuit diagram showing the operation in FIG.

[Explanation of symbols]

PS power supply voltage generation circuit VPC pulse conversion circuit LD power supply voltage VDD supply target circuit SW, SWT switch circuit LPF filter circuit VFC, VFC1 variable oscillation circuit FPC pulse width conversion circuit VD voltage conversion circuit VD2 voltage detection circuit DL delay circuit PD pulse generation Circuit LC Level conversion circuit FG Constant frequency oscillation circuit DET Comparison circuit BUF1, BUF2 Buffer circuit GND Ground potential VDD Supply power supply voltage S, SB Switching control signal V1 to V8 Node voltage B1, B2, B3, B4, B5 Battery or equivalent S1 to S3 Relay elements SW1 to SW7 Switches P1 to P18 PMOS transistors N1 to N23 NMOS transistors R1 to R9 Resistances C1, CP1, CP2 Capacitors 1 to 29 Input / output terminals or terminals of each block De

Claims (4)

[Claims] 1. A power supply voltage control circuit for controlling and supplying a power supply voltage, comprising a series / parallel switching circuit for switching an interconnection of a plurality of batteries to a series or parallel connection by a control signal, wherein the output voltage of the series / parallel switching circuit is A power supply voltage control, comprising: a power supply voltage generation circuit for leveling and supplying the power supply voltage; and a pulse conversion circuit for generating a pulse signal having a duty ratio corresponding to the power supply voltage and outputting the pulse signal as the control signal. circuit. 2. The power supply voltage control circuit according to claim 1, wherein said power supply voltage generation circuit includes said plurality of batteries, said series-parallel switching circuit, and a filter circuit for leveling an output voltage thereof. 3. A variable oscillation circuit whose oscillation frequency changes in accordance with the power supply voltage, and a pulse which receives an output of the variable oscillation circuit and converts a pulse width in accordance with the power supply voltage. The power supply voltage control circuit according to claim 1, further comprising a width conversion circuit. 4. A constant frequency oscillation circuit for outputting a constant frequency oscillation signal, a level conversion circuit for level converting the power supply voltage, and a comparison between an output of the level conversion circuit and the oscillation signal. 3. The power supply voltage control circuit according to claim 1, further comprising: a comparison circuit that outputs a result of the comparison as the control signal.