JPH10325886A - Oscillation circuit, electronic circuit using it, semiconductor device using them, and electronic instrument and timepiece - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stably perform oscillation in small power consumption, by synchronizing supply electric power for a signal inversion amplifier with the output of the amplifier by an electric power control circuit, and performing ON-OFF control. SOLUTION: With regard to this crystal oscillation circuit, a feedback circuit composed of a crystal oscillator 10 and a resistor 4 is inputted to a signal inversion amplifier 20 as a gate signal VG(t) inverting output VD(t) of the signal inversion amplifier 20 by 180 deg.. At this time the circuit has a power control circuit composed of a field effect transistor 40 and a switch control circuit 44 as a switching element for power supply, and is synchronized with the output D(t) of the signal inversion amplifier 20 to perform ON-OFF control of power supply. In other words, with regard to the transistor 40, a source is connected to the side of potential VDD of an earth, and a drain is connected to the source side of the transistor 26 of the signal inversion amplifier 20. A switch control signal 100 is applied to the gate of the transistor 40 by the control circuit 44, and the transistor 40 is synchronized with the output VD(t) of the signal inversion amplifier 20 to perform ON-OFF control.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation circuit, an electronic circuit using the same, a semiconductor device using the same, an electronic device, and a timepiece.

[0002]

2. Description of the Related Art Oscillation circuits using quartz oscillators have been widely used in portable wristwatches, portable telephones, computer terminals, and the like. In such a portable electronic device, it is necessary to save power consumption and extend the life of the battery.

[0003] From the viewpoint of saving power consumption, the present inventor analyzed the power consumption of an electronic circuit used in a portable electronic device, particularly a wristwatch. From this analysis, it was confirmed that the power consumption of the crystal oscillation circuit in the electronic circuit formed on the semiconductor substrate was smaller than that of the other circuit portions. That is, it has been found that reducing the power consumption of the oscillation circuit of the electronic circuit used in the portable electronic device is effective in extending the life of the battery used.

In such a crystal oscillation circuit, when a voltage Vreg is applied to the signal inverting amplifier, the output of the signal inverting amplifier is inverted by 180 degrees and fed back to the gate. As a result, the pair of transistors constituting the signal inverting amplifier are alternately turned on and off, the oscillation output of the crystal oscillation circuit is gradually increased, and finally the vibrator vibrates stably.

However, after stable oscillation, oscillation can be continued by supplementing the loss of inertia energy of the vibrator, so that less energy is required than at the time of startup.

Nevertheless, in the conventional crystal oscillation circuit, the pair of transistors are always turned on and off alternately both at the time of start-up and after stable oscillation, so that the power consumption of the entire circuit is reduced. The present inventor has found that this has been a major factor in increasing.

An object of the present invention is to provide a crystal oscillation circuit capable of stably oscillating with low power consumption, an electronic circuit using the same, a semiconductor device using the same, an electronic device, and a timepiece.

[0008]

According to a first aspect of the present invention, there is provided an oscillator circuit comprising: a signal inverting amplifier;
A power control circuit that controls on / off of the power supplied to the signal inverting amplifier in synchronization with an output of the signal inverting amplifier;
It is characterized by including.

With the above configuration, power consumption can be reduced while the oscillation circuit is being driven by stable oscillation.

According to a second aspect of the present invention, in the oscillation circuit according to the first aspect, the power control circuit includes a power supply switching element provided on a power supply line to the signal inverting amplifier, and the power supply switching element. And a switch control circuit that performs on / off control in synchronization with the output of the signal inverting amplifier.

According to the present invention, low power consumption can be achieved with a simple configuration in which the power supply line is turned on and off.

According to a third aspect of the present invention, in the oscillation circuit according to the second aspect, the oscillation circuit further includes a crystal oscillator connected between an output side and an input side of the signal inverting amplifier, and outputs an output signal of the signal inverting amplifier. A feedback circuit that inverts the phase and feeds back the signal to the signal inverting amplifier; the signal inverting amplifier is connected to a first potential side, and is driven on and off by the feedback input to excite the crystal resonator; A first circuit including one semiconductor switching element, and a second potential side different from the first potential,
A second circuit including a second semiconductor switching element that is turned on and off at a timing different from that of the first semiconductor switching element by the feedback input, and that drives the crystal resonator to be excited. , Connected in series with at least one semiconductor switching element of the first and second circuits, the switch control circuit controls an on / off duty ratio of power supply to the at least one semiconductor switching element, The power supply switching element is turned on and off.

In the oscillation circuit according to the present invention, the first and second semiconductor switching elements constituting the signal inverting amplifier are alternately turned on and off in a stable oscillation state.

At this time, the power supply switching element is connected in series with at least one of the first and second semiconductor switching elements, and controls on / off of power supply to the signal inverting amplifier.

Thus, the on / off duty ratio of the power supply to at least one of the semiconductor switching elements can be controlled so that the power consumption can be reduced.

The oscillation circuit according to the fourth aspect of the present invention is characterized in that:
3. In any one of 3, the power control circuit includes an output cutoff switching element on an output side of the signal inverting amplifier, and the switch control circuit outputs the output signal in synchronization with off control of the power supply switching element. The shut-off switching element is controlled to be off.

That is, when the power supply switching element is connected to only one of the first and second semiconductor switching elements constituting the signal inverting amplifier, the power supply switching element is connected in series when the power supply switching element is turned off. The other one of the semiconductor switching elements that is not connected is turned on, and the potential level of the crystal oscillator shifts to the potential of the other one of the semiconductor switching elements, and as a result, the vibration is suppressed. There are cases.

On the other hand, according to the present invention, the output shutoff switching element connected to the output side of the signal inverting amplifier is turned off in synchronization with the off control of the power supply switching element, whereby the crystal is turned off. A shift in the potential level of the vibrator can be prevented, and the inertial vibration of the vibrator can be continued more stably.

According to a fifth aspect of the present invention, in the oscillator circuit according to the third or third aspect, the first and second semiconductor switching elements and the power supply switching element of the signal inverting amplifier are The first and second semiconductor switching elements are configured using a field effect transistor element of an enhancement type, and the threshold voltage of the field effect transistor element configuring the switching element for power supply is higher than that of the field effect transistor element configuring the switching element for power supply. Is characterized in that its absolute value is relatively small.

According to the present invention, each semiconductor switching element is configured using an enhancement type field effect transistor.

The first and second semiconductor switching elements constituting the signal inverting amplifier are of the enhancement type as described above, and the threshold voltage is set to a small value. As a result, the absolute value of the power supply voltage required to operate the signal inverting amplifier stably can be reduced, and power consumption can be reduced from this aspect as well.

It should be noted that if the threshold voltages of the first and second semiconductor switching elements are set to a small value, even if the field effect transistor is an enhancement type field effect transistor, the leakage current at the time of turning off the control will be a large value. Have been. However, according to the present invention, as described above, the power supply switching element is formed using an enhancement type field effect transistor, and its threshold voltage is set to a high value. This makes it possible to reliably reduce the above-described leakage current when the power supply switching element is turned off, so that power consumption can be further reduced and stable oscillation can be performed.

As described above, according to the present invention, a signal inverting amplifier can be driven by using a low power supply voltage, and an off-leak current can be reliably reduced. An oscillation circuit can be realized.

According to a sixth aspect of the present invention, in the oscillation circuit according to the second or third aspect, the power supply switching element is configured using a depletion type field effect transistor element. .

Thus, when the power supply switching element is turned off, the output voltage of the signal inverting amplifier is stabilized by the current flowing through the switching element, and the whole circuit can perform the oscillation operation stably. .

The oscillating circuit according to the invention of claim 7 is characterized in that:
In any one of the above 6, the power supply switching element is configured using a field effect transistor element connected in series with a semiconductor switching element constituting the signal inversion amplifier, and a switch control circuit includes an output of the signal inversion amplifier. To the gate of the power supply switching element, so as to control the on / off duty ratio of power supply to the series-connected semiconductor switching elements,
On / off control of the power supply switching element is performed.

According to the present invention, the output of the signal inverting amplifier is input to the gate of the power supply switching element, and on / off control is performed in synchronization with the output of the signal inverting amplifier.

This power supply switching element comprises a first
And a second semiconductor switching element, which is connected in series with at least one of the second semiconductor switching element and controls on / off of power supply to the signal inverting amplifier.

Thus, power is supplied so as to compensate for the loss of the inertial energy of the crystal oscillator during stable oscillation of the oscillation circuit, and oscillation is continuously and stably performed, and furthermore, the power consumption is reduced. The on / off duty ratio of the power supply to the semiconductor switching element can be controlled.

As described above, according to the present invention, the power supply to the switching element for power supply is automatically turned on / off by using the output of the signal inverting amplifier, thereby reducing the power consumption and the stable oscillation. Can be achieved well.

According to an eighth aspect of the present invention, in the oscillation circuit according to the seventh aspect, the switch control circuit includes a bias circuit for applying a DC bias voltage to a gate of the power supply switching element, and the DC bias voltage is: A DC potential of an input signal from the signal inverting amplifier to a gate of the switching element for power supply is shifted.

That is, when the first and second semiconductor switching elements constituting the signal inverting amplifier have a small threshold voltage and the power supply voltage is reduced to reduce the power consumption, the absolute value of the output voltage of the signal inverting amplifier is reduced. The value is also small.

On the other hand, when a power supply semiconductor switching element having a large threshold voltage is used so as to reduce the off-leakage current, the power supply semiconductor switching element can be stabilized at the output voltage of the signal inverting amplifier. On-off control may not be possible.

In such a case, as in the present invention, a DC bias voltage is applied to the gate of the power supply semiconductor switching element, and the DC potential of an input signal to this gate can be reliably controlled on / off. Shift to As a result, even when the absolute value of the voltage of the output signal of the signal inverting amplifier is small, it is possible to obtain an oscillation circuit that stably turns on and off the power supply switching element, consumes less power, and performs oscillation more stably. Can be.

Further, according to the present invention, by applying the DC bias voltage, it is possible to use a switching element for power supply having a large threshold voltage and a small off-leakage current. The power consumption of the entire circuit can be reduced.

According to the ninth aspect of the present invention, there is provided an oscillation circuit comprising:
8, the switch control circuit may determine an on / off duty ratio of power supply to the series-connected semiconductor switching elements based on a comparison result between an output of the signal inverting amplifier and at least one reference voltage. The power supply switching element is controlled to be turned on and off so as to be controlled.

According to the present invention, based on a comparison result between the output of the signal inverting amplifier and at least one reference voltage,
On / off control of the power supply switching element is performed. At this time, it is preferable that at least one reference voltage is set to a minimum necessary reference voltage for the signal inverting amplifier to perform stable oscillation.

Thus, when the output voltage of the signal inverting amplifier falls below the reference voltage, the power supply switching element is turned off. When the output voltage of the signal inverting amplifier exceeds the reference voltage, the power supply switching element is turned on.

By doing so, the power supply switching element is feedback-controlled so that the signal inverting amplifier supplies power only for the minimum period necessary for stable oscillation, and as a result, low power consumption is achieved. In addition, it is possible to realize an oscillation circuit capable of performing more stable oscillation.

The oscillating circuit according to the tenth aspect of the present invention provides the oscillating circuit according to the first aspect.
In the above, the power control circuit may include a power supply switching element provided in a feedback circuit to the signal inversion amplifier, and a switch control for turning on and off the power supply switching element in synchronization with an output of the signal inversion amplifier. And a circuit.

According to the present invention, on / off control of the feedback input to the signal inverting amplifier is performed in synchronization with the output of the signal inverting amplifier. Accordingly, the signal inverting amplifier operates in the same manner as when the supply power is on / off controlled, and it is possible to reduce the power consumption.

According to the eleventh aspect of the present invention, there is provided the oscillation circuit according to the first aspect.
0, the signal inverting amplifier is connected to a first potential side, and includes a first circuit including a first semiconductor switching element that is driven on and off by the feedback input to excite and drive the crystal resonator; A second semiconductor switching element which is connected to a second potential side different from the potential of the first semiconductor switching element and is driven on and off at a timing different from that of the first semiconductor switching element by the feedback input to drive the crystal resonator to drive. A power supply switching element, wherein the power supply switching element is connected to a gate of at least one semiconductor switching element of the first and second circuits, and a switch control circuit supplies power to the at least one semiconductor switching element. The power supply switching element is controlled so as to control an on / off duty ratio of supply. Characterized by - off control.

In the oscillation circuit of the present invention, the first and second semiconductor switching elements constituting the signal inverting amplifier are alternately turned on and off in a stable oscillation state.

At this time, the power supply switching element controls an on / off duty ratio of power supply to at least one of the first and second semiconductor switching elements so as to reduce power consumption. be able to.

According to a twelfth aspect of the present invention, there is provided the oscillation circuit of the first aspect.
In any one of 0 and 11, the switch control circuit sets an on / off duty ratio of power supply to the at least one semiconductor switching element based on a comparison result between an output of the signal inverting amplifier and at least one reference voltage. The power supply switching element is controlled to be turned on and off so as to be controlled.

As described above, the feedback control of the power supply switching element is automatically performed using the comparison result between the output of the signal inverting amplifier and the reference voltage.
An oscillation circuit capable of reducing power consumption and maintaining stable oscillation can be obtained.

According to a thirteenth aspect of the present invention, in any one of the first to twelfth aspects, the crystal unit having a large Q value is used.

As described above, by using a crystal resonator having a large Q value representing the easiness of mechanical vibration, the oscillation state can be stably reduced with less power consumption after stable oscillation. It can be maintained.

An electronic circuit according to a fourteenth aspect of the present invention is the electronic circuit according to the first aspect.
13. An oscillator circuit according to any one of (1) to (13).

According to a fifteenth aspect of the present invention, there is provided a semiconductor device including the oscillation circuit according to any one of the first to thirteenth aspects or the electronic circuit according to the fourteenth aspect.

The electronic device according to the sixteenth aspect of the present invention provides the electronic device according to the first aspect.
13. An oscillator circuit according to any one of (1) to (13) or an electronic circuit according to claim 14.

By doing so, the power consumption of a portable electronic device such as a mobile phone or a portable computer terminal can be reduced, and the power consumption of a built-in battery or a secondary battery such as a battery can be reduced. It is possible to do.

A timepiece according to a seventeenth aspect of the present invention is the timepiece according to the first aspect.
The electronic circuit according to any one of claims 1 to 3, further comprising:

By doing so, a portable timepiece with low power consumption can be realized. As a result, the size of the entire timepiece can be reduced by using a smaller battery, and the same In the case of using a battery having a capacity of, it is possible to extend the life of the battery.

[0055]

Next, preferred embodiments of the present invention will be described in detail with reference to the drawings.

First Embodiment FIG. 1 shows a crystal oscillation circuit according to a preferred first embodiment of the present invention, and FIG. 2 shows a timing chart thereof. The crystal oscillation circuit of the present embodiment is a crystal oscillation circuit used in a quartz wristwatch.

The crystal oscillation circuit of the present embodiment includes a signal inverting amplifier 20, a crystal oscillator 10 and a resistor 14 constituting a feedback circuit. The feedback circuit includes a quartz oscillator 10 and a resistor 14,
It is configured to include capacitors 16 and 18 for phase compensation,
The output VD (t) of the signal inverting amplifier 20 is fed back to the signal inverting amplifier 20 as a gate signal VG (t) whose phase is inverted by 180 degrees.

The signal inverting amplifier 20 is connected to a first potential side and a lower potential side of a second potential side, and is configured to be supplied with power and driven by a potential difference between the two potentials. Here, the first potential is a ground potential VDD.
, And the second potential is set to a negative power supply voltage Vreg supplied from a power supply circuit (not shown).

The signal inverting amplifier 20 includes a first circuit 2
2 and a second circuit 24.

The first circuit 22 includes a P-type field effect transistor 26 functioning as a first semiconductor switching element. This transistor 26
The source and drain are the ground side and the output terminal 3
The feedback signal VG (t) is applied to its gate.

The second circuit 24 includes an N-type field effect transistor 28 functioning as a second semiconductor switching element. This transistor 28
Has its source and drain connected to the negative power supply voltage Vreg side supplied from a power supply circuit unit (not shown) and the output terminal 30 side (here, connected to the drain of the transistor 26), and has its gate connected to The feedback signal VG (t) is applied.

The crystal oscillation circuit of the present embodiment controls the power supplied to the signal inverting amplifier 20 to turn on and off in synchronization with the output VD (t), so that the field effect transistor 40 functioning as a power supply switching element is used. And a switch control circuit 44 for controlling the transistor 40.

The transistor 40 is formed using a P-type field effect transistor, and its source is connected to the ground potential VDD and its drain is connected to the source of the transistor 26.

The switch control circuit 44 applies a switch control signal 100 to the gate of the transistor 40, and connects the transistor to the output VD of the signal inverting amplifier 20.
On / off control is performed in synchronization with (t).

FIG. 2 shows a timing chart of the crystal oscillation circuit of the present embodiment.

As shown in the figure, the switch control circuit 44
The switch control signal 100 is synchronized with the drain output VD (t).
Is output. The switch control signal 100 has an L level during a period t during a pulse output period of T, and an H level during a period t ′.
Level. Thereby, the field effect transistor 40
Is controlled to be on to supply power to the signal inverting amplifier 20 during the period t, and is controlled to be off during the period t 'to stop the power supply.

The power supply on / off control is performed in synchronization with the drain output VD (t). In other words,
This is performed in synchronization with the gate input VG (t) which is a feedback input to the signal inverting amplifier 20.

Therefore, on condition that the field effect transistor 40 is controlled to be on, the transistor 26 connected in series to this is controlled to be on based on the gate input VG (t).

As described above, in the crystal oscillation circuit of this embodiment,
The power supply to the signal inverting amplifier 20 is intermittently performed, and the on / off duty ratio during the on-operation period of the transistor 26 is controlled. Even in this case, the quartz oscillator 10
Due to the inertia (free vibration), the crystal oscillation circuit can continue to oscillate, and as a result, power consumption during stable oscillation can be reduced.

Here, it is preferable to use a quartz resonator 10 having a large Q value indicating the easiness of mechanical vibration. Thus, the inertia (free vibration) of the vibrator 10 increases, and even when the signal inverting amplifier 20 is intermittently driven, more stable oscillation can be maintained.

In this embodiment, each of the transistors 26 and 28 constituting the signal inverting amplifier 20 is formed by using an enhancement type field effect transistor, and its threshold voltage is set to a small value. . Thus, the absolute value of the power supply voltage Vreg required for stably driving the signal inverting amplifier 20 can be reduced, and power consumption can be reduced in this respect as well.

That is, the power consumption of the signal inverting amplifier 20 is:
It is proportional to the square of the power supply voltage Vreg applied thereto. Therefore, lowering the applied voltage is effective in reducing power consumption. However, the signal inverting amplifier 2
In order to drive 0, the power supply voltage Vreg must be set to a value larger than that in the case of the threshold of the transistors 26 and 28.

In the present embodiment, since the threshold voltages of the transistors 26 and 28 are set to a small value as described above, the value of the power supply voltage Vreg is also reduced, and power consumption is reduced from this aspect. be able to.

If the threshold voltages of the transistors 26 and 28 are set to a small value, the leakage current at the time of off-control of the field-effect transistor of the enhancement type becomes large even in the case of an enhancement type field effect transistor.

In order to solve this problem, in the present embodiment, the power supply field-effect transistor 40 is
A device having a high threshold voltage is used so that the above-described off-leak current is reliably reduced.

As a result, according to the present embodiment, signal inverting amplifier 20 can be driven using low power supply voltage Vreg,
In addition, since the off-leak current can be reliably reduced, a crystal oscillation circuit that consumes less power and can perform stable oscillation can be realized.

The transistor 40 used as the power supply semiconductor switching element preferably has a high capability within an allowable range in order to reduce the ON resistance and reduce the voltage drop.

In the present embodiment, an example has been described in which the power supply to the signal inverting amplifier 20 is controlled by turning on and off the field effect transistor 40. However, for example, a constant voltage for supplying the power supply voltage Vreg The circuit unit itself may be configured to have a function of intermittently turning on and off the supply power Vreg at timings t and t ′ shown in FIG. With this configuration, the same operation and effect as those of the first embodiment can be achieved without using the transistor 40.

Second Embodiment FIG. 3 is a circuit diagram of a crystal oscillation circuit according to a second embodiment,
FIG. 4 shows the timing chart. Members corresponding to those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

This embodiment is characterized in that the signal inverting amplifier 2
That is, the switch control circuit 44 that generates the switch control signal 100 using the output VD (t) of 0 is used.

The switch control circuit 44 includes an inverter 46, a resistor 48, and a capacitor 50.
Here, the resistor 48 is connected between the gate of the transistor 40 and the ground potential VDD. The output VD (t) of the signal inverting amplifier 20 is supplied to the transistor 4 via the inverter 46 and the DC component removing capacitor 50.
The switch control signal 100 is applied to the 0 gate.

FIG. 4 is a timing chart of the operation.

The DC bias component (Vreg / 2) of the output VD (t) is removed by the capacitor 50, and the switch control signal 100 is applied to the gate of the transistor 40. As a result, the input voltage 1 to this gate
During a period t in which 00 is lower than the negative threshold voltage VTH of the transistor 40, the transistor 40 is turned on.

As described above, according to the crystal oscillation circuit of the present embodiment, the power supplied to the signal inverting amplifier 20 can be controlled on / off to reduce power consumption.

In particular, according to the present embodiment, the switch control signal 100 is controlled by using the output VD (t) of the signal inverting amplifier 20.
Is generated, the power supply is automatically turned on / off at an appropriate duty ratio, and power consumption can be reduced.

Third Embodiment FIG. 5 shows a third embodiment of the crystal oscillation circuit of the present invention, and FIG. 6 shows a timing chart thereof. Note that members corresponding to those in the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted.

The feature of this embodiment is that a bias circuit 60 is further provided in the crystal oscillation circuit shown in FIG.

That is, if the transistors 26 and 28 constituting the signal inverting amplifier 20 have a small threshold voltage and Vreg is reduced, the output voltage VD
The absolute value of (t) is also small. In contrast,
As described above, when a transistor having a large threshold voltage is used as the field effect transistor 40, in the above-described crystal oscillation circuit of the type shown in FIG. 3, the gate input voltage of the transistor 40 is too low. This cannot be stably controlled on / off, and may be weak to noise.

For this reason, in the crystal oscillation circuit of the present embodiment shown in FIG. 5, a bias circuit 60 for applying a DC bias voltage to the gate of the transistor 40 is provided.

The bias circuit 60 of the present embodiment divides the power supply voltage Vreg by using two resistors 62 and 64, and applies a DC bias voltage of (Vreg / 2) to the gate of the transistor 40 as shown in FIG. Is applied.

Thus, even when the output voltage VD (t) of the signal inverting amplifier 20 is small, the switch control signal 100 in which the DC bias voltage is superimposed on the output voltage VD (t).
Can be generated and applied to the gate of the transistor 40. As a result, the transistor 40 can be stably turned on and off to reduce the power consumption of the crystal oscillation circuit and ensure a stable oscillation operation.

Fourth Embodiment FIG. 7 shows a crystal oscillation circuit according to a fourth embodiment. Note that members corresponding to those in the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted.

This embodiment is characterized in that the signal inverting amplifier 2
That is, the output cutoff switching element 70 is provided in the 0 output stage.

For example, in the circuit as shown in FIG. 1, when the transistor 40 is turned off, the transistor 28 constituting the signal inverting amplifier 20 is turned on, and the inertial vibration (free vibration) of the crystal unit 10 becomes L level (Vreg level). ), The oscillation may be suppressed.

Therefore, the present embodiment employs a configuration in which an output cutoff switching element 70 is provided at the output stage of the signal inverting amplifier 20, and when the transistor 40 is turned off, this switching element 70 is also turned off. Accordingly, the vibrator 10 can be separated from the circuit of the signal inverting amplifier 20 and can vibrate freely when the transistor 40 is turned off.

As a result, according to the crystal oscillation circuit of the present embodiment, the oscillation circuit can be operated more stably when the signal inverting amplifier 20 is intermittently driven by the transistor 40.

Here, as the output cutoff switching element 70, for example, a transmission gate is preferably used.

Fifth Embodiment FIG. 8 shows a crystal oscillation circuit according to a fifth embodiment of the present invention. Note that members corresponding to those in the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted.

This embodiment is characterized in that the signal inverting amplifier 2
Field-effect transistors 40 and 42 for power supply are provided on both the ground (VDD) side and the power supply (Vreg) side of 0, and the on / off control of both transistors 40 and 42 is adopted at the same time.

The transistor 42 is formed using an N-type field effect transistor, and is set to have a large absolute value of the threshold voltage in order to reduce off-leakage current.

The switch control signal 100 is applied to the gate of one transistor 40 as it is, and is applied to the gate of the other transistor 42 via the inverter 52.

With the above configuration, the transistors 40 and 42 are simultaneously turned on / off by the switch control signal 100. For example, when the transistor 40 is turned off as in the circuit shown in FIG. There is no danger that the transistor 28 constituting the transistor will be turned on and the inertial vibration (free vibration) of the crystal resonator 10 will be pulled to the potential of the L level (Vreg level) to suppress the vibration. Therefore, it is not necessary to provide the output cutoff switching element 70 shown in FIG. 7 in the circuit of the present embodiment.

Sixth Embodiment FIG. 9 shows a crystal oscillation circuit according to a sixth embodiment and its timing chart in FIG. Note that members corresponding to those in the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted.

The feature of the present embodiment is that the switch control circuit 44 operates based on the comparison result between the output VD (t) of the signal inverting amplifier 20 and the reference voltage Vref.
Is a circuit that generates a switch control signal 100 that drives ON / OFF at an appropriate duty ratio.

The configuration will be described below.

The switch control circuit 44 of the present embodiment
The circuit includes a reference voltage generation circuit 72 and one comparator 74, and is configured to apply the output of the comparator 74 to the gate of the transistor 40 as a switch control signal 100.

The reference voltage generation circuit 72 generates a reference voltage V
Output ref. The reference voltage Vref is set to a value between the ground potential VDD and the potential (Vreg / 2) as shown in FIG.

The comparator 74 compares the reference voltage with the output VD (t) of the signal inverting amplifier 20, and outputs the comparison result as a switch control signal 100 as shown in FIG.

As shown in FIG. 10, this comparator 7
From 4, the switch control signal 100 is output so as to turn on the transistor 40 while the drain output VD (t) is higher than the reference voltage Vref, and to turn off the transistor 40 during other periods.

As described above, according to the present embodiment, by turning on / off the transistor 40 based on the result of comparison between the reference voltage and the drain output VD (t), an optimum state based on the oscillation state of the crystal oscillation circuit is obtained. By supplying power, it is possible to achieve more stable continuation of oscillation and lower power consumption.

Seventh Embodiment FIG. 11 shows a seventh embodiment of the crystal oscillation circuit, and FIG.
Shows a timing chart thereof. Note that members corresponding to those in the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted.

This embodiment is characterized in that the switch control circuit 44 selects an appropriate reference voltage Vref based on the value of the output voltage VD (t) of the signal inverting amplifier 20, and determines an optimum duty cycle based on this reference voltage. Another object of the present invention is to use a circuit that enables more stable continuation of oscillation and lower power consumption by controlling the transistor 40 to be turned on and off in a ratio.

The configuration will be described below.

The switch control circuit 44 of the present embodiment is
.., Vref4, a multiplexer 80 for selecting and outputting any one of the reference voltages Vref, a comparator 84, an inverter 86, and the comparator 84 and the inverter 86. And a determination control unit 82 that determines the oscillation state of the circuit based on the outputs S3 and S4, and controls the reference voltage selected by the multiplexer 80. Here, the plurality of reference voltages Vref1.
ef4 is set to a value between the ground potential VDD and the power supply voltage Vreg.

Then, the reference voltage Vref (represented as a signal S13 in the figure) selected by the multiplexer 80 is applied to the comparator 84.

The output VD (t) of the signal inverting amplifier 20 is
Are comparators 84 as signals S1 and S2, respectively.
The signal is input to the inverter 86.

As shown in the timing chart of FIG. 12, the comparator 84 outputs an L level pulse signal when the drain output voltage VD (t) exceeds the reference voltage Vref input as the signal S13, and an H level pulse signal when the drain output voltage VD (t) falls below the reference voltage Vref. Output S3. The output S3 is input to the CK terminal of the counter 89 and is applied as a switch control signal 100 to the gate of the transistor 40.

The logic level of the inverter 86 is set to (Vreg / 2). As shown in FIG. 12, when the drain output VD (t) input as the signal S2 exceeds the logic level, the inverter 86 has the L level. When it falls below, the pulse signal S4 of H level is input to the CK terminal of the counter 88.

The judgment control unit 82 selects a reference voltage Vref corresponding to the voltage of the drain output VD (t) output from the signal inverting amplifier 20 based on the input pulse signals S3 and S4. Multiplexer 8
0 is applied, and the selected reference voltage Vref is applied to the comparator 84. Accordingly, the comparator 84 compares the reference voltage Vref with the drain output VD (t), and applies the pulse signal S3 functioning as the switch control signal 100 to the gate of the transistor 40. As a result, the duty ratio of the signal S3 applied to the gate of the transistor 40 reflects the voltage value of the drain output VD (t) of the signal inverting amplifier 20. The driving of the crystal oscillation circuit can be controlled with the limited supply power.

The configuration of the switch control circuit 44 will be described below.

First, the judgment control unit 82 includes the counters 88 and 89, the coincidence detection circuit 90, and the gate 9
1, 92, and 93 and an up-down counter 94.

The reset terminals R of the counters 88 and 89
The up / down clock U / DCK is input to one terminal of the gates 92 and 93 as a signal S11. The up-down clock outputs an H-level signal once every four periods of the oscillation output.

The gate 91 is supplied with a cycle signal S.
12 is input. The signal S12 outputs an H-level signal once every six cycles of the oscillation output.

Next, the operation of the switch control circuit 44 will be described with reference to the timing chart shown in FIG.

First, when the drain output VD (t) of the signal inverting amplifier 20 is input to the comparator 84 and the inverter 86 as the signals S1 and S2, the comparator 84 determines whether the signal S1 is input from the multiplexer 80 as the signal S13. The inverter 86 outputs an L-level pulse signal S4 every time the input signal S2 exceeds a predetermined logic level (Vreg / 2).

The judgment control section 82 outputs the two pulse signals S
3, S4 is compared, the oscillation state of the oscillation circuit is determined, and the switching of the reference voltage Vref selected by the multiplexer 80 is controlled.

Specifically, the output pulse S4 of the inverter 86 is counted by the counter 88,
The output pulse S3 is counted by a counter 89, and signals S5, S6,
S7 and S8 are input to the coincidence detection circuit 90. The count values of the counters 88 and 89 are periodically reset by an up / down clock S11 output once every four cycles.

The coincidence detecting circuit 90 has two counters 88, 8
When the count values of 9 match, an H level match detection signal S9 is output, and when they do not match, an L level mismatch detection signal S9 is output.

The output S9 of the coincidence detecting circuit 90 functions as a gate signal for opening the gates 93, 92 and 91. When the output S9 is at the H level, the condition is that the cycle clock S12 is at the H level. And input the up / down clock S11 to the down count terminal DK of the up / down counter 94. When the output S9 is at the L level, the up / down clock S11 is supplied to the up / down counter 9
4 to the up-count terminal UK.

The up-down counter 94 performs an up-count operation by a signal input to an up-count terminal UK, performs a down-count by a signal input to a down-count terminal DK, and uses the count values Q0 and Q1 as power supply voltage control signals. In step S14, the signals are input to the control signal input terminals A and B of the multiplexer 80. Here, the outputs Q0 and Q1 of the up / down counter 94 are "00" and "0".
The multiplexer 80 selects one of four types of reference voltages Vref1, Vref2,..., Vref4 corresponding to each of these four states of "1", "10", and "11". 84 is applied as a reference voltage Vref.

When the number of output pulses S3 of the comparator 84 is smaller than the number of output pulses S4 of the inverter 86, the coincidence detection circuit 90 of the present embodiment determines that the oscillation is unstable, and switches only the gate 93. Open, and input the up / down clock S11 to the up count terminal UK of the up / down counter 94. As a result, the outputs Q0 and Q1 of the up / down counter 94 control the multiplexer 80 to select the reference voltage Vref which is higher by one than the present. As a result, the voltage of the drain output VD (t) output from the signal inverting amplifier 20 increases, and stable oscillation can be maintained.

The coincidence detection circuit 90 is provided with both counters 8
If the count values of 8 and 89 match, that is, if the number of output pulses of the inverter 86 and the comparator 84 are the same, it is determined that stable oscillation has occurred, the gate 93 is closed, and the gate 9 is closed.
Open 2. Thus, when the cycle clock S12 is at the H level, the gate 91 opens and the up-down clock S
11 is input to the down-count terminal DK of the up-down counter 94. As a result, the up-down counter 9
4 output Q0, Q1 is the reference voltage Vre
The multiplexer 80 is controlled so as to select f. Thus, the power supplied to the signal inverting amplifier 20 is reduced, and low power consumption can be achieved.

As described above, the reference voltage Vre corresponding to the voltage of the drain output VD (t) output from the signal inverting amplifier 20 is obtained.
By employing the configuration of selecting f, the crystal oscillation circuit can be controlled so that the supplied power is always appropriate.

In particular, according to the present embodiment, even if there is a variation in the capability (current amplification factor, threshold voltage) of signal inverting amplifier 20 during mass production, optimum supply power control is performed without being affected by the variation. Thus, power consumption can be reduced.

That is, when the capability of the signal inversion amplifier 20 is high, the oscillation stability of the signal inversion amplifier 20 is originally high because the capability of the signal inversion amplifier 20 is high. Therefore, even if the power supply from the power supply is squeezed, oscillation can be stably continued. In the present embodiment, when the signal inverting amplifier 20 having a high capability is used,
The power supply from the power supply can be squeezed to reduce power consumption.

When the capability of the signal inverting amplifier 20 is low, a large power supply is required. In the present embodiment, when using the signal inverting amplifier 20 with low capability,
Sufficient power supply can be performed, and the oscillation stability can be improved.

Eighth Embodiment The switch control circuit 44 can be variously modified as required. In the present embodiment, the determination control unit 82
Is configured as shown in FIG. 13, similar effects can be obtained with a simpler circuit. In addition,
Members corresponding to the circuits shown in FIG. 11 are denoted by the same reference numerals, and description thereof will be omitted.

The configuration will be described below.

FIG. 13 shows only differences from the determination control unit 82 shown in FIG. 11, and this determination control unit 82 includes a gate 95, a 2-bit counter 96, and an up / down counter 94. .

The output pulse S4 of the inverter 86 is input to the count terminal CL of the counter 96, and the signal S4,
The output RA of the gate 95 to which S3 is input is a counter 96.
Is input to the reset terminal R.

The output S15 of the counter 96 is connected to the up-count input terminal UC of the up-down counter 94.
The cycle synchronization signal is input to the down-count terminal DCK at S12.

The output S14 of the up / down counter 94 is output from the multiplexer A shown in FIG.
It is input to the B terminal as a reference voltage control signal S14. From the multiplexer 80, a reference voltage Vref corresponding to the control signal S14 is input to a comparator 84 which is output as a signal S13.

Next, the operation will be described.

When the output signals S3 and S4 of the comparator 84 and the inverter 86 are both at L level, the gate 95
Is input to the counter 96.

Therefore, when the L-level output pulse S3 of the comparator 84 is smaller than the L-level output pulse S4 of the inverter 86, the counter 96 sequentially counts the output pulse S4 of the inverter 86 before resetting. Then, when the value becomes “2”, the pulse signal S15 is input to the up-count terminal UCK.

As a result, the up / down counter 94
Increments the count value of the reference voltage control signal S14 by one. Accordingly, the multiplexer 80 increases the reference voltage Vref by one higher than the current reference voltage Vref in the direction in which the number of pulses S3 output from the comparator 84 increases.
Switching control.

When the H-level pulse S15 is not output from the counter 96 for a certain period of time, the up / down counter 94 performs a down-counting operation according to the cycle synchronization signal S12 input at a predetermined cycle, and outputs the reference voltage control signal S14. Decrement the count value by one. As a result, the multiplexer 80 switches and controls the reference voltage Vref to the reference voltage Vref one lower than the current one.

As described above, the judgment control unit 82 shown in FIG.
By using, the same operation and effect can be achieved with a simpler circuit configuration than the determination control unit 82 shown in FIG.

In the first to third and fifth to eighth embodiments, the case where an enhancement type transistor is used as the transistors 40 and 42 functioning as power supply switching elements has been described as an example. If necessary, each of these transistors 40 and 42 may be configured using a depletion type. In this case, even if the transistors 40 and 42 are turned off, the current flowing therethrough reduces the fluctuation of the output voltage VD (t) of the signal inverting amplifier 20, and the oscillation operation becomes more stable.

For example, in the circuit shown in FIG. 8, even if the transistors 40 and 42 are turned off, a certain amount of current flows through each of the transistors 40 and 42.
The potentials of the voltages Vs1 and Vs2 at the connection point between the transistors 40 and 42 and the signal inverting amplifier 20 become stable.

Thus, the output V of the signal inverting amplifier 20 is
The DC bias included in D (t) is (Vreg / 2),
The inertial vibration of the crystal unit 10 generates this potential as a DC component. Therefore, even if there is some noise, the DC potential of the inertial vibration of the crystal resonator 10 is less likely to fluctuate, so that more stable oscillation can be performed.

Ninth Embodiment Next, a crystal oscillation circuit according to a ninth embodiment will be described.

FIG. 16 shows a crystal oscillation circuit according to the present embodiment, and FIG. 17 shows a timing chart thereof. Note that members corresponding to those in the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted.

The present embodiment is characterized in that the signal inverting amplifier 2
0 on the feedback line to the gates of the transistors 28 and 26 constituting the power supply switching element 2.
10 and 220, and each of these switching elements 21
The transistors 28 and 26 are forcibly driven intermittently by using 0 and 220 to reduce power consumption in the same manner as the crystal oscillation circuit of the type shown in FIG.

In this embodiment, each of the transistors 26 and 28 is constituted by a depletion type field effect transistor. Therefore, the gate,
Even if the potential between the sources is set to 0, it is not turned off.

In the present embodiment, the gates of the transistors 28 and 26 are respectively connected to the gates of the transistors 28 and 26 by using resistors 240 and 242 so that the on / off control of the transistors 28 and 26 can be performed stably. DC bias voltage is applied.

The gate of the transistor 28 is connected to the resistor 240
, And the DC voltage is biased such that its gate potential level becomes a value Vreg shifted from (Vreg / 2) to the Vreg side as shown in FIG.

The gate of the transistor 26 is connected to the resistor 242
Is connected to the ground potential VDD side, and the DC voltage is biased so that its gate potential level becomes a value VDD shifted from (Vreg / 2) to the ground potential side as shown in FIG.

In this embodiment, the switching elements 210 and 220 are connected to the output VD (t) of the signal inverting amplifier 20.
The switch control circuit 44 that performs on / off control in synchronization with
A pulse generation circuit 230 and a pair of gates 232 and 234
It is comprised including.

The pulse generating circuit 230 outputs two kinds of sampling pulse signals S21 and S22 having different phases as shown in FIG. Each of these sampling pulse signals S21 and S22 outputs 1 period output of the crystal oscillation circuit as 1
Output as a cycle.

The sampling pulse S21 outputs an L level signal once every four cycles of the crystal oscillation circuit, and the sampling pulse S22 outputs an H level signal once every four cycles of the crystal oscillation circuit. Output. These L-level and H-level pulse signals are output with a shift of one cycle of the crystal oscillation circuit.

When the sampling pulse generating circuit 230 outputs the sampling pulse S21 at L level, the gate 232 is opened and the switching element 210 is turned on. Therefore, the feedback signal VGN (t) of the signal inverting amplifier 20 is applied to the transistor 28 only in this section, and the transistor 28
The ON control is performed during a period 300-1 during which the signal VGN (t) applied to the gate is higher than the threshold voltage VTN.

The sampling pulse generating circuit 2
When the H level sampling pulse S22 is output from 30, the gate 234 is opened and the switch 220 is turned on. As a result, the transistor 26 outputs the feedback signal VGP only in this section.
(t) is applied, and the transistor 26 outputs the signal VGP (t).
Is below the threshold voltage VTP 30
ON control is performed during 0-2.

As described above, according to the crystal oscillation circuit of the present embodiment, it is possible to intermittently drive transistors 26 and 28 constituting signal inverting amplifier 20 on and off, thereby reducing the power consumption of the entire circuit. Becomes

The circuit of this embodiment is similar to the circuit shown in FIGS.
Similarly to the first circuit, a plurality of reference voltages Vref and VD (t) may be compared and the switching elements 210 and 220 may be turned on / off.

Further, in this embodiment, the transistor 2
6 and 28 are constituted by a depletion type. Therefore, even when both the transistors 26 and 28 are off-controlled, a voltage is supplied to each source terminal by the current flowing through the transistors 26 and 28. Therefore, the reference potential of the output VD (t) of the signal inverting amplifier 20 is stabilized at Vreg / 2, and as a result, the oscillation of the crystal unit 10 becomes stable.

In this embodiment, the transistors 26 and 28 may be of an enhancement type, if necessary.

The power supply switching element 2
Various types of switching elements, such as transmission gates, may be used as needed for 10, 220.

Note that the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the present invention.

For example, in the above-described embodiment, the case where the first and second circuits 22 and 24 forming the signal inverting amplifier 20 are formed using one transistor 26 and 28, respectively, has been described as an example. However, if necessary, the circuit can be configured by combining elements other than those described above without impairing the functions of the first and second circuits 22 and 24.

In this embodiment, the case where the crystal oscillation circuit is used for an electronic circuit for a timepiece has been described as an example. However, the present invention is not limited to this, and may be used for other purposes such as a portable telephone, a portable telephone, and a portable telephone. It is also very effective when used widely in portable electronic devices having a limited power supply capacity, such as computer terminals for personal computers and other portable devices.

[0172]

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of a crystal oscillation circuit according to the present invention.

FIG. 2 is a timing chart of the circuit shown in FIG. 1;

FIG. 3 is a circuit diagram according to a second embodiment of the present invention.

FIG. 4 is a timing chart of the embodiment shown in FIG. 3;

FIG. 5 is a circuit diagram according to a third embodiment of the present invention.

FIG. 6 is a timing chart of the circuit shown in FIG. 5;

FIG. 7 is a circuit diagram according to a fourth embodiment of the present invention.

FIG. 8 is a circuit diagram according to a fifth embodiment of the present invention.

FIG. 9 is a circuit diagram according to a sixth embodiment of the present invention.

FIG. 10 is a timing chart of the circuit shown in FIG. 9;

FIG. 11 is a circuit diagram according to a seventh embodiment of the present invention.

FIG. 12 is a timing chart of the circuit shown in FIG. 11;

FIG. 13 is a circuit diagram of the eighth embodiment shown in FIG.

FIG. 14 is a timing chart of the circuit shown in FIG. 13;

FIG. 15 is an explanatory diagram illustrating an example of a supply voltage supplied to a signal inverting amplifier.

FIG. 16 is a circuit diagram according to a ninth embodiment of the present invention.

FIG. 17 is a timing chart of the circuit shown in FIG. 16;

[Explanation of symbols]

Reference Signs List 10 crystal resonator 20 signal inverting amplifier 22 first circuit 24 second circuit 26, 28 transistor 40, 42 field effect transistor as power supply switching element 44 switch control circuit 60 bias circuit 70 output cutoff switching element 72 reference Voltage generation circuit 74, 84 Comparator 80 Multiplexer 82 Judgment control unit 86 Inverter 90 Match detection circuit 100 Switch control signal 210, 220 Switching element for power supply

Claims (17)

[Claims] 1. An oscillation circuit comprising: a signal inverting amplifier; and a power control circuit that controls on / off of power supplied to the signal inverting amplifier in synchronization with an output of the signal inverting amplifier. 2. The power control circuit according to claim 1, wherein the power control circuit comprises: a power supply switching element provided on a power supply line to the signal inverting amplifier; and an output of the signal inverting amplifier. And a switch control circuit that performs on / off control in synchronization with the control circuit. 3. The signal inverting device according to claim 2, further comprising a crystal oscillator connected between an output side and an input side of the signal inverting amplifier, and inverting a phase of an output signal of the signal inverting amplifier. A feedback circuit configured to input a feedback to an amplifier, wherein the signal inverting amplifier is connected to a first potential side, and is driven on and off by the feedback input to excite and drive the crystal resonator.
A first circuit including a semiconductor switching element, and a quartz oscillator that is connected to a second potential side different from the first potential and is driven on and off at a timing different from that of the first semiconductor switching element by the feedback input. A second circuit including a second semiconductor switching element that drives and excites; and the power supply switching element is connected in series with at least one semiconductor switching element of the first and second circuits; An oscillation circuit, wherein the switch control circuit controls on / off of the power supply switching element so as to control an on / off duty ratio of power supply to the at least one semiconductor switching element. 4. The power control circuit according to claim 1, wherein the power control circuit includes an output cutoff switching element on an output side of the signal inverting amplifier, and the switch control circuit includes a power supply switching element. An oscillation circuit, comprising: turning off the output cutoff switching element in synchronization with the off control. 5. The device according to claim 3, wherein the first and second semiconductor switching elements and the power supply switching element of the signal inverting amplifier are enhancement type field effect transistor elements. Wherein the field effect transistor elements constituting the first and second semiconductor switching elements have an absolute value of a threshold voltage relatively smaller than that of the field effect transistor element constituting the power supply switching element. An oscillation circuit characterized by the following. 6. The oscillation circuit according to claim 2, wherein the power supply switching element is configured using a depletion-type field-effect transistor element. 7. The power supply switching element according to claim 2, wherein the power supply switching element comprises a field effect transistor element connected in series with a semiconductor switching element constituting the signal inverting amplifier. A circuit for inputting an output of the signal inverting amplifier to a gate of the power supply switching element, and controlling the on / off duty ratio of power supply to the series-connected semiconductor switching elements; An oscillation circuit, which controls on / off of an element. 8. The switch control circuit according to claim 7, wherein the switch control circuit includes a bias circuit that applies a DC bias voltage to a gate of the power supply switching element, wherein the DC bias voltage is supplied from the signal inverting amplifier to the power supply. An oscillation circuit for shifting a DC potential of an input signal to a gate of a switching element for use. 9. The switch control circuit according to claim 7, wherein the switch control circuit controls the serially connected semiconductor switching elements based on a comparison result between an output of the signal inverting amplifier and at least one reference voltage. An oscillation circuit, wherein an on / off control of the power supply switching element is performed so as to control an on / off duty ratio of power supply. 10. The power control circuit according to claim 1, wherein the power control circuit includes: a power supply switching element provided in a feedback circuit to the signal inversion amplifier; and the power supply switching element to an output of the signal inversion amplifier. An oscillation circuit, comprising: a switch control circuit that performs on / off control in synchronization. 11. The first signal inverting amplifier according to claim 10, wherein the signal inverting amplifier is connected to a first potential side, and is turned on and off by the feedback input to drive the crystal resonator.
A first circuit including a semiconductor switching element, and a quartz oscillator that is connected to a second potential side different from the first potential and is driven on and off at a timing different from that of the first semiconductor switching element by the feedback input. A second circuit including a second semiconductor switching element for exciting and driving the power supply, wherein the power supply switching element is connected to a gate of at least one semiconductor switching element of the first and second circuits, An oscillation circuit, wherein the switch control circuit controls on / off of the power supply switching element so as to control an on / off duty ratio of power supply to the at least one semiconductor switching element. 12. The switch control circuit according to claim 10, wherein the switch control circuit supplies power to the at least one semiconductor switching element based on a comparison result between an output of the signal inverting amplifier and at least one reference voltage. An oscillation circuit, wherein on / off control of the power supply switching element is performed so as to control an on / off duty ratio of supply. 13. The oscillation circuit according to claim 1, wherein the crystal unit having a large Q value is used as the crystal unit. 14. An electronic circuit comprising the oscillation circuit according to claim 1. 15. A semiconductor device comprising the oscillation circuit according to claim 1 or the electronic circuit according to claim 14. 16. An electronic device comprising the oscillation circuit according to claim 1 or the electronic circuit according to claim 14. 17. A timepiece comprising the oscillation circuit according to claim 1 or the electronic circuit according to claim 14.