JPH10322338A - Atm block transfer node - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a cell from being abolished owing to the overflow of a buffer by permitting an ATM block transfer node to precisely judge the transfer/abolishment of the ATM block through the use of size information of the ATM block, rate information, a queue length and a queue length change rate in the FIFO buffer. SOLUTION: A queue monitoring part 16 informs an admission control part 17 of queue length and the queue change rate in the FIFO buffer 14 at any time. A block identification part 12 informs the control part 17 of the size S, the rate R and the VPI/VCCI number of the ATM block. The control part 17 judges the transfer/abolishment of the ATM block based on a prescribed relation expression between respective input values and the capacity of the FIFO buffer 14 and stores the cell being an abolishment object in an abolished block storage part 18. A cell abolishment part 13 inquires whether the cell is the abolished cell or not to the abolished block storage part 18 and stores the cell which is abolished or not abolished in the FIFO buffer 14. Thus, cell abolishment owing to the overflow of the buffer is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM network supporting high-speed computer-to-computer communication.
The present invention relates to an ATM block transfer node that transfers an ATM block composed of a plurality of ATM cells (hereinafter, referred to as “cells”).

[0002]

2. Description of the Related Art Conventionally, as a node for performing cell transfer,
There is an ATM switch having a transfer function for each cell. The information transfer unit handled by the ATM switch is a cell, and under an overload condition, each cell is discarded independently. As a conventional mechanism for discarding each ATM block, an EPD (Early Packet Discard) is used.
A technology called “Allyn Romanow and
S. Floyd, "Dynamics of TCP Traffic over ATM Network
s ", IEEE JSAC, Vol.13, no.4, pp.633-641, May 199
Five). In the ATM node having the EPD, a threshold value is set in advance for the queue length in the buffer, and when the arrival of the head cell of the ATM block is detected, if the queue length in the buffer is equal to or larger than the threshold value, the packet is included in the ATM block. Discard all cells without entering the buffer. This allows invalid ATM with some cells lost during overload
Block transmission was prevented, and the bandwidth of the transmission path was effectively utilized.

[0003]

In the conventional ATM switch, when transferring an ATM block composed of a very large number of cells, one ATM block is transferred while transferring one ATM block even if the cell loss rate is low. The probability that these cells are discarded becomes very large, and the probability that the cell can be delivered as a complete ATM block is extremely reduced. That is,
There has been a problem that the band of the transmission path is wasted occupied due to incomplete transfer of ATM blocks.

In the conventional EPD technology, transfer / discarding of ATM blocks having various sizes and rates is determined based on only limited information including a threshold value for a queue length in a buffer. For this reason, ATM blocks of various lengths cannot be accurately handled, and cell discarding due to buffer overflow frequently occurs. Also, it was difficult to make full use of the buffer capacity.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an ATM block transfer node capable of accurately transferring / discarding an ATM block and preventing cell loss due to buffer overflow.

[0006]

An ATM block transfer node according to the present invention uses ATM block size information and rate information, as well as a queue length in a FIFO buffer and a rate of change of the queue length to transfer / transfer an ATM block. The main feature is to make a proper decision on disposal. As a result, since the buffer overflow can be accurately predicted in advance, it is possible to prevent the cell loss due to the buffer overflow while sufficiently utilizing the buffer capacity. Also, incomplete ATM
The transfer of the blocks does not waste the bandwidth of the transmission path.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 shows a first embodiment of an ATM block transfer node according to the present invention. In the figure, an ATM block input from an input port 11 is transmitted to a FIFO buffer 1 via a block identification unit 12 and a cell discard unit 13.
4 and output from the output port 15.
The queue monitoring unit 16 monitors the queue length in the FIFO buffer 14 and the rate of change of the queue length, and notifies the admission control unit 17 of the monitoring result.

[0008] When the head cell of the ATM block arrives, the block identifying unit 12 receives the admission control unit 17.
, The size information and rate information of the ATM block, and the VPI (virtual path identifier) / VCI (virtual channel identifier) number of the channel carrying the ATM block. The admission control unit 17 uses the ATM block size information and rate information provided from the block identification unit 12 and the queue length in the FIFO buffer 14 provided from the queue monitoring unit 16 and the rate of change of the queue length. It decides whether to transfer or discard in block units, and notifies the discarded block storage unit 18 of the VPI / VCI number of the cell to be discarded.

Further, when the last cell of the ATM block arrives, the block identifying section 12 responds to the corresponding VP.
The I / VCI number is notified to the discard block storage unit 18.
The discard block storage unit 18 stores the admission control unit 17
, The cell of the VPI / VCI number notified thereafter is discarded, and the VPI / VCI notified from the block identification unit 12 is discarded.
It is stored that the cell of the number will not be discarded thereafter. The cell discard unit 13 inquires of the discard block storage unit 18 to determine whether to discard the input cell.

The queue monitoring means in claim 1 corresponds to the queue monitoring section 16, the block identification means corresponds to the block identification section 12, and the determination means corresponds to the admission control section 17 and the discard block storage section 18. , A cell discarding unit corresponds to the cell discarding unit 13. FIG. 2 shows a configuration of the ATM block. This is a format standardized in ITU-T (ITU-T Recommendati
on I.371, "Traffic Control and Congestion Control i
n B-ISDN ", Geneva, 1996. The size information and rate information of the ATM block are stored in the first cell (RM (Resource M
anagement) cell).

Hereinafter, an operation example of the ATM block transfer node according to the first embodiment will be described. The queue monitoring unit 16
The admission control unit 17 is notified of the queue length q in the FIFO buffer 14 and the rate of change dq / dt of the queue length at any time. When the head cell of the ATM block is input, the block identification unit 12 determines the size S, rate R,
The VPI / VCI number in the header is read and notified to the admission control unit 17.

The admission control unit 17 uses the above input value and the capacity B of the FIFO buffer 14,

[0013]

(Equation 2)

The transfer / discard decision of the ATM block is made based on the relational expression. That is, if the equation (1) is satisfied, it is determined that the entire ATM block is transferred, and
If not satisfied, decide to discard. Only when it is determined to discard, the corresponding VPI / VCI number is notified to the discard block storage unit 18. The discard block storage unit 18 stores this as the VPI / VCI number of the discard target cell.

Further, when the last cell of the ATM block is inputted, the block identifying section 12 receives the VPI in the header.
It reads the / VCI number and notifies the discard block storage unit 18. The discard block storage unit 18 excludes this from the VPI / VCI number of the discard target cell. Cell discard unit 13
Reads a VPI / VCI number of a cell each time a cell is input from the block identification unit 12 and inquires of the discard block storage unit 18 whether or not this is a cell to be discarded. Cells that are not discarded are F
Buffering in the IFO buffer 14.

If the size information S and the rate information R described in the head cell of the ATM block are accurate, the present invention can completely prevent the transfer of an incomplete ATM block. In addition, the FIFO buffer can be used more effectively than when the EPD technology is used. FIG. 3 shows a simulation result demonstrating the above effects.

The simulation conditions are as follows. ATM block size (S): 100 cells FIFO buffer capacity (B): 500 cells Number of input ports: 20 Rate of each input port (R): 150 Mb / s Arrival process of ATM block from each input port: negative index Distribution Number of output ports: 1 Rate of output port: 600 Mb / s FIG. 3 shows the maximum value and the average value of the queue length in the FIFO buffer by performing a simulation under various traffic loads.

When the EPD technique is used, it can be seen that the maximum queue length is equal to the maximum size of the buffer, and cell-by-cell buffer overflow can occur. Also, it can be seen that the average queue length is short even under high load, and the buffer is not fully utilized. On the other hand, in the case of the present embodiment, the maximum queue length is smaller than the buffer length, and it can be seen that the buffer overflow of the cell-by-cell does not occur at all. Also, the average queue length under heavy load is relatively long,
You can see that the buffer is being used effectively.

(Second Embodiment) In a second embodiment of the ATM block transfer node of the present invention, the rate R of the ATM block is set to a constant value. In this case, since each ATM block transfer node can hold the rate R of the ATM block fixedly, the block identification unit 12 shown in FIG. 1 notifies the admission control unit 17 of the rate R. No need. In the configuration of the ATM block, only the size information of the ATM block is included in the head cell (RM cell) as shown in FIG. Other configurations are the same as those of the first embodiment.

(Third Embodiment) FIG. 5 shows an AT according to the present invention.
9 shows a third embodiment of the M block transfer node. A feature of the present embodiment is that an AT has a plurality of input ports 21 and output ports 22, and switches an ATM block input from each input port to a predetermined output port.
An M block switch 20 is provided, and each output port is connected to the ATM block transfer node 10 of the present invention shown in FIG. The configuration of the ATM block used in the present embodiment has a head cell (RM cell) as shown in FIG.
Contains destination address information in addition to ATM block size information and rate information.

The ATM input to the ATM block switch 20 through the VC (virtual channel) of the input port 21
The block determines a destination output port 22 based on the destination address information in the first cell, selects an appropriate VC included therein, and switches all cells belonging to the ATM block to the selected VC. I do. In the present embodiment, in addition to the effects of the first embodiment, routing is realized in ATM block units.

[0022]

As described above, since the ATM block transfer node of the present invention can accurately predict buffer overflow in advance, it is possible to prevent cell loss due to buffer overflow while making full use of buffer capacity. Further, it is possible to prevent an incomplete ATM block generated due to cell discarding from being transferred and a band of a transmission line from being wasted.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of an ATM block transfer node of the present invention.

FIG. 2 is a diagram showing a configuration example of an ATM block according to the first embodiment.

FIG. 3 is a diagram showing a simulation result in the first embodiment.

FIG. 4 is a diagram showing a configuration example of an ATM block according to a second embodiment.

FIG. 5 is a block diagram showing a third embodiment of the ATM block transfer node of the present invention.

FIG. 6 is a diagram illustrating a configuration example of an ATM block according to a third embodiment.

[Explanation of symbols]

 Reference Signs List 10 ATM block transfer node 11 Input port 12 Block identification unit 13 Cell discard unit 14 FIFO buffer 15 Output port 16 Queue monitoring unit 17 Admission control unit 18 Discard block storage unit 20 ATM block switch 21 Input port 22 Output port

Claims (2)

[Claims] An ATM buffer having a FIFO buffer for storing ATM cells and transferring information composed of a plurality of ATM cells (hereinafter, this information transfer unit is referred to as an ATM block).
A TM block transfer node, a queue monitoring means for monitoring a queue length of the FIFO buffer and a rate of change of the queue length;
A block identification unit for detecting block size information and rate information, and the AT provided in the FIFO buffer based on information given from the queue monitoring unit and the block identification unit.
Determining means for predicting whether or not an M block can be stored; disposed between the block identifying means and the FIFO buffer; and determining, based on a prediction result of the determining means, an unstorable ATM block in the FIFO buffer. And a cell discarding means for discarding the ATM block without inputting it to the ATM block transfer node. 2. The ATM block transfer node according to claim 1, wherein the judging means sets a queue length of the FIFO buffer to q, a change rate of the queue length to dq / dt, an ATM block size to S, and a rate to R. Then, An ATM block transfer node, which predicts that an ATM block cannot be stored in a FIFO buffer when the value represented by is larger than the capacity of a FIFO buffer.