JPH10321392A - Discharge lamp device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To sufftciently supply energy to the secondary side of a transformer even when a battery voltage has dropped. SOLUTION: Switching frequency of a MOS transistor is set low with drop in battery voltage. By setting the switching frequency low according to drop in battery voltage, primary current is sufficiently increased not only when battery voltage is high but also when battery voltage is low. Therefore, the total energy W stored on the primary side of the transformer can be increased even when the battery voltage has dropped. Practically, the frequency of saw tooth waves formed with a saw tooth wave forming circuit 163 in a PWM control circuit according to drop in battery voltage is dropped with a frequency changing circuit 185b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a discharge lighting device for lighting a high-pressure discharge lamp, and is particularly suitable for use in a vehicle headlight device.

[0002]

2. Description of the Related Art When a high-pressure discharge lamp (hereinafter, referred to as a discharge lamp) is used for a vehicle lamp, a primary battery voltage (DC power supply voltage) is converted to a high voltage via a transformer and distributed to a secondary side. The discharge lamp is turned on. Further, when the discharge lamp is turned on, the current flowing through the primary side of the transformer is controlled so as to supply a predetermined energy (electric power) to the secondary side discharge lamp. Specifically, the conduction and cutoff of the primary current is controlled by a MOS transistor serving as a switch, and the ON / OFF timing (duty ratio) of the MOS transistor is adjusted by a PWM control device.
This controls the primary current of the transformer.

Here, as a transformer, energy is stored on the primary side during the on-time of the MOS transistor, and M
When a device that supplies the energy stored during the off time of the OS transistor to the secondary side is used, on / off timing for turning on the MOS transistor until predetermined energy is stored in the primary side The PWM control device sets the ON time of the MOS transistor so that

That is, when the battery voltage drops, the on-time of the MOS transistor is set to be longer than when the battery voltage is sufficient, whereby the battery voltage of the primary winding of the flyback transformer is reduced. Regardless of the height, the same energy is stored.

[0005]

FIGS. 25A and 25B show current waveforms on the primary side when the battery voltage is sufficient and when the battery voltage is lowered, respectively. However, for the sake of simplicity, the waveforms when the secondary side of the transformer is not a winding are shown here.

As shown in FIGS. 25A and 25B,
During the ON time of the MOS transistor, the primary current I increases according to a predetermined time constant, and predetermined energy is stored in the primary side of the flyback transformer. Thereafter, the stored energy is supplied to the secondary side of the flyback transformer during the off time of the MOS transistor. At this time, when the battery voltage is sufficient, the off time of the MOS transistor is long, so that the stored energy is sufficiently supplied to the secondary side of the flyback transformer. Since the off-time of the transistor is short, the on-time of the MOS transistor comes before all the stored energy is supplied to the secondary side of the flyback transformer, and there is a problem that sufficient energy cannot be supplied. is there.

The present invention has been made in view of the above problems, and has as its object to sufficiently supply energy to the secondary side of a transformer even when the voltage of a DC power supply is reduced.

[0008]

In order to achieve the above object, the following technical means are employed. In the present invention, the switching frequency of the switching means (31) is set to be low when the voltage of the DC power supply (1) decreases according to the voltage of the DC power supply (1). It is characterized by being.

When the switching frequency is lowered in accordance with the voltage drop of the DC power supply (1), not only when the voltage of the DC power supply (1) is sufficient but also when the voltage of the DC power supply (9) is lowered. The primary current becomes sufficiently large. Therefore, even when the voltage of the DC power supply (9) drops, the total energy (W) of energy stored in the primary side of the transformer (29) can be increased.

[0010] Further, since the frequency is low, the time during which the primary semiconductor switching element (31) is turned off is long, and the energy can be sufficiently supplied to the secondary side of the transformer (29). Thereby, even when the voltage of the DC power supply (1) decreases, the transformer (2)
9) The energy supply to the secondary side can be sufficiently performed.

Specifically, the switching frequency may be set linearly such that the lower the voltage of the DC power supply (1), the lower the switching frequency, as set forth in claim 2. As shown in FIG. In order to lower the switching frequency, for example, the frequency of the sawtooth wave may be reduced.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, the discharge lamp device 100 of the present invention is applied to a vehicle headlamp. FIG. 1 is an overall configuration diagram of the discharge lamp device 100 according to the present embodiment, and FIG. 2 is a block diagram of a control system of the discharge lamp device 100 according to the present embodiment.

Reference numeral 1 denotes a DC power supply mounted on a vehicle (hereinafter referred to as a battery, a rated voltage (battery voltage VB) of 12 V).
1a is a power supply terminal, 1b is a ground terminal, and 2 is a high-pressure discharge lamp (hereinafter, referred to as a lamp) such as a metal halide lamp as a vehicle headlight. SW is a lighting switch that is provided in the vehicle interior and sets the turning on and off of the lamp 2 by a user's operation. 50 is a discharge lamp device 100
This fuse blows when an overcurrent flows through the fuse.

The discharge lamp device 100 comprises a reverse connection protection circuit 3, a smoothing circuit 4, a flyback transformer 29 as shown in FIG.
And a circuit function unit such as a DC power supply circuit 5, a takeover circuit 6, an inverter circuit 7 including an H-bridge circuit 7a, and a starting circuit 8. In the present embodiment, as shown in FIG. 2, a control circuit for controlling the circuit function unit is a PWM circuit.
(Pulse width modulation) control circuit 9, lamp power control circuit 10 for controlling lamp power to desired power based on lamp voltage VL and lamp current IL described later, H-bridge control circuit 11 for controlling H-bridge circuit 7a, etc. Having.

In this embodiment, a sample-and-hold circuit 1 for sampling and holding the lamp voltage VL at a predetermined timing is used as the control circuit.
2. At the start of lamp lighting, the starting circuit 8 is controlled to
A high voltage generation control circuit 13 for applying a high voltage to the lamp 2 to cause dielectric breakdown of the lamp 2 between the electrodes;
Has a fail-safe circuit 14 for controlling the H-bridge circuit 7a through the H-bridge control circuit 11 when an abnormal state described later occurs, and a connector disconnection detection circuit 15 for detecting disconnection of the connector 35 of the lamp 2. ing.

Further, the driving power of each of the control circuits 9 to 15 is performed based on the battery voltage VB and the like. When the primary side voltage becomes overvoltage, the control circuits 9 to 15 are driven from this overvoltage.
An overvoltage protection circuit 16 for protecting the discharge lamp 15 is also provided in the discharge lamp device 100. Here, first, an outline of the lighting operation of the discharge lamp device 100 will be described. When the lighting switch SW is turned on, the battery voltage VB is boosted by the flyback transformer 29, whereby the capacitor 53 of the starting circuit 8 is charged through the H-bridge circuit 7a. Then, when the capacitor 53 is charged, the charge charged in the starting circuit 8 is discharged, and a higher voltage is applied to the lamp 2 by the transformer 47, and the lamp 2 is broken down between the electrodes. And then come on.

After that, when the lamp 2 is turned on, the polarity of the discharge voltage (direction of the discharge current) to the lamp 2 is alternately switched by the H-bridge circuit 7a, so that the lamp 2 is turned on by AC. Next, an outline of the configuration of the circuit function unit and the control circuit will be briefly described.

The reverse connection protection circuit 3 comprises a resistor 17, a capacitor 19, and a MOS transistor 12. The reverse connection protection circuit 3 protects the MOS transistor 21 when a negative high voltage is generated at a power supply terminal described later. Further, the fuse 50 is prevented from being blown at the time of reverse connection such as mounting the battery 1 on a vehicle with the polarity reversed.

The smoothing circuit 4 smoothes the voltage generated at the power supply terminal 1a, and includes capacitors 23 and 25.
And a coil 27 (a choke input type smoothing circuit). DC power supply circuit 5
Has a flyback transformer 29 in which both the primary side and the secondary side are constituted by windings. The flyback transformer 29 has a primary winding 29a provided on the battery side and a secondary winding 29b provided on the lamp 2 side. Also,
In the flyback transformer 29, as shown in FIG. 1, the primary winding 29a and the secondary winding 29b can be electrically connected. The DC power supply circuit 5 is provided with a MOS transistor 31 whose switching is controlled by the PWM circuit 9. The primary current of the primary winding 29a is M
It is controlled by the OS transistor 31.

That is, the flyback transformer 29 is
When the OS transistor 31 is on, the primary winding 29
When a primary current flows through a, energy is stored in the primary winding 29a. When the MOS transistor 31 is turned off, the flyback transformer 29 transfers the energy of the primary winding 29a to the secondary winding 29b.
To be supplied.

A rectifying diode 33 and a smoothing capacitor 35 are connected to the secondary winding 29b of the DC power supply circuit 5.
Is provided. The takeover circuit 6 includes a capacitor 37 and a resistor 39. The capacitor 37 is charged with electric charge when the lighting switch SW is turned on. The takeover circuit 6 causes the lamp 2 to break down between the electrodes by the starting circuit 8, and then promptly shifts to arc discharge.

The inverter circuit 7 is provided on the side of the secondary winding 29b of the flyback transformer 29, and converts the electric power from the battery 1 into an alternating current, thereby lighting the lamp 2 in an alternating current. The H-bridge circuit 7a constituting the inverter circuit 7 alternately reverses the direction of the discharge current of the lamp 2. The H-bridge circuit 7a has four MOS transistors 41a to 41d that form a plurality of bridge-type semiconductor switching elements arranged in an H-bridge shape. These four MOS transistors 41a to 41d
Are controlled by bridge driving circuits (in this example, IC elements, hereinafter referred to as IC elements) indicated by 43a and 43b in the figure.

The bridge control circuit 11 includes an IC element 43
When the MOS transistors 41a and 41d on the diagonal line of the H-bridge circuit 7a are in the off state by controlling the a and 43b, the MOS transistors 41b and 41c on the diagonal line are switched to the on state, and When the transistors 41b and 41c are on, M
The OS transistors 41a and 41d are controlled to be turned off. As a result, the direction of the discharge current of the lamp 2 is alternately switched, in other words, the polarity of the applied voltage (discharge voltage) of the lamp 2 is inverted, so that the lamp 2 is turned on by AC.

The H-bridge circuit 7a has MOS transistors 41a to 41d at a long constant cycle at the start of lamp lighting.
Are turned on and off, and then the MOS transistors 41a to 41d are turned on and off at short fixed cycles. Reference numeral 45 in the figure denotes a protection capacitor for protecting the H-bridge circuit 7a from a high-voltage pulse generated at the time of starting lighting.

The starting circuit 8 starts the lighting of the lamp 2 and is provided between the midpoint potential point of the H-bridge circuit 7a and the ground terminal 1b. The starting circuit 8 includes a transformer 47 including a primary winding 47a and a secondary winding 47b, diodes 49 and 51, a capacitor 53, a resistor 55, and a thyristor 5 that is a unidirectional semiconductor element.
7

The thyristor 57 is connected to the lighting switch SW.
Is turned off when is turned on, whereby the capacitor 53 starts charging. Thereafter, the thyristor 57 is turned on by the high voltage generation control circuit 13. As a result, the capacitor 53 starts discharging. Then, the energy stored in the capacitor 53 is raised to a high voltage through the transformer 47, so that a high voltage is applied to the lamp 2. As a result, the lamp 2 is lit by dielectric breakdown between the electrodes.

The PWM control circuit 9 controls the on / off time of the MOS transistor 31, that is, the duty ratio by making the threshold level for the sawtooth wave variable. Lamp power control circuit 10
Is the lamp current IL and the sample and hold circuit 12
Based on the sampled and held lamp voltage VL, the lamp power is controlled to a desired value. Note that the lamp current IL is equal to the H-bridge circuit 7a.
The current is detected by a current detection resistor 59 provided in the circuit.

The lamp power control by the lamp power control circuit 10 in the present embodiment is as follows. If the electrode temperature of the lamp 2 is low at the start of lighting of the lamp 2, the lamp power control circuit 10 tends to cause the lamp 2 to go out.
W), the electrode temperature is rapidly increased, and when the electrode temperature is gradually increased, the lamp power is gradually decreased. When the lamp 2 is in a stable state, the lamp power is controlled to a predetermined value (35 W). .

Further, when the lamp voltage VL is a high voltage (for example, 4
00V), the lamp voltage VL becomes the smallest immediately after the lighting of the lamp 2 is started, and then the lamp voltage VL gradually increases. On the other hand, the lamp current IL is
Immediately after the lighting of the lamp 2 is started, the lamp voltage VL
Contrary to this, it gradually becomes smaller. In order to perform such lamp power control, the PWM control circuit 9 receives a command signal from the lamp power control circuit 10 and varies the ON / OFF duty ratio of the MOS transistor 31 by changing the duty ratio. Control lamp power.

The sample-and-hold circuit 12 masks a transient voltage, which will be described later, generated when the H-bridge circuit 7a is switched among the lamp voltages VL, and controls the lamp power control circuit 10 with high precision. The fail-safe circuit 14 stops the control of the PWM control circuit 9 and turns off all the MOS transistors 41a to 41d of the H-bridge circuit 7a when any abnormality occurs in the discharge lamp device 100. is there.

The control circuits 9 to 15 are all provided in an integrated circuit (not shown). [Starting Circuit 8] Next, the starting circuit 8 will be described in detail. The starting circuit 8 starts lighting of the lamp 2 and is provided between the midpoint potential point of the H-bridge circuit 7a and the ground terminal 1b.

The operation of the starting circuit 8 will be described with reference to a time chart shown in FIG. However, in FIG. 3, (a) is the voltage Vlamp across the lamp 2 and (b)
Is the charging voltage Vc of the capacitor, (c) is the gate drive signal output to the gate of the thyristor 57,
(D) is a high voltage generated in the secondary winding 47b. When the lighting switch SW is turned on, the H bridge circuit 7a
Of the MOS transistors 41a to 41d
Turning off is started (at time t1 in FIG. 3). When the MOS transistors 41a and 41d are turned on, a low level signal is output as the gate drive signal, and the thyristor 57 is turned off. Thereby, the capacitor 53 starts charging (at time t2 in FIG. 3). After the charging of the capacitor 53 is sufficiently performed during the ON period of the MOS transistors 41a and 41d, the MOS transistors 41a and 41d are turned off and the MOS transistors 41b and 41c are turned on (at time t3 in FIG. 3).

When the gate drive signal of the thyristor 57 is changed to a high level signal, the thyristor 57 is turned on, a current flows, and a high voltage is generated in the secondary winding 47b of the transformer 47 (at time t4 in FIG. 3). . This high voltage is lamp 2
To cause breakdown between the electrodes of the lamp 2, and the lamp 2
Starts lighting (at time t5 in FIG. 3). Further, by connecting the diode 51 in parallel with the thyristor 57, the capacitor 53 and the primary winding 47a resonate with the LC when the thyristor 57 is turned on. When insulation breakdown occurs between the electrodes of the lamp 2 due to the high voltage from the secondary winding 47b, a spark discharge current flows between the electrodes of the lamp 2, and this spark discharge current becomes a damped oscillation current due to the LC resonance. Thus, the duration of the spark discharge current can be significantly longer than when the diode 51 is not connected.

The lamp voltage while the spark discharge current is flowing through the lamp 2 becomes lower than the charging voltage of the capacitors 35 and 37. At this time, the lamp voltage flows into the lamp 2 via the H-bridge circuit 7a. Starts lighting. Therefore, by connecting the diode 51, the duration of the spark discharge current is lengthened, and it is ensured that a sufficient current flows from the capacitors 35 and 37 via the H bridge circuit 7a to the lamp 2 without fail. Thus, the lamp 2 can be reliably turned on. That is, the lighting performance of the lamp 2 can be improved.

Also, since the capacitor 53 is charged at the midpoint potential point of the H-bridge circuit 7a, the high-side potential of the capacitor becomes 0 V when the MOS transistors 41a to 41d are switched on and off. Therefore, the thyristor 57 can be reliably turned off. That is, once the thyristor 57 is turned on, it does not turn off until a predetermined condition (for example, the anode side potential> the cathode side potential of the thyristor 57) is satisfied.
3 cannot be charged again. Therefore, if the MOS
If the lamp 2 is not turned on in the first cycle of the on / off of the transistors 41a to 41d, the lamp 2 cannot be turned on thereafter. However, the charging of the capacitor 53 is performed by the midpoint potential point of the H-bridge circuit 7a. Since this is done, this can be prevented, and the lamp 2 can be turned on reliably.

Further, since the capacitor 53 is charged at the midpoint potential point on the secondary side of the flyback transformer 29, the capacitor 53 is charged by the voltage converted to high voltage by the DC power supply circuit 5. Will be. Conventionally, a transformer for increasing the voltage across the capacitor 53 is provided separately from the DC power supply circuit 5, but it is not necessary to provide a transformer only for this purpose. As described above, the flyback transformer 2 is connected between the starting circuit 8 and the DC power supply circuit 5.
9, the transformer can be reduced to one, and the cost can be reduced.

The gate drive signal is output from the high voltage generation control circuit 13 in synchronization with the switching timing of the MOS transistors 41a to 41d.
A signal notifying the switching timing of 1a to 41d is input, and the output timing of the gate drive signal is set based on this signal.

When the lamp 2 is turned on, the starting circuit 8 does not need to be driven, so that a low level signal is output as the gate drive signal. This lamp lighting is determined based on whether or not the lamp current IL is equal to or more than a predetermined value.
That is, when the lamp 2 is turned on, the lamp current IL flows through the current detection resistor 32 via the H-bridge circuit 7a. Therefore, when the lamp current IL is detected, the gate drive signal is set to a low level signal.

[Driving Circuit of IC Elements 43a and 43b] Next, the driving of the IC elements 43a and 43b will be described. FIG. 4 shows a circuit diagram for driving the IC elements 43a and 43b. However, FIG. 4 partially deletes the constituent requirements in FIG. The IC element 43a includes a high and low driver circuit (International Rectif).
i.e., IR2101). Note that I
The configurations of the C elements 43a and 43b are exactly the same.

Each power supply terminal Vc of the IC elements 43a and 43b
c is connected to the secondary side of the flyback transformer 29. That is, on the secondary side of the flyback transformer 29, the first power supply circuit 96 including the resistor 95 and the Zener diode 97 is provided, and the voltage applied to the power supply terminal Vcc is generated by the first power supply circuit 96. Predetermined voltage V
2 (15 V).

The high-voltage input terminal Hin of the IC element 43a is connected to the low-voltage input terminal Lin of the IC element 43b. A high-level signal or a low-level signal from the terminal 11a in the H-bridge control circuit 11 is similarly input to these two terminals Hin and Lin. Further, the low-voltage input terminal Lin of the IC element 43a and the high-voltage input terminal Hi of the IC element 43b.
n are connected. And these two terminals Hi
n and Lin are connected to the terminal 11 of the H-bridge control circuit 11.
The high level signal or the low level signal from b is input in the same manner. And the H-bridge control circuit 11
The 11 terminals a and b have a high-level signal and a low-level signal that are inverted from each other.

The operation will be briefly described. A high-level signal is output from the terminal 11a of the H-bridge control circuit 11 to the terminal 11a.
When the low level signal is output from b, the MOS transistors 41a and 41d are turned on, and the MOS transistors 41b and 41c are turned off. When a low-level signal is output from the terminal 11a of the H-bridge control circuit 11 and a high-level signal is output from the terminal 11b, the MOS transistors 41b and 41c are turned on and the MOS transistors 41a and 41d are turned off.

As described above, in this embodiment, the IC element 43
a and 43b are controlled by the H-bridge control circuit 11 using a secondary voltage (the lamp voltage) generated in the secondary winding 29b. This allows
Even if the battery voltage VB decreases, the driving voltage is obtained from the secondary side of the flyback transformer 29, so that the MOS transistors 41a to 41d can be stably controlled.

The driving of the IC elements 43a and 43b is controlled not only by the voltage on the secondary side of the transformer 29 but also by the voltage on the primary side (battery voltage VB) via a diode 99 which is a unidirectional semiconductor switching element. It is possible. This is done for the following two reasons. The lamp power control circuit 10 described above uses the lamp power of the lamp 2 based on the lamp voltage VL (voltage signal) corresponding to the discharge voltage of the lamp 2 and the lamp current IL (current signal) corresponding to the discharge current of the lamp 2. , Feedback control is performed so as to attain a desired value.

For example, immediately after the lighting switch SW is turned on, no voltage is generated on the secondary winding 29b side. Therefore, immediately after the lighting switch SW is turned on, the drive of the H-bridge circuit 7a cannot be controlled, and in the worst case, the control delay or the feedback control may become unstable. Therefore, in this example, the IC elements 43a and 43b can be driven by the battery voltage VB so that the drive of the H-bridge circuit 7a can be controlled even immediately after the lighting switch SW is turned on.

The lamp voltage VL is equal to the predetermined voltage Vr1.
When an abnormal state described below, which further decreases, occurs, the driving power of the IC elements 43a and 43b becomes insufficient, and the H-bridge circuit 7
a cannot be turned off (the conduction of all of the MOS transistors 41a to 41d is cut off; hereinafter, this is referred to as turning off the H bridge circuit 7a). Therefore, in this example, the IC elements 43a,
3b, when the above-mentioned abnormal state occurs, the driving power is obtained by the battery voltage VB. Thus, the H-bridge circuit 7a can be reliably turned off in the abnormal state.

Incidentally, in the case of the above abnormal state, 2 in FIG.
The H-bridge circuit 7a is turned off through the IC elements 43a and 43b by setting both output signals of the first abnormality circuit indicated by 42 to high level signals. When the battery voltage VB is 12 V, the IC elements 43a, 43b
The voltage applied to each power supply terminal Vcc is controlled to a constant voltage of 15 V by the Zener diode 97. Therefore, FIG.
The middle diode 99 functions to prevent backflow. Also, 1
01 is a noise removing capacitor, and 420 is a current limiting resistor.

[Driving Power Supply for MOS Transistor 31] Next, how to obtain the driving power supply for the MOS transistor 31 will be described with reference to FIG. On the secondary side of the transformer 29, there is provided a first power supply circuit 96 for converting the high voltage generated on the secondary side to a predetermined voltage V2 (for example, 15V) by the resistor 95 and the Zener diode 97. I have.

A resistor 105 is connected to the battery 1 (primary side).
And a capacitor 107, a second power supply circuit 110 for obtaining a predetermined voltage V3 (second predetermined voltage) determined by the battery voltage is provided. A resistor 1 is provided between the first power supply circuit 96 and the second power supply circuit 110 on the first power supply circuit 96 side.
A diode 111 serving as a switching unit is provided via the switch 20.

The diode 111 has the predetermined voltage V3
When the predetermined voltage V3 is higher than the predetermined voltage V4 (first predetermined voltage) obtained by dropping the predetermined voltage V2 from the predetermined voltage V2 by the resistor 120, the current flows. In this example, when the battery voltage VB is almost at the rated voltage, the predetermined voltage V3 is made higher than the predetermined voltage V4 by the resistor 120 (hereinafter, this is a normal state).

Between the first power supply circuit 96 and the second power supply circuit 110, two Darlington-connected NPN transistors 112 and 113 constituting a drive circuit 124 for driving the MOS transistor 31 via a resistor 114 are provided. It is connected. Note that the diode 111 is provided between the collectors of the NPN transistors 112 and 113.

Therefore, in the normal state, since the predetermined voltage V3 is higher than the predetermined voltage V4, the diode 111 allows a current to flow. Therefore, the NP from the primary side of the transformer 29
A base current flows through the N transistor 112, and the NPN transistor 112 is turned on. Then, the collector current of the NPN transistor 112 increases
3 from the primary side of the transformer 29 to N
A collector current flows through the PN transistor 113.

On the other hand, when the predetermined voltage V4 is higher than the predetermined voltage V3, for example, when the battery voltage drops, the base current of the NPN transistor 112 flows from the secondary side, and the NPN transistor 112 is turned on. Then
The NPN transistor 113 is also turned on, and the transformer 2
A collector current flows through the NPN transistor 113 from the primary side of the NPN transistor 9.

At this time, since the predetermined voltage V4 is higher than the predetermined voltage V3, the diode 111 does not flow a current. Therefore, the relationship that the predetermined voltage V4 is higher than the predetermined voltage V3 is maintained. The above NPN transistor 1
As shown in FIG. 5, the operation of 12 and 113 is performed by receiving five output signals of the PWM control circuit 9 and turning on / off the five Ns.
It is controlled by PN transistors 115-119. Hereinafter, these five NPN transistors 11
5 to 119 will be described.

The NPN transistors 115 and 116
It is turned on / off according to the output signal (duty signal) of the WM control circuit 9. Hereinafter, among the output signals, a high-level signal is referred to as an ON signal, and a low-level signal is referred to as an OFF signal. For example, when the output signal is an ON signal, the NPN transistors 115 and 116 are turned on, and the constant current from the constant current source 121 becomes the collector current of the NPN transistor 115. As a result, the NPN transistors 117 and 118 are turned off, and the NPN transistor 119 is also turned off.

That is, when the duty signal is an ON signal, the NPN transistors 115 and 116 are turned ON,
N transistors 117 to 119 are turned off. Therefore,
The collector current of NPN transistor 112 flows into the base of NPN transistor 113, and NPN transistor 113 is turned on. As a result, the collector current of the NPN transistor 113 flows into the gate of the MOS transistor 31, and the MOS transistor 31 is turned on.

On the other hand, if the output signal is an off signal,
Since the NPN transistors 115 and 116 are turned off,
The NPN transistor 117 is turned on by the constant current source 121. As a result, a constant current from the constant current source 122 flows through the NPN transistor 117. At this time, the NPN transistor 118 is also turned on by the constant current source 121. As a result, the collector current of NPN transistor 112 flows into NPN transistor 118. As a result, the NPN transistor 113 turns off.

Since the NPN transistor 116 is off, the collector current flowing through the NPN transistor 117 flows into the base of the NPN transistor 119,
The NPN transistor 119 turns on. This allows
The collector current of NPN transistor 113 does not flow into the gate of MOS transistor 31, but becomes the collector current of NPN transistor 119, and MOS transistor 31 is turned off.

As described above, the MOS transistor 31 is turned on / off by the ON signal and the OFF signal. Also, as shown in FIG. 5, a diode 123 is provided between the gate of the MOS transistor 31 and the constant current source 122. This diode 123
Is to increase the switching speed when the MOS transistor 31 is turned off from on. In other words, MO
When the S transistor 31 is turned off from on, M
The charge stored in the gate of the OS transistor 31 is extracted through the diode 123 to increase the collector current of the NPN transistor 117. This gives N
Since the base current of the PN transistor 119 increases,
The NPN transistor 131 turns off quickly. As a result, the switching speed of the MOS transistor 31 can be improved.

Next, the operation of the circuit of FIG. 5 will be described in detail. As a premise, the battery voltage VB is almost rated voltage,
The second power supply circuit 110 generates a predetermined voltage V3.
It is assumed that the lighting switch SW is turned on and the output signal of the PWM control circuit 9 is an on signal. At this time, immediately after the lighting switch SW is turned on, no voltage is generated on the secondary side of the transformer 29. Therefore, in this case,
The NPN transistor 112 is turned on by the predetermined voltage V3 of the second power supply circuit 110, and the NPN transistor 113 is also turned on. That is, the NPN transistors 112 and 11
3 is connected to the second power supply circuit 1
Flow (obtained) by 10. As a result, the MOS transistor 31 is connected to the primary side of the flyback transformer 29,
That is, the drive power is obtained from the second power supply circuit 110 and the second power supply circuit 110 is turned on.

Thereafter, when the PWM control circuit 9 repeats the ON / OFF signal, the secondary winding 29b receives the energy of the primary winding 29a, and the secondary voltage gradually increases. As a result, the predetermined voltage V2 is generated in the first power supply circuit 96, and further the predetermined voltage V4 is generated. Next, it is assumed that the predetermined voltage V3 also decreases because the battery voltage decreases during lamp lighting, and the predetermined voltage V3 becomes lower than the predetermined voltage V4.

Then, diode 111 switches the current path so that the base current of NPN transistors 112 and 113 is obtained from the secondary side of transformer 29 (first power supply circuit 96). That is, the NPN transistor 112 obtains the driving power from the secondary side (the first power supply circuit 96) of the transformer 29. As a result, in the present embodiment, when the power supply voltage VB of the battery 1 decreases during lighting, the NPN transistors 112 and 113 and the MOS transistor 31 are stably driven by the first power supply circuit 96 on the secondary side of the transformer 29. Can be controlled.

Therefore, in this embodiment, the predetermined voltage V
3 is lower than the predetermined voltage V4.
A driving power supply for the N transistor 112 is obtained from the first power supply circuit 96. This has the following effects. Transformer 29
As described above, a high voltage such as 400 V is generated on the secondary side. Therefore, if the Zener diode 97 is small and inexpensive, it is necessary to use a resistor 95 having a very large resistance value. However, in this case, there is a problem that large power is consumed by the resistor 95 having a large resistance value.

Therefore, in the present embodiment, the resistance 95 is set only when the predetermined voltage V3 becomes lower than the predetermined voltage V4.
Current flows through the resistor 95
Power consumption can be reduced. As described above, a high voltage of 400 V is generated on the secondary side of the transformer 29, but the power consumption of the resistor 95 decreases as the resistance value increases. The maximum value R of the resistance value of the resistor 95
(95) = (VL−V2) / Is.

Note that VL is the secondary voltage of the transformer 29 (the minimum value required for normal operation of the NPN transistor 112), and Is is the current supplied by the first power supply circuit 96 to the load. In such a relationship, V2 and I
s is a fixed value determined by the circuit. Therefore, the resistance 9
The resistance value of 5 is determined by how many volts the minimum value of VL is. Therefore, in this example, the drive power supply for the NPN transistor 112 is obtained from the first power supply circuit 96 only when the predetermined voltage V3 becomes lower than the predetermined voltage V4.
Thus, the resistance value of the resistor 95 can be increased, so that the power consumption of the resistor 95 can be reduced.

In the present embodiment, the following effects are obtained by connecting the NPN transistor 112 and the NPN transistor 113 in Darlington. However, the above resistance 1
The description will be made ignoring the voltage drop at 14. Battery voltage V
When B is almost at the rated voltage, NP
The base current and the collector current of the N transistors 112 and 113 are connected to the primary side of the transformer 29 (second power supply circuit 1).
Flows from 10). Therefore, the NPN transistor 113
Is the sum of the above-described voltage drop, the collector-emitter potential drop, and the forward voltage drop of the diode 111.

That is, in this example, the MOS transistor 3
1 is applied to the gate of V3- (VBE112
+ VBE113) = V3-1.4 (V). In addition,
VBE112 is a forward voltage drop between the emitter and base of the transistor 112, and VBE113 is a forward voltage drop between the emitter and base of the transistor 113.

For example, assume that the battery voltage VB gradually decreases from the rated voltage, and the predetermined voltage V3 becomes lower than the predetermined voltage V4. In this case, as described above, the NPN transistor 113 is turned on by the first power supply circuit 96, and the potential difference between the predetermined voltage V4 and the emitter of the NPN transistor 113 is between the base and the emitter of the NPN transistors 112 and 113. It becomes the sum of each voltage drop.

However, in this case, the diode 1
11, it is considered that the first power supply circuit 96 and the second power supply circuit 110 are separated from each other. In this case, the potential difference between the emitter and the collector of the NPN transistor 113 is only the voltage drop between the emitter and the collector. That is,
The voltage applied to the gate of the MOS transistor 31 is
V3-VCE113 = V3 (V). In addition, VCE
Is the voltage drop between the collector and the emitter of the transistor 113 = 0 (V).

Therefore, until the battery voltage VB decreases to the gate voltage necessary for performing the switching operation of the MOS transistor 31, the MOS transistor 3
1 can be turned on. Note that 246 in FIG.
This is a PN transistor. When an abnormal state described later occurs, the control of the PWM control circuit 9 is stopped, that is, the NPN transistors 115 and 116 are turned off by the second abnormality circuit 244 in order to turn off the MOS transistor 31. Both are forcibly turned off.

[Regarding Lamp Power Control Circuit 10] Next, a specific configuration of the lamp power control circuit 10 is shown in FIG. The lamp power control circuit includes an error amplifying circuit (integrating circuit) 61 that generates an output according to a lamp voltage VL, a lamp current IL, or the like, which is a signal indicating a discharge lighting state of the lamp 2. The output of 61 is PWM
It is to be input to the control circuit. This lamp power control circuit 10 finally becomes an error amplification circuit (integration circuit).
The lamp power is controlled by inverting the output voltage (output signal) of 61 in the PWM control circuit 9.

That is, the PWM control circuit 9 controls so that the higher the output potential of the error amplifier circuit 61 is, the smaller the threshold level with respect to the sawtooth wave is and the larger the on / off duty ratio of the MOS transistor 31 is. This increases lamp power. On the other hand, P
The WM control circuit 9 increases the threshold level for the sawtooth wave as the output potential of the error amplifier circuit 61 decreases, and controls the ON / OFF duty ratio of the MOS transistor 31 to decrease. Thereby, the lamp power decreases.

As shown in FIG. 6, a reference voltage Vref is input to the non-inverting input terminal of the error amplifier circuit 61.
The voltage V1 serving as a parameter for controlling the lamp power PL is input to the inverting input terminal. As a result, the error amplifying circuit 61 generates an output corresponding to the voltage V1, and the on / off duty ratio is set based on the output.

When the voltage V1 becomes higher than the reference voltage Vref, the output voltage of the error amplifier 61 becomes lower,
When the voltage V1 becomes lower than the reference voltage Vref, the output voltage of the error amplifier circuit 61 operates so as to become higher. The voltage V1 is a composite signal such as the lamp current IL and the lamp voltage VL, that is, the lamp current IL, the current i1 flowing by the constant voltage V2, the current i2 set by the first current setting circuit 63, and the second current It is determined based on the current i3 set by the setting circuit 65.

When the voltage V1 becomes higher than the reference voltage Vref, the output voltage of the error amplifying circuit 61 becomes lower and the voltage V1 becomes higher.
Is lower than the reference voltage Vref, the output voltage of the error amplifier 61 operates so as to increase. Note that the ramp voltage VL is an output value from the sample and hold circuit 12. The sum of the current i1, the current i2, and the current i3 is
It is set to be sufficiently smaller than the lamp current IL.

Here, the first current setting circuit 63 sets the current i2 to be larger as the lamp voltage VL becomes higher as shown in FIG. Further, as shown in the figure, the current i2 is set in such a manner that different straight lines having a gentler slope as the lamp voltage VL becomes higher are connected. The second current setting circuit 65 sets the current i3 so as to increase as the time T increases, as shown in the figure. Note that this time T corresponds to the elapsed time since the lamp 2 was turned off, and indirectly predicts the state of the electrode temperature.

That is, when the lamp 2 is continuously turned on for a certain period of time, the electrode temperature is sufficiently high. When the lamp 2 is turned off for a short time and then turned on again, the temperature of the electrode decreases. The amount is small. Therefore,
In this case, the lamp power may be smaller than that in a state where the electrodes are completely cooled down to, for example, the outside air temperature. As a result, in the present embodiment, the lamp temperature can be controlled in accordance with the electrode temperature by indirectly predicting the electrode temperature by the lamp power control circuit 10.

As described above, the lamp power control circuit 10
Performs control based on the lamp current IL and the lamp voltage VL, so it is important to accurately detect the lamp current IL and the lamp voltage VL. In the present embodiment, a clamp circuit 69 and a sample hold circuit 12 are provided to accurately detect the lamp voltage VL and the lamp current IL. Hereinafter, the clamp circuit 69 and the sample hold circuit 12 will be described.

The clamp circuit 69 clamps the voltage V1 input to the inverting input terminal of the error amplifier 61. As shown, the clamp circuit 69 forms a voltage follower circuit. The non-inverting input terminal of the operational amplifier 69a provided in the clamp circuit 69 has a predetermined voltage Vre input to the non-inverting input terminal of the error amplifier circuit 61.
A voltage of Vref-α lower than f by a predetermined voltage is input. However, a diode 69b is connected to the output terminal of the clamp circuit 69, so that the operational amplifier 69a cannot draw current from the output terminal side.

In such a configuration, when the voltage V1 is higher than the predetermined voltage Vref-α, the operational amplifier 69
Since the voltage at the inverting input terminal becomes higher than that at the non-inverting input terminal a, the operational amplifier 69a tries to draw current from the output terminal side. However, the output terminal side has a diode 6
9b, the operational amplifier 69a cannot draw current, and the voltage V1 is
Is input to the error amplification circuit 61 without being affected by

When the voltage V1 becomes lower than the predetermined voltage Vref-α, the voltage at the non-inverting input terminal of the operational amplifier 69a becomes higher than that at the inverting input terminal, so that the operational amplifier 69a pushes the current to the output terminal side. Thus, the voltage V1 is maintained so as not to be lower than the predetermined voltage Vref-α. FIG. 7 shows a change in the voltage V1 when the clamp circuit 69 is provided as described above. As shown in FIG. 7, MOS transistors 41a to 41a in the H-bridge circuit 7a
At the time of on / off switching of 1d, the lamp current IL drops momentarily greatly, and the voltage V1 changes instantaneously. However, the voltage V1 does not fall below the predetermined voltage Vref-α by the clamp circuit 69, and is maintained at a voltage higher than the predetermined voltage Vref-α. For this reason, no sharp change in the voltage V1 occurs.

Thus, MOS transistors 41a-41
Since the change of the voltage V1 at the time of switching of 41d (at the time of switching of the discharge current of the lamp 2) can be reduced,
When performing feedback control of the power supplied from the battery 1, the effect of the instantaneous change in the lamp current IL can be suppressed. In addition, the time during which the lamp current IL decreases decreases as the inductance of the transformer 47b increases. And in this embodiment,
Since the transformer required for the starting circuit 8 and the DC power supply circuit 5 is shared by the flyback transformer 29, the inductance of the transformer 47b is large, and the influence of the lamp current IL increases. However, since the clamp circuit 69 is provided in this manner, even in such a case, the influence of the lamp current IL on the feedback control can be effectively suppressed.

The MOS transistors 41a to 41d
When the switching frequency is high, the influence of the change in the lamp current IL on the feedback control becomes significant due to the delay of the feedback control. is there. The error amplifying circuit 61 is provided with an integrating capacitor 61a.
It is possible to reduce the influence of the lamp current IL by increasing the capacitance of the capacitor 1a. However, when the capacitance of the capacitor 61a is increased in this manner, the error amplifier circuit 6
1 cannot be ensured, the clamp circuit 69
Is effective.

FIG. 8 shows a circuit configuration of the sample hold circuit 12. The sample and hold circuit 12 includes the secondary winding 4
7b and the transient voltage generated by the capacitor 35 is eliminated. The sample and hold circuit 12 includes a buffer amplifier circuit 129 to which an inverting input terminal 125 and an output terminal 147 are connected, and a mask circuit 131 for maintaining the output of the buffer amplifier circuit 129 for a predetermined period. , The transient voltage is excluded from the lamp voltage VL including. The sample hold circuit 12 includes an operational amplifier 152,
The operational amplifier 152 generates the output of the sample-and-hold circuit 12 and finally the lamp power control circuit 1
A control signal corresponding to the lamp voltage VL is sent to 0.

FIG. 9 is a schematic diagram of the ramp voltage VL detected via the sample and hold circuit 12. Hereinafter, the operation of the sample and hold circuit 12 will be described with reference to FIG. The sample-and-hold circuit 12 receives the NPN transistors 133a and 133 in the mask circuit 131 based on a timing signal from a digital circuit (not shown).
Turn on / off 33b. When the timing signal (input signal) to the mask circuit 131 is a low-level signal, the sample-and-hold circuit 12 samples the lamp voltage VL at that time and generates an output corresponding to the lamp voltage VL. Is switched to the high level signal, the output corresponding to the lamp voltage VL sampled immediately before is maintained (held). Hereinafter, a specific operation will be described separately for a case where the timing signal is a low level signal and a case where the timing signal is switched to a high level signal.

When the timing signal is a low-level signal In this case, the NPN transistors 133a and 133b
Is off, an output corresponding to the lamp voltage VL is generated. Lamp voltage V input to non-inverting input terminal 127
When L increases, the difference voltage between the voltage of the inverting input terminal 125 and the voltage of the non-inverting input terminal 127 increases, and the voltage of the base terminal of the transistor 141 which is the output of the differential circuit by the transistors 135, 155, 137, and 139 Rises, and the transistor 1 forming the emitter follower circuit
41, 145, the current is amplified by the buffer amplifier circuit 1
The voltage of the 29 output terminal 147 increases. By this operation, the operation is performed so that the voltage of the non-inverting input terminal 127 and the voltage of the inverting input terminal 125 (the voltage of the output terminal 147 of the buffer amplifier circuit 129) become equal.

That is, the buffer amplifier circuit 129
The operation as a differential amplifier circuit is performed so that the voltage of the output terminal 147 becomes the same voltage as the lamp voltage VL. Therefore,
The current flowing into the capacitor 151 via the ripple smoothing resistor 149 increases, and the charging voltage of the capacitor 151 increases. Then, the operational amplifier 152 outputs an output accompanying the increase in the charging voltage.

Note that the current flowing through the PNP transistor 155 from the constant current source 143 increases due to the decrease in the value of the current flowing through the PNP transistor 135, and the inverting input terminal 12
Although the bias current flowing through 5 increases, this current is extremely small and does not affect the charging of the capacitor 151. When the lamp voltage VL input to the non-inverting input terminal 127 decreases, the operation reverse to the above-described operation is performed so that the voltage of the output terminal 147 becomes the same voltage as the lamp voltage VL.

That is, when the timing signal is a low level signal, a voltage corresponding to the lamp voltage VL at that time is stored in the capacitor 151, and the sample and hold circuit 12 samples the lamp voltage VL at that time. When the timing signal is switched to a high level signal In this case, the NPN transistors 133a and 133b
Turns on. Therefore, the current from the constant current source 143 flows into the transistor 133a and the constant current source 157
From the transistor 133b flows into the transistor 133b,
The transistors 145, 159, and 161 are turned off. Therefore, at this time, no current flows through the capacitor 151, and the capacitor 151 holds the charging voltage immediately before the timing signal switches to the high level signal. That is, when the timing signal switches to the high level, the buffer amplifier circuit 129 does not operate as a differential amplifier circuit.

As described above, the buffer amplifier circuit 129 operates as a differential amplifier circuit except when a transient voltage occurs, and the buffer amplifier circuit 129 does not operate as a differential amplifier circuit when a transient voltage occurs. In order to mask the transient voltage portion. This makes it possible not to sample the lamp voltage VL when a transient voltage occurs, and to detect the lamp voltage VL in a normal state other than when a transient voltage occurs. Conventionally, the lamp voltage VL is flattened by using a choke coil so that the lamp voltage VL in a normal state can be detected. However, by providing the sample-and-hold circuit 12, the choke coil is used. Without this, the normal lamp voltage VL can be detected.

The timing signal generated by the above-described digital circuit is synchronized with the switching timing of the MOS transistors 41a to 41d in the H-bridge circuit 7a.
After switching from a to 41d, a high level signal is output for several tens μs to several hundred μs. [Regarding the PWM control circuit 9] Next, the PWM control circuit 9
Will be described in detail. FIG. 10 shows a circuit diagram of the PWM control circuit 9.

As shown in FIG. 10, the PWM control circuit 9 includes a sawtooth wave forming circuit 163 for forming a sawtooth wave, a threshold level setting circuit 165 for setting a threshold level (duty ratio) in the sawtooth wave, and a sawtooth wave. A comparator 167 that compares the threshold level with the threshold level to set the ON / OFF duty ratio of the MOS transistor 31.

The sawtooth wave forming circuit 163 will be described. The sawtooth wave forming circuit 163 varies the charging voltage of the capacitor 177 charged by the current It flowing from the constant current source 169 via the diode 171 and the current It flowing through the resistor 175 based on the voltage of the constant voltage source 173. Thus, a sawtooth wave is formed. That is, based on the output of the comparator 181, N
The PN transistors 183a and 183b are turned on and off, thereby varying the threshold voltage set by the resistors 179a to 179c to form a sawtooth wave. Hereinafter, the basic operation of the sawtooth wave forming circuit 163 will be described.

FIG. 11A shows the sawtooth wave formed by this basic operation. Hereinafter, FIG. 10 and FIG.
The formation of a sawtooth wave will be described based on FIG. The capacitor 177 is charged by the constant current source 169 from the diode 17.
1 and the current It flowing through the resistor 175 based on the voltage of the constant voltage source 173.

The charging of the capacitor 177 is continued until the charging voltage of the capacitor 177 becomes the first threshold voltage Va, which is the voltage between both ends of the resistors 179b and 179c. The voltage increases with a predetermined slope. After this, capacitor 1
When the charging voltage of 77 becomes the voltage Va, the comparator 18
1 outputs a high level signal, and the NPN transistor 18
3a and 183b are turned on. As a result, the first threshold voltage Va decreases to the second threshold voltage Vb, which is a voltage across the resistor 179b, and the capacitor 177 is discharged via the resistor 201. Due to the discharge of the capacitor 177, the charged voltage of the capacitor 177 rapidly decreases.

When the charging voltage of the capacitor 177 decreases to the second threshold voltage Vb, the comparator 18
1 outputs a low level signal, and the NPN transistor 18
3a and 183b turn off. As a result, the second threshold voltage Vb returns to the first threshold voltage Va. Further, thereafter, the charging / discharging of the capacitor 177 is similarly repeated to form a sawtooth wave having a relatively short cycle, that is, a relatively high frequency.

The sawtooth wave forming circuit that performs such an operation includes a frequency changing circuit 185, and the frequency changing circuit 185 changes the frequency of the sawtooth wave. The frequency changing circuit 185 includes a circuit 185a for changing the switching frequency before and after the lamp 2 is turned on and a circuit 1 for changing the switching frequency in accordance with the battery voltage VB.
85b.

The circuits 185a and 185b mainly affect the operation of the sawtooth wave forming circuit 163 before and after the lamp is turned on, respectively. Hereinafter, the circuit 185a
The operation of the saw-tooth wave forming circuit 163 will be described below with reference to FIG. First, the structure of the circuit 185a will be described. The circuit 185a compares a voltage VIL (high voltage side of the current detection resistor 59) obtained by converting the lamp current IL with a predetermined voltage Vs, and ON / OFF control is performed by an output signal of the comparator 187. NPN transistor 189 is provided. With the provision of the circuit 185a configured as described above, the frequency of the sawtooth wave formed by the sawtooth wave forming circuit 163 is changed as described below. Hereinafter, formation of the sawtooth wave before and after lighting of the lamp 2 will be described.

Before Lighting of Lamp 2 A sawtooth wave formed before lighting of lamp 2 is shown in FIG.
(B). Before the lamp 2 is turned on, since the voltage VIL is zero, the comparator 187 outputs a high-level signal and the NPN transistor 189 turns on. As a result, the current Ik from the constant current source 169 is
The capacitor 177 is charged only by the current It flowing through the resistor 175 based on the voltage of the constant voltage source 173 without flowing into the constant voltage source 173. Therefore, as shown in FIG. 11B, the charging time of the capacitor 177 becomes longer, and the period of the sawtooth wave becomes longer.

Thereafter, the discharging and charging of the capacitor 177 are repeated in the same manner as in the basic operation described above, and the frequency is lower than that of the sawtooth wave formed by the basic operation of the sawtooth wave forming circuit 163. A sawtooth wave having a long periodic period is formed. After the lamp is turned on After the lamp 2 is turned on, the voltage VIL becomes a predetermined voltage, and the comparator 187 outputs a low level signal.
The NPN transistor 189 turns off. Therefore, the sawtooth wave forming circuit 163 forms the sawtooth wave without being affected by the circuit 185a.

Next, the configuration of the circuit 185b will be described. The circuit 185b includes resistors 191a and 191b for dividing the battery voltage VB. Then, the voltage VB1 divided by these is input to the operational amplifier 193. Thus, when the voltage VB1 is equal to or higher than the constant voltage of the constant voltage source 173, the transistor 197 is turned off. When the voltage VB1 is lower than the constant voltage, the transistor 197 is turned off.
Is adapted to flow a current corresponding to the battery voltage VB. When the battery voltage VB decreases, a current proportional to the current flowing through the transistor 197 flows through the transistor 199a via the current mirror circuit 199.

With the provision of the circuit 185a thus configured, the frequency of the sawtooth wave formed by the sawtooth wave forming circuit 163 is changed as described below. Less than,
The formation of the sawtooth wave will be described separately when the battery voltage VB is sufficient and when the battery voltage VB decreases. When the battery voltage VB is sufficient In this case, the transistor 197 is off as described above. Therefore, the capacitor 177 is charged based on the current Ik flowing from the constant current source 169 via the diode 171 and the voltage at the constant voltage source 173.
This is done by the current It flowing through 75. Therefore, the sawtooth wave forming circuit 163 performs the above-described basic operation to form a sawtooth wave similar to that shown in FIG.

FIG. 11 (c) shows a sawtooth wave formed when the battery voltage VB is low when the battery voltage VB is low. As described above, the transistor 197 flows a current proportional to the battery voltage VB. Therefore, a current corresponding to the battery voltage VB flows into the transistor 199a via the current mirror circuit 199. As a result, the constant current from the constant current source 169 is extracted from the current corresponding to the battery voltage VB.

Therefore, current Ik from constant current source 169 is
Is reduced and flows into the capacitor 177. Therefore, the capacitor 177 is charged by the current Ik reduced by the decrease in the battery voltage VB and the current It flowing through the resistor 175 based on the voltage of the constant voltage source 173. As a result, the charging time of the capacitor 177 becomes longer as compared with the case where the battery voltage VB is sufficient, and FIG.
As shown in FIG. 1C, the period of the sawtooth wave becomes longer.

Thereafter, the sawtooth wave forming circuit 163 repeatedly discharges and charges the capacitor 177 in the same manner as described above.
When the battery voltage VB is sufficient and the frequency is lower than when the lamp 2 is turned on, a sawtooth wave having a relatively long period is formed. As described above, before the lamp 2 is turned on, the frequency of the sawtooth wave is uniformly changed to a relatively low frequency by the circuit 185a as described above, and after the lamp is turned on, the circuit 185b reduces the battery voltage VB. The frequency of the sawtooth wave is changed accordingly.

Next, the threshold level setting circuit 16
5 will be described. Threshold level setting circuit 1
65 is a lamp power control circuit 10 (error amplification circuit 6
A threshold for setting a threshold level according to the command signal from 1) and for performing constant voltage control (for example, 400 V control) so that the lamp voltage VL does not exceed a predetermined voltage when the lamp is not turned on. Set the threshold level. Further, the threshold level setting circuit 165 is connected to the lamp power control circuit 10 (the error amplifier circuit 6).
It has an inverting circuit for inverting the command signal from 1).
The level of the command signal from the lamp power control circuit 10 changes according to the lamp power PL to be supplied. The larger the lamp power PL to be supplied, the lower the duty ratio must be to increase the power supply. An inverting circuit is provided in the circuit 165 so that the level of the command signal and the threshold level are inverted.

As will be described later in detail, the threshold level setting circuit 165 is provided with a circuit for setting a duty limit value which is an upper limit value of the duty ratio. Next, the comparator 167 will be described. The comparator 167 compares the above-mentioned sawtooth wave with the threshold level to set the ON / OFF duty ratio of the MOS transistor 31.

At this time, the switching frequency of the MOS transistor 31 depends on the sawtooth wave forming circuit 16 described above.
Since the frequency is the same as the frequency of the sawtooth wave formed in step 3,
Before the lamp 2 is turned on, the frequency is relatively low regardless of the level of the battery voltage VB. When the lamp 2 is turned on and the battery voltage VB is sufficient, the frequency is relatively high. When the lamp 2 is turned on and the battery voltage VB is decreasing, the frequency is relatively low according to the decrease in the battery voltage VB.

FIG. 12 shows a waveform of the lamp voltage VL before the lamp 2 is turned on. The dashed line (a) in FIG. 12 shows the case where the battery voltage VB is sufficient, the solid line (b) shows the case where the battery voltage VB is reduced, and the broken line (c) shows the case where the switching frequency is not lowered. FIG.
(A) and (b), as shown in FIG.
When the switching frequency is relatively low, the lamp voltage VL reaches a predetermined value necessary for lighting the lamp, and is controlled to a predetermined value (for example, the above-described 400 V) at a constant voltage. When the switching frequency is not changed, (c)
As shown in (1), the lamp voltage VL changes depending on the battery voltage VB. As the battery voltage VB decreases, the lamp voltage VL also decreases. That is, by lowering the switching frequency, the cutoff current value of the primary current flowing through the primary winding 29a of the transformer 29 can be increased, and the output power of the DC power supply circuit 5 can be increased as compared with a case where the switching frequency is not changed. .

The total energy W stored in the primary winding 29a per unit time (≒ the output power of the DC power supply circuit 5) is expressed by the following equation (1).

[0111]

W = f × １ ／ LI ² where f: switching frequency, L: inductance of primary winding 29a, I: primary current. As represented by Equation 1, the total energy W stored in the primary winding 29a per unit time increases in proportion to the switching frequency and the square of the current. For this reason, the ON / OFF cycle of the MOS transistor 31 (= 1/1)
By increasing the switching frequency, the primary current increases even if the switching frequency decreases.
The total energy W stored in the primary winding 29a per unit time increases.

In this embodiment, since the switching frequency of the MOS transistor 31 is relatively low, the total energy W stored in the primary winding per unit time is large as described above. That is, the output power of the DC power supply circuit 5 increases, and the lamp voltage VL of a predetermined voltage value required for lamp lighting can be supplied even when the battery voltage VB is reduced.

As described above, by the circuit 185a, when the lamp 2 is not lit, the switching frequency of the MOS transistor 31 is made lower uniformly than when the lamp 2 is lit, so that the lamp 2 needs to be turned on. Since power can be supplied, the lighting performance of the lamp 2 can be improved. Also, after the lamp 2 is turned on, the lamp 2 is turned on at a predetermined switching frequency to reduce the ripple of the lamp current, thereby suppressing the acoustic resonance phenomenon.

Subsequently, when the lamp 2 is lit, when the battery voltage VB is sufficient and when the battery voltage VB
FIGS. 13A and 13B show comparison diagrams of the waveform of the primary current when B decreases. In the present embodiment, the MOS transistor 31
Since the switching frequency of FIG.
As shown in (a) and (b), the primary current becomes sufficiently large not only when the battery voltage VB is sufficient but also when the battery voltage VB is reduced. Therefore, as described above, the total energy W per unit time that can be supplied to the secondary winding 29b increases. Also,
Since the frequency is low, the MOS transistor 31
Is turned off, the energy supply to the secondary winding 29b can be sufficiently performed.

As described above, when the lamp 2 is turned on and the battery voltage VB is sufficient, the MOS
When the switching frequency of the transistor 31 is set to a relatively high predetermined frequency and the battery voltage VB decreases, the predetermined frequency is reduced according to the decrease in the battery voltage VB. The energy supply to the next side can be sufficiently performed.

Therefore, the energy consumption efficiency can be improved even when the battery voltage VB drops while the lamp 2 is on, for example, the lamp 2 goes out while it is on. Can be suppressed. [Regarding Threshold Level Setting Circuit 165] Next, details of the threshold level setting circuit 165 will be described with reference to FIG.

The threshold level setting circuit 165
An inverting circuit 165a for inverting a command signal output from the lamp power control circuit 10 (error amplifying circuit 61);
b, a control 65c for constant voltage control of the lamp voltage VL before the lamp 2 is turned on to a predetermined value, and a control circuit 165c for constant voltage control of the lamp voltage VL to a predetermined value before the lamp 2 is turned on.

The above-mentioned limit value is for ensuring that sufficient energy is supplied to the secondary side of the flyback transformer 29 as described above. That is, the secondary side output of the flyback transformer 29 has an upwardly convex relationship with the duty ratio. Therefore, for example, when the lamp power control circuit 10 functions to increase the duty ratio in order to significantly increase the lamp power, the secondary output of the flyback transformer 29 is prevented from being reduced. Is set.

First, the inversion circuit 165a will be described. The inverting circuit 165a includes a current mirror circuit 205 through which a current flows from the constant voltage source 203, and an NPN using the current iS flowing through the current mirror circuit 205 as a base current.
And a transistor 207. The error amplification circuit 61
Is connected to the current mirror circuit 205 including two NPN transistors 205a and 205b via a resistor 209. Here, the error amplification circuit 6
When the lamp power is controlled by the output of No. 1,
The transistor 400 of the control circuit 165c is off. The operation of the inverting circuit 165a in this case is as follows.

When the lamp power is reduced, the output voltage of the error amplifier 61 decreases, and the current isa flowing through the resistor 209 increases. At this time, the current isb obtained by mirroring this current with the current mirror circuit 205 becomes isa. Then, the voltage VM obtained by converting the current isb into a voltage by the resistor 210 becomes higher, and the voltage VM becomes the input voltage VN of the inverting input terminal of the comparator 167 via the transistor 207 forming an emitter follower circuit. Therefore, the input voltage VN increases, the threshold level increases, and the duty ratio decreases.

On the other hand, when increasing the lamp power, the output voltage of the error amplifier 61 rises,
The current isa that flows through the line decreases. As a result, the voltage VM obtained by converting the current isb into a voltage by the resistor 210 decreases. Therefore, the input voltage VN at the inverting input terminal of the comparator 167 decreases, the threshold level decreases, and the duty ratio increases.

Next, the limit value setting circuit 165b will be described. The limit value setting circuit 165b includes a first limit value setting circuit 211 that varies the limit value according to the battery voltage VB, and the limit value according to the lamp voltage VL that is (corresponding to) information indicating the power supplied to the lamp 2. It has a second limit value setting circuit 213 for changing the value, and a third limit value setting circuit 215 for setting the limit value to the maximum value that can be set on the circuit when the battery voltage VB falls below a predetermined value.

The first limit value setting circuit 211 detects only the battery voltage VB from the terminal A provided between the battery 1 and the primary winding 29a of the flyback transformer 29 (FIG. 1). reference). The first limit value setting circuit 211 includes resistors 223 to 225. The voltage V0 at the connection point of these resistors 223 to 225
Means that when the transistor 227 described later is off (when the battery voltage is sufficient) and the lamp voltage VL is 0, the resistance 2
It is determined only by the partial pressure of 23 to 225 and has a value corresponding to the battery voltage VB. When the battery voltage VB decreases, the voltage V0 decreases. When the battery voltage VB increases, the voltage V0 increases.

The second limit value setting circuit 213 includes a resistor 2
22, a current mirror circuit 221 (NPN transistors 221a and 221b), and detects only the lamp voltage VL indicating the supply power of the lamp 2 from the terminal C. Second limit value setting circuit 213
Is to set the limit value to a large value as the lamp voltage VL increases.

That is, the current flowing through the current mirror circuit 221 is varied only according to the lamp voltage VL, and increases as the lamp voltage increases. When the lamp voltage VL increases, the collector of the NPN transistor 221b of the current mirror circuit 221 changes. The current increases. Therefore, the voltage V
0 decreases by an increase in the collector current of the NPN transistor 221b. On the other hand, when the lamp voltage VL decreases,
The collector current of the NPN transistor 221b decreases,
The voltage V0 increases.

That is, the threshold level setting circuit 165 sets the voltage determined by the battery voltage VB and the ramp voltage VL to V0, and sets the voltage on the base side of the NPN transistor 207 corresponding to the output voltage of the error amplifier circuit 61 to VM. Then, the following functions are performed. However,
For simplicity of explanation, the NPN transistor 2
The voltage drop between each base and collector of the NPN transistor 07 and the NPN transistor 217 is neglected.

For example, it is assumed that the voltage VM is lowered in order to increase the lamp power by the output signal of the error amplifier circuit 61. At this time, if the voltage VM is higher than the voltage V0, the NPN transistor 217 turns off. Thus, the input voltage VN becomes the voltage VM,
The threshold level is set according to the output signal of error amplifier circuit 61.

On the other hand, it is assumed that the voltage VM becomes lower than the voltage V0 in order to greatly increase the lamp power by the output signal of the error amplifier circuit 61. Then
The NPN transistor 207 turns off and the NPN transistor 217 turns on. As a result, the input voltage VN is the voltage V0, and the voltage V0 has the above-described limit value, and the threshold level is limited so as not to be further increased.

That is, the first limit value setting circuit 211
When the battery voltage VB decreases in accordance with only the battery voltage VB, the voltage V0 also decreases. Therefore, the lower the battery voltage VB, the larger the limit value is set. Further, the second limit value setting circuit 213 determines that the higher the lamp voltage VL, the lower the voltage V0 in accordance with only the lamp voltage VL.
Set the above limit value large.

As described above, in this example, the battery voltage VB
As means for detecting only the voltage, a terminal A is provided as shown in FIG. 1, and the limit value is varied according to the battery voltage VB detected from the terminal A. As a result, the limit value can be accurately set according to the battery voltage VB. As means for detecting only the lamp voltage VL described above, a terminal C is provided as shown in FIG.
The limit value is varied according to the lamp voltage VL detected from the terminal C. As a result, the limit value can be accurately set according to the lamp voltage VL which is a load of the lamp 2.

Further, since the control signal (VL) used in the lamp power control circuit 10 is used as the load of the lamp 2, it is not necessary to provide a means for detecting the load of the lamp 2 specially. Reduction can be achieved. The first and second limit value setting circuits 211, 2
Reference numeral 13 sets the limit value by a circuit constant determined by, for example, the resistors 223 and 225. In the present example, the first limit value setting circuit 211 can set the limit value with high accuracy while the battery voltage VB decreases from the rated voltage of 12 V to about 7 V.

Therefore, for example, when the battery voltage VB is greatly reduced and becomes smaller than 7 V, the above-mentioned limit value is not appropriate, and it is necessary to further increase the limit value. In other words, when the battery voltage VB is further reduced, the output of the secondary side of the flyback transformer 29 is also greatly reduced. Therefore, if the limit value is not increased accordingly, the output of the secondary side can be sufficiently obtained. Absent.

Accordingly, the third limit value setting circuit 21
At 5, when the battery voltage VB falls below 7V,
Set the above limit value appropriately. Hereinafter, this will be described. Note that the limit value in this case is set within a range in which energy can be sufficiently supplied to the secondary winding 29b of the flyback transformer 29 when the duty ratio increases as described above.

The third limit value setting circuit 215 includes an NPN connected in parallel with a resistor 225 as shown in FIG.
The transistor 227 and the NPN transistor 227
And a comparator 229 for turning on and off the switch. The comparator 229 supplies a predetermined voltage VK (7
V) is input, and the battery voltage VB is input from the terminal A to the inverting input terminal. Therefore, when the battery voltage VB falls below 7V, the NPN transistor 2
27 is turned on. As a result, the voltage V0 becomes substantially 0 V instead of the voltage division of the resistors 223 and 225.

As a result, the limit value is reduced to a value at which the duty ratio can be made almost 100%. Thereby, even when the battery voltage VB falls below 7 V, an optimum limit value can be set. Next, the control circuit 165c
Will be described. The control 165c sets the lamp voltage VL before turning on the lamp 2 to a predetermined voltage (for example, 4 V).
00V) is a circuit for controlling. And the terminal 401 is
The terminal for detecting the lamp voltage VL is connected to the terminal C in FIG. Until the lighting switch SW is turned on and the lamp 2 is lit (the lamp current is not flowing through the lamp 2), the voltage at the output terminal of the error amplifier circuit 61 is the highest voltage, and the current flows through the resistor 209. Absent. That is, the error amplifier 61 outputs a command signal for supplying the maximum power to the lamp 2.

Therefore, the PWM control circuit 9 operates in the state of the maximum duty determined by the second limit value setting circuit 165b. As a result, the DC power supply circuit 5 operates, and the lamp voltage VL rises, and when the lamp voltage VL reaches the predetermined value,
The control circuit 165c controls the lamp voltage VL at a constant voltage. More specifically, the lamp voltage VL is set to
The comparator 230 compares the voltage divided in steps 2 and 403 with the reference voltage Vd, and turns on / off the NPN transistor 404. That is, when the lamp voltage VL is equal to or lower than the predetermined value, the NPN transistor 404 is turned off, and when the lamp voltage VL is equal to or higher than the predetermined value, the NPN transistor 404 is turned on. When the NPN transistor 404 is turned on, a current determined by the resistor 405 flows through the NPN transistor 205a. Then, the same current flows through the NPN transistor 205b, the voltage VM increases, and the input voltage VN increases.

However, at this time, the output voltage VN is
5, the peak voltage of the sawtooth wave input to the non-inverting input terminal of the comparator 167 (V in FIG. 11)
a) higher. Therefore, the output signal of the comparator 167 is fixed to a low level signal, the MOS transistor 31 is turned off, and the ramp voltage VL stops rising.

Then, after this, the lamp voltage VL is increased due to the power consumption by the parts other than the lamp 2 over time.
Gradually decreases to the predetermined value or less, the NPN transistor 404 performs a switching operation again, and the lamp voltage VL increases. In this manner, the lamp voltage VL is controlled at a constant voltage by repeating this operation. [Regarding Fail Safe Circuit 14] Next, the fail safe circuit 1 will be described.
4 will be described. First, the vehicle mounting structure of the lamp 2 as a premise of the function of the fail-safe circuit 14 is shown in FIG.
5 will be described.

As shown in FIG. 15, the vehicle headlight 231 is
It has a reflector 233 that reflects the light of the lamp 2 toward the front of the vehicle. The reflector 233 is formed in a bowl shape, and houses the lamp 2 inside. Lamp 2
15 is inserted into the reflector 233 from the left side in FIG. 15, and is attached to the reflector 233 by a connector 235.

In brief, the connector 235 includes detachable connector portions 235a and 235b, and the connector portion 235a is connected to the reflector 23 from the left side in FIG.
3 and attached to the reflector 233 by rotating after insertion. Then, the connector 2
When 35b is fitted into 235a, lamp 2 can be turned on.

A shield 237 made of aluminum or the like is attached to the connector 235b so as to cover it. The shield part 237 is grounded as shown in FIG.
Is attached to the connector part 235b so that the Here, the shield portion 237 transmits a radio wave generated when the lamp 2 is turned on to the lamp 2 (the reflector 23).
This is to prevent leakage to the outside of 3). As a result, it is possible to prevent radio waves from adversely affecting the electric devices of the own vehicle and other vehicles. In order to prevent the generation of such radio waves, aluminum is deposited on the inner surface of the reflector 233, and this aluminum is grounded. Furthermore, for similar reasons,
Although not shown, a cup-shaped shield portion is also provided in the reflector 233 on the vehicle front side of the lamp 2.

The vehicle full illuminating lamp 23 having such a configuration
1, the lamp 2 is replaced when the lamp 2 is replaced.
The electric wiring portion 239 of the lamp 2 may be sandwiched between the shield portions 237, and the electric wiring portion 239 of the lamp 2 may be grounded. As a result, an overcurrent flows through, for example, the H-bridge circuit 7a through the primary winding 29a and the secondary winding 29b, and a large amount of heat is generated in the H-bridge circuit 7a. .

To cope with such an abnormal state, the fail-safe control circuit 14 performs the following abnormal control. Hereinafter, the specific configuration of the fail-safe control circuit 14 and the content of the abnormality control will be described with reference to FIG. Note that the following abnormality control is performed when the lighting switch SW is set to ON. As shown in FIG. 16, the fail-safe control circuit 241 is roughly composed of five functional blocks 241a to 241e.

241a is a comparator 243 and resistor 2
45. The comparator 243 has the inverting input terminal receiving the ramp voltage VL from the sampling and holding circuit 12, and the non-inverting input terminal receiving the predetermined voltage Vr1. That is, 241a constitutes voltage determination means for determining whether or not the lamp voltage VL is in the first state lower than the predetermined voltage Vr1 (for example, 20 V).

241b comprises a comparator 247, a capacitor 248 and a resistor 249. Comparator 24
7 is the lamp current IL (voltage conversion V
IL) is input, and a predetermined voltage V is applied to the non-inverting input terminal.
r2 has been input. That is, 241b is the VI
By comparing L with the predetermined voltage Vr2, a current determining means for determining whether or not the lamp current IL is in the second state smaller than the predetermined current is configured.

Reference numeral 241c denotes the comparators 243, 2
When both outputs of 47 become high level signals, they are AND gates which output high level signals. That is, the fact that the output signal of the AND gate 241c becomes a high-level signal means that the above-described abnormal state has been detected. That is, the AND gate 241c is means for detecting an abnormal state in which the electric wiring section 239 is grounded. The AND voltage 241 (voltage signal) is lower than the predetermined voltage value and the lamp current (current signal) is lower than the predetermined current value. When it is lower, it is detected as abnormal.

Here, the reason why the above-described abnormality determination can be easily performed using the lamp voltage VL and the lamp current IL will be described. When the power of the lamp 2 is controlled as described above, the lamp voltage VL is in a predetermined range of, for example, 20V to 400V. At this time, when the electric wiring portion 239 is grounded, an overcurrent flows to the secondary side of the flyback transformer 29, and the lamp voltage VL becomes lower than the above 20V. Therefore, in this case, the electric wiring portion 239 may be grounded.

When the power of the lamp 2 is controlled as described above, the lamp current IL is within a predetermined range (0.35 to 2.6 A). When the electric wiring portion 239 is grounded, the overcurrent from the secondary winding 29b falls from the electric wiring portion 243 to ground without flowing through the H-bridge circuit 7a. As a result, the lamp current I
L is smaller than the above-mentioned predetermined range, and a predetermined current (for example,
0.2A) or less. Therefore, in this case, the electric wiring section 2
39 may be grounded.

As described above, in this embodiment, the abnormal state is detected based on the AND condition between the lamp voltage VL and the lamp current IL. In this example, an abnormal state is detected when both the first state and the second state are established. The reason for judging an abnormal state when both of these two states are satisfied is as follows.

For example, if some abnormality occurs and both ends of the lamp 2 are short-circuited, the lamp voltage VL becomes smaller than the predetermined voltage Vr1, but the lamp current IL becomes smaller.
Becomes larger than the predetermined current. If the lamp 2 is opened due to some abnormality, the lamp current I
L is smaller than the predetermined current, but the lamp voltage V
L becomes higher than the predetermined voltage Vr1.

Therefore, it is not possible to determine whether the electric wiring section 239 is grounded or the lamp 2 is short-circuited or open under only one condition. Therefore, in this example, in order to reliably detect the ground of the electric wiring unit 239, when both the first state and the second state are satisfied, it is determined that the state is abnormal. Thus, an abnormal state in which the electric wiring portion 239 is grounded can be reliably grasped, and an overcurrent can be prevented from flowing with high accuracy.

The time counting circuit 241d includes a D-type flip-flop 251, a NOR gate 253, an AND gate 255, and a JK-type flip-flop 257.
The time counting circuit 241d determines whether a time satisfying both the first state and the second state has passed a predetermined time T or more. The same clock signal CL is input to the clock terminals of the D flip-flop 251 and the JK flip-flop 257.

The reset circuit 241e is constituted by a D-type flip-flop. A constant voltage source 259 is input to a D input terminal of the D flip-flop preset circuit 241e. D-type flip preset circuit 2
The H-bridge control circuit 11 is connected to an output terminal of 41e. The constant voltage source 259 generates a constant voltage (for example, 5 V) when the lighting switch SW is turned on.

Next, the above-described circuit 241a to reset circuit 2
The operation up to 41e will be described with reference to the time chart of FIG. However, the output signal of the AND gate 241c is α, JK
The output signal of the flip-flop 257 is β, and the output signal of the D flip-flop 241e is γ. When the lighting switch SW is turned on, the D-type flip preset circuit 241e is reset by a reset signal from a reset circuit (not shown). In the present embodiment, the D-type flip preset circuit 241e
When the output signal γ is a high level signal, the H-bridge control circuit 11 turns off the H-bridge circuit 7a.

First, the lighting switch SW is turned on,
For example, at time t3, it is assumed that the electrical wiring unit 239 is grounded again, and the output signal α changes from a low level signal to a high level signal, and this state continues thereafter. When the state in which the output signal α is a high level signal lasts longer than one cycle time of the clock pulse CL, the AND gate 255
Via c and the NOR gate 253, the output signal β of the JK flip-flop 257 is inverted to a high level signal. Then, the output signal γ of the D-type flip-flop 241e becomes a high level signal. As a result, as shown in FIG. 4, low level signals are output from the two output terminals of the first abnormality circuit 242 to the IC elements 43a and 43b, and the H-bridge circuit 7a is turned off.

As a result, overcurrent caused by grounding of the electric wiring portion 239 is cut off by the MOS transistors 41a and 41c. As a result, the H-bridge circuit 7
a, and an overcurrent larger than a predetermined value can be prevented from flowing in the current path after the H-bridge circuit 7a, so that the fuse 50 can be prevented from being blown, and a large amount of heat generation in the discharge lamp device 100 can be prevented.

In addition, when the output signal γ becomes a high level signal, the control of the PWM control circuit 9 is stopped, that is, the conduction of the MOS transistor 31 is cut off. Specifically, in such an abnormal state, the NPN transistor 246 is turned on by outputting a high-level signal in the second abnormality circuit 244 as shown in FIG. Therefore, the NPN transistors 115 and 116 are turned off regardless of the output signal of the PWM control circuit 9. As a result, conduction of the MOS transistor 31 is cut off, and all power supply to the discharge lamp device 100 is stopped. The reason for this will be described below.

For example, it is assumed that there is a contact resistance between the electric wiring part 239 and the shield 237 when the electric wiring part 239 is grounded. Then, it is assumed that a problem occurs that energy (power) on the secondary side of the flyback transformer 29 is greatly consumed by the contact resistance. Then, the lamp power control circuit 9 sets the primary winding 29
PWM to increase the energy stored in a
Control is performed so that the duty ratio of the control circuit 9 increases. As a result, there is a problem that an excessive current flows through the primary winding 29a of the flyback transformer 29.

Therefore, considering such a case, PW
Since the control of the M control circuit 9 is stopped, that is, the conduction of the MOS transistor 31 is cut off, it is possible to prevent the primary current from becoming excessive. In addition to the above, various modes can be considered for the abnormal state. For example, when the breakdown voltage of the MOS transistor 31 is deteriorated, a lamp voltage (for example, 400 V) required to start lighting is generated. Can not be turned on. In this case, the MOS transistor 3
1 performs switching operation by receiving a drive signal having the maximum duty from the PWM control circuit 9, but MOS transistor 31 itself consumes most of the energy stored in the primary winding 29a due to deterioration of the withstand voltage. If the operation is continued as it is, abnormal heat is generated and the MOS transistor 31 is short-circuited and destroyed. As a result, a secondary failure such as a blow of the fuse 50 occurs.

In such an abnormal state, the result does not change even if the H-bridge circuit 7a is turned off. for that reason,
In the case of such an abnormal state, the control of the PWM control circuit 9 is stopped, and the MOS transistor 31 is kept in the off state, so that a secondary failure can be avoided. As described above, there are cases where it is effective to turn off the H-bridge circuit 7a based on the result of the abnormality determination in various abnormal states, and cases where it is effective to turn off the MOS transistor 31. Depending on the abnormal state, the H-bridge circuit 7a , Or the MOS transistor 31 is turned off. However, this is not a good solution, since the circuit becomes complicated and the scale becomes large. Therefore, when the abnormality is determined, the circuit can be simplified and the scale can be reduced by turning off the MOS transistor 31 at the same time as turning off the H-bridge circuit 7a.

At time t1, as shown in FIG. 17, it is assumed that the electric wiring portion 239 is grounded and the output signal α changes from a low level signal to a high level signal, and this state continues until time t2. In this case, the time counting circuit 24
Since the high-level period of the signal α, which is the input signal to 1d, is shorter than one cycle time of the clock pulse CL, the output signal β of the time counting circuit 241d does not change and maintains the previous state. Therefore, the signal γ does not change similarly. That is, H
The bridge control circuit 11 is not affected at all.

That is, the condition for turning off the H-bridge circuit 7a is that the time when the first state and the second state are both satisfied has passed a predetermined time T. The reason for this is as follows. For example, when the lighting switch SW is turned on, the first state and the second state are established for the first time, and then the ground of the electric wiring section 239 is restored in a short time, and the electric wiring section 239 becomes normal. Suppose. In this case, in order to ensure the visibility of the occupants at night, it is necessary to keep the lamp 2 on as much as possible.

Therefore, the H-bridge circuit 7a is not turned off immediately when a short-time abnormality occurs, and the H-bridge circuit 7a is turned off for the first time when the first state and the second state have passed a predetermined time T. Note that the predetermined time T is
Since the time is set within a range in which the fuse 50 is not blown, the blow of the fuse 50 can be prevented beforehand. The predetermined time T is set as follows. In this example, the abnormal state was detected with a relatively simple circuit configuration as shown in FIG.

However, the electric wiring portion 239 is
As shown in FIG. 2, wiring portions 239 at both ends of lamp 2
a, 239b, and these two wiring portions 239a, 239b
39b are rarely grounded together, for example, only one electrical wiring portion 239a in FIG. 1 is often grounded. Therefore, for example, when the polarity of the discharge voltage of the lamp 2 changes in the H-bridge circuit 7a while the abnormal state continues, the lamp voltage VL becomes the predetermined voltage Vr1.
Higher.

Accordingly, the first state is not reached even though an abnormal state has occurred, so that the AND gate 2
The output signal of 41c does not become a high-level signal and cannot detect an abnormal state. Therefore, in this example, the predetermined time T is shorter than the switching cycle time of the H-bridge circuit 7a, and is not more than half (0.8 m
s). Thus, the abnormal state can be reliably detected with a simple circuit configuration.

In order to detect the abnormal state, the lamp voltage VL and the lamp current IL, which are control signals for the lamp power control, are used. Thus, it is not necessary to separately provide a voltage detection circuit and a current detection circuit to determine abnormality. [Regarding Connector Disconnection Detection Circuit 15] Next, the connector disconnection detection circuit 15 will be described with reference to FIG.

The lamp 2 has a connector 235 composed of two connector portions 235a and 235b in the event of damage or failure.
It can be attached and detached. Therefore, when the connector portions 235a and 235b are fitted, the lamp 2 is electrically connected to the battery 1 and can be turned on. As shown in FIG. 18, the connector portion 235 includes two connector portions 235a and 235a.
An electric wiring portion 261 is formed such that when it comes off from the terminal 35b, the internal electric conduction is cut off. More specifically, one end of the electric wiring portion 261 is connected to the power terminal 1a. The other end of the electric wiring portion 261 is grounded.

The connection point 261a of the electric wiring portion 261 of each of the connectors 235a and 235b is a connector disconnection detection terminal for detecting disconnection of the connector 235. When the connector portions 235a and 235b are disconnected, the connector disconnection detection circuit 15 The transistor 263 of the off-state detection circuit 15a built in is turned on from off. Also,
The disconnection detecting circuit 15a is provided between the signal generating circuit 13a and the starting circuit 8, and when the disconnection of the connector 235 is detected, the signal from the signal generating circuit 13a is forcibly stopped to operate the starting circuit 8. Signal.

Next, the high voltage generation control circuit 13 will be described. The high voltage generation control circuit 13 includes the thyristor 57
And a signal generation circuit 13a for generating a signal in synchronization with the ON / OFF timing of the H-bridge circuit 7a as described above. For example, even if the starting circuit 8 is started, if the lamp 2 is not lit and is turned off, the signal generating circuit 13a uses the thyristor 57 in the signal generating circuit 13a until the lamp 2 is turned on.
Are repeatedly turned on and off, and a high voltage is applied to the lamp 2.

When a high-level signal is generated in the signal generation circuit 13a, the transistor 265 turns on. Thus, the transistor 267 is turned off, and the transistors 269 and 275 are turned on. Further, the transistors 271 and 273 are turned off. As a result, the gate drive signal of the thyristor 57 becomes a low level signal, and the thyristor 57 is turned off.

On the other hand, when a low level signal is generated in the signal generation circuit 13a, the transistor 265 is turned off. Thus, the transistor 267 is turned on, and the transistors 269 and 275 are turned off. Also,
The transistors 271 and 273 are turned on. As a result,
The gate drive signal of the thyristor 57 becomes a high level signal, and the thyristor 57 is turned on.

When the signal generated by the signal generation circuit 13a is a high level signal, the gate drive signal becomes a low level signal and the thyristor 57 is turned off. On the other hand, if the signal generated by the signal generation circuit 13a is a low level signal, the gate drive signal becomes a high level signal, and the thyristor 57 is turned on. And in this example,
By the ON signal of the transistor 263, the gate drive signal of the thyristor 57 can be forced to a low level signal. That is, the disconnection detection circuit 15a detects that the connector 235 is disconnected, and the transistor 263
Is turned on, the transistor 267 is turned off even if a low level signal for turning on the thyristor 57 is generated in the signal generation circuit 13a.

Therefore, the transistors 269 and 275 are turned on, the transistors 271 and 273 are turned off, and the thyristor 57 is turned off. As a result, for example, when the connector 235 is disconnected and the lamp 2 is turned off, high voltage generation by the thyristor 57 is prevented beforehand. by the way,
When it is detected that the connector 235 has come off,
For example, if the electrical wiring unit 261 has a poor contact, the lighting function of the lamp 2 is normal. In such a case, it is not necessary to stop the control of the PWM control circuit 9 to turn off the lamp 2, and it is preferable to keep the lamp 2 turned on.

Accordingly, in parallel with the detection of the disconnection of the connector 235, the fail safe circuit 14 detects an abnormal state in which the lamp 2 is turned off even though the lighting switch SW is set to ON. That is, when the connector disconnection detection circuit 15 detects that the connector 235 is disconnected, there is no contact failure of the electric wiring portion 261,
It is determined whether or not the connector 235 has really been disconnected and the lamp 2 has been turned off.

FIG. 19 is a logic circuit diagram showing the fail-safe circuit 14. The fail-safe circuit 14 includes a comparator 277 serving as lighting detection means, a delay circuit (timer circuit) 279, an OR gate 281, and a D-type flip-flop 241e. Comparator 27
The non-inverting input terminal 7 receives a predetermined voltage VR. On the other hand, the terminal E is connected to the inverting input terminal of the comparator 277 (see FIG. 1). That is, the comparator 277 outputs a low-level signal when the lamp 2 is turned on and the lamp current is flowing, and outputs a high-level signal when the lamp current is equal to or less than the predetermined value, assuming that the lamp 2 is turned off. .

The delay circuit 279 outputs a high level signal when the output signal of the comparator 277 is a high level signal and this high level signal continues for a predetermined time Tm. That is, the delay circuit 279 outputs a high-level signal when the time during which the lamp 2 is turned off elapses the predetermined time Tm. When the output signal of the delay circuit 279 becomes a high level signal, the OR gate 281 outputs a high level signal. When the output signal of the OR gate 281 becomes a high-level signal, the D-type flip-flop 241e outputs a high-level signal using the high-level signal as a clock pulse. When the output signal of the D-type flip-flop 241e becomes a high-level signal, the above-mentioned P serving as power control means for supplying power from the battery 1 to the lamp 2 is formed.
Stop control of WM control circuit 9 (MOS transistor 31
Is turned off), and the H-bridge circuit 7a is turned off by the first abnormality circuit 242.

By doing so, the lamp 2 is turned off from a state in which the lamp 2 is turned on, and after a predetermined time Tm elapses, the control of the PWM control circuit 9 is stopped to supply power to the lamp 2. Will be stopped. Until the predetermined time Tm elapses after the lamp 2 is turned off, the PWM
The control of the control circuit 9 is continued to supply power to the lamp 2.

It should be noted that, as shown in FIG.
The input terminal 1 is provided with an input terminal for responding to the abnormal wiring state in which the electric wiring section 261 is grounded, and an input terminal for responding to another abnormal state. That is, the OR gate 281 is connected to the J shown in FIG.
It is provided between the K-type flip-flop 257 and the D-type flip-flop 241e.

Next, the operation of the off detection circuit 15a, the high voltage generation control circuit 13, and the fail safe circuit 14 will be described with reference to the time chart of FIG. However, the signal detected by the disconnection detection circuit 15a is g, and the connector 235
Signal is a high level signal when the thyristor 57 is disconnected, and a low level signal when the connector is not disconnected.
When the lighting switch SW is on, the gate drive signal of f is f and the signal of the lighting switch SW is a.
When it is off, it is a low level signal.

The output signal of the signal generation circuit 13a is set to d.
The control signal of the PWM control circuit 9 is c, the high-level signal when the PWM control circuit 9 is performing control, the low-level signal when control is stopped, the output signal of the comparator 277 is k, When the lamp 2 is off, the signal is a high level signal, and when the lamp 2 is on, the signal is a low level signal. Further, the C input signal of the D-type flip-flop 241e is set to n.

First, when the lighting switch SW is turned on at time t1, the lamp voltage VL gradually increases. For example, at time t2, the gate drive signal f of the thyristor 57 is increased.
Becomes a high level signal. Thereby, the lamp 2 is turned on and the lamp current IL starts to flow. Thereafter, it is assumed that the lamp 2 enters the stable control state (35 W), the signal g becomes a high-level signal at time t3, and it is detected that the connector 235 has been disconnected (in FIG. 20). If the value is smaller than the value and becomes, for example, 0, and the lamp 2 is turned off, that is, if the connector 235 is actually detached without a contact failure of the electric wiring unit 261, the signal k becomes a high-level signal. However, at this time, the signal n remains a low level signal by the delay circuit 279, and the control of the PWM control circuit 9 is also continued.

As a result, when the lamp 2 is turned off, as shown in FIG. 20, at time t4, the signal generation circuit 1
The signal d of 3a switches from a high-level signal to a low-level signal so that the thyristor 57 is turned on from off and the lamp 2 is turned on again. However, in the present example, when disconnection of the connector is detected irrespective of the lighting of the lamp 2, the signal g becomes a high level signal, and the signal f becomes a low level signal. Therefore, when the disconnection of the connector 235 is detected, the capacitor 53 by the starting circuit 8 is used.
Is stopped, and generation of a high voltage in the connector 235 can be prevented.

At time t5, if the continuation time during which the lamp 2 is turned off has passed a predetermined time Tm, the signal n becomes a high level signal, the control of the PWM control circuit 9 is stopped, and the H bridge The circuit 7a is turned off. That is, when the connector 235 is disconnected and the lamp 2 is turned off, the thyristor 57 is turned off, and after a lapse of a predetermined time Tm, the control of the PWM control circuit 9 is stopped and the power supply to the lamp 2 is stopped.

As a result, the electric wiring portion 2 of the lamp 2
When the contact failure occurs for a short time, the lamp 2
The power supply to the lamp 2 can be maintained and the lighting of the lamp 2 can be maintained, and when the lamp 2 is continuously turned off for a predetermined time Tm, the power supply to the lamp 2 can be stopped immediately. Next, from the above state, that is, the state in which the grip connector 235 is actually disconnected, the lighting switch S is temporarily turned on at time t6.
It is assumed that W is turned off and turned on again at time t7.
(FIG. 20) Then, the lamp voltage VL gradually increases, and at time t8, the signal d of the signal generating circuit 13a is changed to the thyristor 5
7 is switched from off to on, and the high level signal is switched to the low level signal so that the lamp 2 is turned on. However, as described above, when disconnection of the connector is detected irrespective of the lighting of the lamp 2, the signal f becomes a low level signal because the signal g becomes a high level signal. Therefore, when the connector 235 comes off, the starting circuit 8 causes the connector 2 to disconnect.
The generation of high voltage at 35 can be prevented.

Thereafter, at time t9, when the continuation time for detecting that the connector 235 has been disconnected has passed for a predetermined time Tm, the signal n becomes a high level signal, and the control of the PWM control circuit 9 is stopped, and the H bridge The circuit 7a is turned off. Next, in the above state, the grip connector 235
Is turned off once at time t10, the connector 235 is re-inserted, and then turned on again at time t11. Then, at time t12, the signal g becomes a low level signal as described above, so that the signal f becomes a high level signal, and the starting circuit 8 turns on the lamp 2. Thereafter, it is assumed that, for example, at time t13, the electrical wiring unit 261 has a contact failure. In this case, since the lamp 2 is turned on and the lamp current is larger than a predetermined value, the signal k is a low level signal.

Therefore, if the lamp 2 is turned on when the electric wiring section 261 has a contact failure, the power supply to the lamp 2 is maintained. As a result, the electric wiring unit 261
Even if the contact failure occurs, if there is no abnormality in the lighting function of the lamp 2, the lighting of the lamp 2 can be maintained. [Reverse connection protection circuit 3] Next, the reverse connection protection circuit 3 will be described with reference to FIG. Note that FIG. 21 is obtained by adding an electric load 125 such as an alternator which is an electric device for a vehicle to FIG.

The reverse connection protection circuit 3 is provided between the battery 1 and the lamp 2. The gate (G) of the MOS transistor 21 is grounded to the positive electrode side (power supply terminal 1a) of the battery via the resistor 17. The source (S) and the drain (D) of the MOS transistor 21 are connected to the ground terminal 1b so that the current flowing through the discharge lamp device 100 flows from the source to the drain.

When the lighting switch SW is turned on, a gate voltage is applied from the battery 1 to the gate (G), and the
The S transistor 21 is turned on, and the power of the battery 1 is supplied to the discharge lamp device 100. Thus, the discharge lamp device 100 operates. A capacitor 19 serving as a conduction means is connected in parallel between the gate and the source of the MOS transistor 21. The resistor 17 is connected to the power terminal 1a.
And the gate of the MOS transistor 21 are connected in series with the parallel connection of the MOS transistor 21 and the capacitor 19.

When the lighting switch SW is turned on, the capacitor 19 is charged via the resistor 17.
The charging current path of the capacitor 19 is from the positive electrode side of the battery 1 to the resistor 17, the capacitor 19, and the MOS transistor 2
The current flows to the negative electrode side of the battery 1 through a parasitic diode between the source and the drain of the battery 1. When the charging voltage of the capacitor 19 reaches a predetermined value, the MOS transistor 21
Turns on. Until the MOS transistor 21 is turned on, the current flowing through the discharge lamp device 100 flows through the parasitic diode between the source and the drain of the MOS transistor 21.

The MOS transistor 21 has a protection function for protecting the discharge lamp device 100 from applying a reverse voltage in the following cases. For example, when the battery 1 is replaced, the polarity of the battery 1 is erroneously attached in reverse, and in this state, the lighting switch SW is operated by an occupant.
Is turned on. In this case, the reverse voltage applied to the discharge lamp device 100 is the battery voltage VB (first reverse voltage).
It is.

When the battery 1 is attached to the discharge lamp device 100 with the polarity reversed, the MOS
The reverse voltage application to the discharge lamp device 100 is interrupted by the withstand voltage between the drain and the source of the transistor 21, and the discharge lamp device 10
Protect 0. As a result, an overcurrent does not flow through the fuse 50 through the Zener diode as in the related art, and it is possible to prevent the fuse 50 from being blown.

The alternator 71 is connected to the battery 1 in parallel with the discharge lamp device 100. The alternator 71 is an inductive load (vehicle electric device) having a reactance component such as a field coil (not shown), and starts power generation when an ignition switch IG that is a means for starting a driving source of the vehicle is turned on. I do. When the ignition switch IG is turned off from the state where the ignition switch IG is on and the lighting switch SW is on, the current flowing through the alternator 71 is cut off, so that a large negative pulse is applied to the power supply terminal 1a. Voltage is generated. Therefore, a higher reverse voltage is applied to the discharge lamp device 100 than when the battery 1 is connected in reverse.

However, at this time, the electric charge charged in the capacitor 19 is discharged with a time constant determined by the capacitor 19 and the resistor 17. Thereby, the MOS transistor 2
Since a gate voltage is applied to one gate for a predetermined time, the MOS transistor 21 is kept conductive for a predetermined time. When a large pulse voltage is momentarily generated between the power supply terminal 1a and the ground terminal 1b, a parasitic diode between the source and the drain of the MOS transistor 31 and the flyback transformer 29 By supplying a pulse current through a current path such as the primary winding 29a and the coil 27, the energy of the negative pulse is consumed.

As described above, the power supply terminal 1a and the ground terminal 1
When a large reverse voltage is generated between the MOS transistor 21 and the capacitor b, the MOS transistor 21 is forcibly maintained in the conductive state by the capacitor 19, so that the withstand voltage of the MOS transistor 21 need not be considered at all. In other words, the withstand voltage may be such that a reverse voltage is not applied to the discharge lamp device 100 when the battery 1 is connected in reverse (for example, a little over 12 V).

Therefore, the withstand voltage of the MOS transistor 21 can be made very small.
The driving resistance of the transistor 21 can be reduced, and the power loss in the MOS transistor 21 can be reduced. In turn,
The chip size of the MOS transistor 21 can be reduced, and an inexpensive MOS transistor 21 can be used.

As described above, the MOS transistor 21 is forcibly turned on by the capacitor 19, but the capacitor 17 and the resistor 17 form a time constant circuit. Time is extended. As a result, since the conduction time of the MOS transistor 21 can be lengthened, the MOS transistor 2
1 can be prevented from being destroyed. According to the study of the present inventor, if the time constant of the time constant circuit is set to 0.01 second or more, it is ensured that the MOS constant while the pulse voltage is generated.
The transistor 21 can be turned on, and the discharge lamp device 100 can be reliably protected.

[Regarding Overvoltage Protection Circuit 16] FIG.
2 shows a circuit configuration diagram of the overvoltage protection circuit 16 shown in FIG. Hereinafter, the overvoltage protection circuit 16 will be described with reference to FIG. The overvoltage protection circuit 16 protects each of the control circuits 9 to 15 provided in the integrated circuit 73 from overvoltage. The overvoltage protection circuit 16 includes an overvoltage detection circuit 77 that performs overvoltage detection when the primary voltage reaches a predetermined threshold voltage, and separates the primary voltage when the primary voltage reaches the threshold voltage. And a voltage dividing circuit 79 for applying pressure. The primary voltage applied through the overvoltage protection circuit 16 is converted into a constant voltage by the constant voltage circuit 75, and is used as a drive voltage for each of the control circuits 9 to 15.

The overvoltage detecting circuit 77 includes a resistor 81 having a relatively large resistance value, a zener diode 83 and a resistor 85. The threshold voltage is set by the Zener die voltage of the Zener diode 83. Further, the resistor 81 is provided in series with the Zener diode 83 for limiting the current I, so that the withstand voltage of the Zener diode 83 can be reduced. Note that the resistor 85 is a reverse bias resistor for preventing leakage.

The voltage dividing circuit 79 includes resistors 87 and 89 and Darlington-connected NPN transistors 91 and 9.
3. Next, the operation of the overvoltage protection circuit 16 configured as described above will be described. When the primary side voltage is lower than the predetermined threshold voltage, the Zener diode 83 does not flow a current, so that the Darlington-connected N
The PN transistors 91 and 93 do not turn on. For this reason,
Voltage VI applied to constant voltage circuit 75 in integrated circuit 73
C is a voltage obtained by subtracting the voltage drop at the resistor 87 from the primary voltage.

When the primary voltage rises above a predetermined voltage, the Zener diode 83 causes a current to flow due to Zener breakdown, and the NPN transistors 91 and 93 are turned on. For this reason, the voltage VIC applied to the constant voltage circuit 75 in the integrated circuit 73 is such that the primary voltage is the resistance 87 and the resistance 8
At 9 the voltage is divided. At this time, it is necessary to set the resistance values of the resistors 87 and 89 so that the divided voltage is equal to or less than the withstand voltage of each of the control circuits 9 to 15.

The constant voltage circuit 75 is provided in the integrated circuit 73.
And the control circuits 9 to 15 are formed, but the components of the overvoltage protection circuit 16 such as the Zener diode 83, the resistor 85, and the NPN transistors 91 and 93 may also be formed in the integrated circuit 73. . In this case, these components may be formed together with other parts of the integrated circuit, so that cost can be further reduced.

As described above, since the overvoltage is divided by the voltage dividing circuit 79, it is possible to prevent the overvoltage from being applied to the integrated circuit 73. Thus, the integrated circuit 7 can be used without using a power Zener diode having a relatively high withstand voltage.
Each of the control circuits 9 to 15 in 3 can be protected from overvoltage, and the cost can be reduced. Also, since almost no current flows through the resistor 81 in the overvoltage detection circuit 77 except when an overvoltage occurs, it is possible to prevent power consumption of the resistor 81 when no overvoltage occurs. it can.

[Inspection of Discharge Lamp Apparatus] Next, regarding the inspection before the discharge lamp apparatus 100 is mounted on the vehicle, the circuit configuration in the connector 15 shown in FIG. 23 and the circuit configuration of the clock circuit 285 shown in FIG. Description will be made based on the drawings. In order to artificially shorten the frequency of the signal generated by the clock circuit 285 at the time of inspection, as shown in FIGS. 23 and 24, clock switching detection circuits 286 and 287 are provided in the discharge lamp device. The clock switching detection circuits 286 and 287 will be described.

Clock switching detection circuits 286 and 287
Includes a time-of-test detection circuit 286 that detects a time of a test and outputs a clock switching detection signal, and a time shortening circuit 287 that artificially speeds up the time counted by the clock circuit 285 based on the clock switching detection signal. It has. The battery voltage VB applied to the connector disconnection detection terminal 261 is similarly applied to the inspection time detection circuit 286. As described above, since the disconnection of the connector is detected by the battery voltage VB, a voltage higher than the battery voltage VB is not applied to the connector disconnection detection terminal 261a. Utilizing this, when only a voltage lower than the battery voltage VB + α is applied to the connector disconnection detection terminal 261a, the inspection detection circuit 286 outputs a high-level signal indicating that it is not the time of detection, and outputs the battery to the connector disconnection detection terminal 261a. When a voltage equal to or higher than the voltage VB + α is applied, the inspection time detection circuit 286 outputs a low level signal serving as a clock switching detection signal. Thus, the connector disconnection detection terminal 261a is commonly used as a terminal for inspection and a terminal for connector disconnection detection.

The time shortening circuit 287 is built in the clock circuit 285 as shown in FIG. Clock circuit 2
Numeral 85 includes a plurality of D-type flip-flops 289a to 289j arranged continuously, and time is counted by these D-type flip-flops 289a to 289j. That is, when a clock signal CL output from a converter (not shown) is input to the D-type flip-flop 289a, the D-type flip-flop 289a outputs a signal having a cycle twice as long as this clock signal, and In step 289b, the signal is output as a signal having a double cycle. Each D-type flip-flop 289a to 289
By repeating this operation at j, the cycle of the clock signal is doubled. Each control circuit selects a suitable signal from the signals output from each of the D-type flip-flops 401a to 401j, and uses the selected signal for a time when each control is performed.
For example, in the lamp power control circuit 10, the control time is set based on the frequency of the output signal of the D flip-flop 289i.

A time shortening circuit 287 is arranged between the plurality of D-type flip-flops arranged as described above.
Hereinafter, the operation of the clock circuit 285 and the clock switching detection circuits 287a and 287 will be described separately when the lamp 2 is actually used and when the lamp 2 is inspected. When the lamp 2 is actually used At this time, since the lamp 2 is connected to the connector 35, the clock switching detection circuits 287a and 287 are grounded. In this case, since a voltage higher than the battery voltage VB + α is not applied to the connector disconnection detection connection terminal 261a, the inspection time detection circuit 286 outputs a high level signal.

At this time, the D-type flip-flop 289
The output signal of the D-type flip-flop 289f is input to the clock C of g. That is, the time shortening circuit 287
By the processing in, the clock signal output from the converter is ignored, and the output signal of the D-type flip-flop 289f is input to the clock C as the clock signal of the D-type flip-flop 289g. Therefore, except at the time of inspection, the cycle of the clock signal CL from the converter is doubled via the D-type flip-flops 289a to 289f, and the signal of the doubled cycle becomes the clock signal of the D-type flip-flop 289g. Therefore, the lamp power control circuit 1
0 performs lamp power control in a normal time.

Note that even when the lamp 2 is disconnected from the connector 35, the clock switching detection circuits 287a, 287
7, only the battery voltage VB is applied.
The inspection time detection circuit 286 outputs a high level signal, and outputs the clock circuit 285 and the clock switching detection circuit 287a.
287 performs the same operation as described above. At the time of inspection At this time, the connector disconnection detection terminal 261a is shared as a terminal for inspection and a terminal for connector disconnection detection. And
A voltage similar to the battery voltage is applied to the battery connection using a predetermined power supply. As a result, the battery voltage VB is applied to the connector disconnection detection terminal 261a. At this stage, the inspection time detection circuit 286 outputs a high level signal.

Then, a voltage higher than the battery voltage VB + α is applied to the connector disconnection detection terminal 261a. As a result, the inspection time detection circuit 286 outputs a low level signal as a clock switching detection signal. At this time, a clock signal from the converter is directly input to the clock C of the D-type flip-flop 289g. That is, by the processing in the time shortening circuit 287, the signal output from the D-type flip-flop 289f is ignored, and the clock signal from the converter is input as the clock of the D-type flip-flop 289g. Therefore, at the time of inspection, the clock signal from the converter is directly passed through the D-type flip-flop 289g without passing through the D-type flip-flops 289a to 289f.
Clock signal. For this reason, the D-type flip-flop 289g converts the clock signal from the converter into a signal having a double cycle and outputs it.

Therefore, the period of the output signal in the D-type flip-flops 289g to 289j after the time shortening circuit 287, that is, the time referenced by each of the control circuits 9 to 15 is shortened in a pseudo manner, and the control circuits 9 to 15 The lamp power control is performed based on the shortened time. Therefore, the lamp power control time is shortened. As described above, when the voltage VB equal to or higher than the voltage used for detecting the connector disconnection is applied to the connector disconnection detection terminal 261a, the inspection time detection circuit 286 detects that the inspection is being performed. Each of the control circuits 9 to 15 performs each control based on the time shortened by the circuit 287.

As a result, the control time performed by each of the control circuits 9 to 15 can be reduced, and the inspection time can be reduced. Also, the clock switching signal is transmitted to the time shortening circuit 2.
87 is a connector disconnection detection terminal 26.
Since it is performed in 1a, it is not necessary to form a terminal only for inputting a clock switching signal. Since the connector disconnection detection terminal 261a is covered by the lamp when the lamp 2 is connected, no special treatment for preventing rust is required.

In the present embodiment, when the battery voltage VB decreases, the switching frequency of the MOS transistor 31 decreases linearly. However, the switching frequency may be changed stepwise.

[Brief description of the drawings]

FIG. 1 is an overall configuration diagram of a discharge lamp device 100 according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a control system of the discharge lamp device 100 shown in FIG.

FIG. 3 is a time chart showing a waveform at each point of a starting circuit in the embodiment.

FIG. 4 is a configuration diagram of a bridge drive circuit in the embodiment.

FIG. 5 shows a MOS transistor 31 in the embodiment.
FIG. 3 is a configuration diagram of a drive circuit of FIG.

FIG. 6 is a configuration diagram of a lamp power control circuit in the embodiment.

FIG. 7 is a time chart showing a waveform of a voltage V1 in FIG. 6;

FIG. 8 shows a sample hold circuit 1 according to the embodiment.
FIG.

FIG. 9 is an explanatory diagram showing a waveform of a lamp voltage VL in FIG. 8;

FIG. 10 is a configuration diagram of a sawtooth wave forming circuit in the PWM control circuit 9 in the embodiment.

11 is a diagram illustrating a sawtooth wave formed by the sawtooth wave forming circuit in FIG. 10;

12 is a diagram showing a waveform of a primary current appearing in response to the sawtooth wave in FIG.

13 is a diagram showing a waveform of a primary current appearing in response to the sawtooth wave in FIG.

FIG. 14 is a configuration diagram of a threshold level setting circuit 165 in the embodiment.

FIG. 15 is a mounting structure diagram of the lamp 2 in the embodiment.

FIG. 16 is a circuit configuration diagram for detecting an abnormal state of the discharge lamp device in the embodiment.

FIG. 17 is a time chart showing abnormality detection in the circuit shown in FIG. 16;

FIG. 18 is a circuit configuration diagram for detecting disconnection of a connector in the embodiment.

FIG. 19 is a circuit configuration diagram for detecting an abnormal state in which a connector is disconnected in the embodiment.

FIG. 20 is a time chart showing detection of connector disconnection in FIGS. 18 and 19;

FIG. 21 is a configuration diagram of a reverse connection protection circuit in the embodiment.

FIG. 22 is a configuration diagram of an overvoltage protection circuit in the embodiment.

FIG. 23 is a detailed view of a main part of a connector disconnection detection circuit in the embodiment.

FIG. 24 is an explanatory diagram of a clock circuit used when inspecting the discharge lamp device in the embodiment.

FIG. 25 is a diagram showing a waveform of a primary current of a conventional discharge lamp device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Battery, 2 ... Lamp, 5 ... DC power supply circuit, 7 ... Inverter circuit, 7a ... H bridge circuit, 9 ... PWM control circuit, 10 ... Lamp power control circuit, 29 ... Flyback transformer, 29a ... Primary winding, 29b: secondary winding, 3
1 ... MOS transistors, 41a to 41d ... MOS transistors.

Claims (4)

[Claims] 1. An energy is stored in a winding (29a) when a primary current flows through a winding (29a) disposed on a primary side, and the energy is supplied to a secondary side when the primary current is cut off. A transformer (29); switching means (31) for controlling the primary current; and a duty control means (9) for duty-controlling the switching means (31) at a predetermined switching frequency. The duty control means (9) is configured such that a predetermined power is supplied from a DC power supply (1) disposed on a primary side of the discharge lamp (2) disposed on a secondary side of the transformer (29). The duty control means (9) is configured to set a duty ratio according to a voltage of the DC power supply (1) when the voltage of the DC power supply (1) decreases. Discharge lamp device which is characterized in that is adapted to set lower the switching frequency. 2. The duty control means (9) according to claim 1, wherein the switching frequency is set lower as the voltage of the DC power supply (1) decreases. Discharge lamp device. 3. The duty control means (9) sets the switching frequency stepwise lower when the voltage of the DC power supply (1) drops. The discharge lamp device according to item 1. 4. The duty control means (9) sets the duty ratio by comparing a threshold level set according to a state of the discharge lamp (2) with a predetermined sawtooth wave. The switching frequency is set to be low by lowering the frequency of the sawtooth wave with a decrease in the DC power supply (1). The discharge lamp device according to one.