JPH10312182A - Video signal discriminating circuit for picture display device - Google Patents

Video signal discriminating circuit for picture display device

Info

Publication number
JPH10312182A
JPH10312182A JP9123935A JP12393597A JPH10312182A JP H10312182 A JPH10312182 A JP H10312182A JP 9123935 A JP9123935 A JP 9123935A JP 12393597 A JP12393597 A JP 12393597A JP H10312182 A JPH10312182 A JP H10312182A
Authority
JP
Japan
Prior art keywords
video signal
input video
horizontal
vertical
frequencies
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9123935A
Other languages
Japanese (ja)
Inventor
Kaichi Nonomura
香一 野々村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Aviation Electronics Industry Ltd
Original Assignee
Japan Aviation Electronics Industry Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Aviation Electronics Industry Ltd filed Critical Japan Aviation Electronics Industry Ltd
Priority to JP9123935A priority Critical patent/JPH10312182A/en
Publication of JPH10312182A publication Critical patent/JPH10312182A/en
Pending legal-status Critical Current

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  • Synchronizing For Television (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

PROBLEM TO BE SOLVED: To enhance a discriminant likelihood by counting fundamental clocks being in one horizontal period of an input video signal, counting horizontal synchrinizing pulses being in one vertical period of the input video signal and discriminating the kind of the input video signal by these measured values. SOLUTION: A reference oscillator 11 generates fundamental clock pulses having a frequency Fr sufficiently larger than the maximum value of horizontal frequencies of plural input video signals made to be objects. A first counter 12 counts the fundamental clock pulses between a horizontal synchronizing pulse and a next horizontal synchronizing pulse of the input video signal. A second counter 13 counts horizontal synchronizing pulses of the signal between a vertical synchronizing pulse and a next vertical synchronizing pulse of the signal. A control part 7 discriminates the kind of the input video signal by these measured values to perform necessary controls with respect to a processing circuit 2. Thus, horizontal and vertical frequencies or periods of the input video signal are measured with an accuracy higher than that of the conventional practice and, as a result, the kind of the input video signal is securely discriminated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、画像表示装置の
映像信号判別回路に関し、特に判別の確度を向上する技
術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal discriminating circuit for an image display device, and more particularly to a technique for improving the accuracy of discrimination.

【0002】[0002]

【従来の技術】パーソナルコンピュータ等の映像信号は
図3に示すように、1画面のドット構成によって水平周
波数Fh及び垂直周波数Fvが異なる。更に、同じドッ
ト構成であってもメーカ等の違いにより、それらの同期
周波数に多少の差が存在する。しかしながら、パーソナ
ルコンピュータ等に使用される、例えばカラー液晶素子
(LCD)を用いた画像表示装置では、1画面の縦×横
のドット構成及び標準とする水平周波数及び垂直周波数
は決まっているので、図4の映像信号判別回路1により
入力映像信号の水平、垂直同期信号の周波数から映像信
号の種類を判別して、画像表示装置の標準の同期信号
(周波数)に変換する処理を処理回路2が映像信号判別
回路1の制御のもとに行っている。
2. Description of the Related Art As shown in FIG. 3, a video signal from a personal computer or the like has a horizontal frequency Fh and a vertical frequency Fv which differ depending on the dot configuration of one screen. Further, even with the same dot configuration, there is a slight difference in their synchronization frequencies due to differences between manufacturers and the like. However, in an image display apparatus using, for example, a color liquid crystal element (LCD) used in a personal computer or the like, since the vertical and horizontal dot configuration of one screen and the standard horizontal and vertical frequencies are determined, The video signal discriminating circuit 1 discriminates the type of the video signal from the horizontal and vertical synchronizing signal frequencies of the input video signal and converts the type into a standard synchronizing signal (frequency) of the image display device. It is performed under the control of the signal discriminating circuit 1.

【0003】従来の映像信号判別回路1では、入力映像
信号の水平、垂直同期信号をF/V変換器5に入力し
て、それぞれの周波数Fh,Fvに対応する電圧Vh,
Vvを取り出し、それらの電圧をA/D変換器6に入力
してディジタルデータDh,Dvに変換して制御部(C
PU)7に入力する。CPU7はデータDh,DvをR
AM8に予め書き込まれている対象とする複数種類の映
像信号の水平、垂直周波数と比較して、入力映像信号の
種類を判別し、処理回路2の同期信号の変換処理を制御
している。なお、CPU7はROM9に格納されている
システムプログラムを解読、実行して、その判別及び制
御動作を行っている。
In a conventional video signal discriminating circuit 1, horizontal and vertical synchronizing signals of an input video signal are input to an F / V converter 5, and voltages Vh and Fv corresponding to respective frequencies Fh and Fv are output.
Vv is taken out, these voltages are input to the A / D converter 6 and converted into digital data Dh and Dv, and the control unit (C
PU) 7. The CPU 7 converts the data Dh and Dv into R
The type of the input video signal is determined by comparing the horizontal and vertical frequencies of a plurality of types of video signals to be written in the AM 8 in advance, and the conversion processing of the synchronization signal of the processing circuit 2 is controlled. The CPU 7 decodes and executes the system program stored in the ROM 9 to perform the determination and the control operation.

【0004】[0004]

【発明が解決しようとする課題】 従来の映像信号判別回路1では、水平、垂直同期信
号をF/V変換した後、その電圧値をA/D変換し、そ
して得られたディジタル値より水平周波数及び垂直周波
数を求めて入力映像信号の種類を判別しており、使用で
きる通常価格のF/V変換器5及びA/D変換器6の精
度に限界があり、測定した水平周波数Fh及び垂直周波
数Fvの精度が十分得られないので、入力映像信号の種
類を判別する確度が低い問題があった。
In the conventional video signal discriminating circuit 1, after horizontal / vertical synchronizing signals are subjected to F / V conversion, their voltage values are A / D converted, and the horizontal frequency is calculated from the obtained digital values. And the vertical frequency are determined to determine the type of the input video signal. There is a limit to the accuracy of the F / V converter 5 and the A / D converter 6 which can be used at normal prices, and the measured horizontal frequency Fh and vertical frequency Since the accuracy of Fv cannot be sufficiently obtained, there is a problem that the accuracy of determining the type of the input video signal is low.

【0005】 判別回路の途中にアナログ電圧を介在
させているので、電源変動やノイズの影響により水平周
波数及び垂直周波数の測定値が変動し、判別確度を低下
させる問題があった。 この発明の目的は、これら従来の問題を解決して判別確
度を向上させようとするものである。
Since the analog voltage is interposed in the middle of the discriminating circuit, the measured values of the horizontal frequency and the vertical frequency fluctuate due to the influence of power supply fluctuation and noise, and there is a problem that the discrimination accuracy is reduced. SUMMARY OF THE INVENTION An object of the present invention is to solve these conventional problems and improve the discrimination accuracy.

【0006】[0006]

【課題を解決するための手段】[Means for Solving the Problems]

(1)請求項1の発明は、水平周波数または垂直周波数
の異なる複数種類の映像信号の中より、任意の1種類の
映像信号が画像表示装置に入力され、その入力映像信号
の種類を判別する画像表示装置の映像信号判別回路に関
する。請求項1では特に、複数種類の映像信号の水平周
波数の最大値より十分大きい周波数の基本クロックパル
スを発生する基準発振器と、入力映像信号の1H(1水
平期間)の前記基本クロックパルスを計数する第1カウ
ンタと、入力映像信号の1垂直期間の水平同期パルスを
計数する第2カウンタと、第1,第2カウンタの計測値
より入力映像信号の種類を判別する制御部が設けられ
る。
(1) According to the first aspect of the invention, an arbitrary one type of video signal is input to an image display device from a plurality of types of video signals having different horizontal frequencies or vertical frequencies, and the type of the input video signal is determined. The present invention relates to a video signal determination circuit of an image display device. In particular, a reference oscillator for generating a basic clock pulse having a frequency sufficiently higher than the maximum value of the horizontal frequency of a plurality of types of video signals, and counting the basic clock pulses of 1H (one horizontal period) of the input video signal. A first counter, a second counter that counts horizontal synchronization pulses in one vertical period of the input video signal, and a control unit that determines the type of the input video signal from the measured values of the first and second counters are provided.

【0007】(2)請求項2の発明では、前記(1)に
おいて、基準発振器は制御部により制御されて、入力映
像信号の種類を判別するに必要な所定の期間のみ発振動
作を行う。
(2) In the second aspect of the present invention, in the above (1), the reference oscillator is controlled by the control unit, and performs the oscillation operation only for a predetermined period necessary for determining the type of the input video signal.

【0008】[0008]

【発明の実施の形態】この発明の実施例を図1に、図4
と対応する部分に同じ符号を付けて示し、重複説明を省
略する。この発明では、水平、垂直周波数を一度アナロ
グ電圧に変換し、そのアナログ電圧を再びディジタル値
に変換すると言った従来の方式を用いず、水平期間(T
h=1/Fh)及び垂直期間(Tv=1/Fv)をカウ
ンタで計測する方式を用いている。
FIG. 1 shows an embodiment of the present invention, and FIG.
The same reference numerals are given to the portions corresponding to and the description will be omitted. According to the present invention, the horizontal and vertical frequencies are converted into analog voltages once, and the analog voltages are converted into digital values again.
h = 1 / Fh) and a vertical period (Tv = 1 / Fv) are measured by a counter.

【0009】11は基準発振器で、対象とする複数の入
力映像信号の水平周波数(図3)の最大値よりも十分大
きい(例えば100〜1000倍程度)周波数Fr(周
期をTrとする)の基本クロックパルスを発生する。1
2は第1カウンタで、図2A,Bに示すように入力映像
信号の1H(1水平期間Th)即ち、水平同期パルスと
次の水平同期パルスとの間の前記基本クロックパルスを
計数する。その計数値をnとすると、次の関係がある。
Reference numeral 11 denotes a reference oscillator, which has a frequency Fr (period is Tr) whose frequency is sufficiently larger (for example, about 100 to 1000 times) than the maximum value of the horizontal frequency (FIG. 3) of a plurality of target input video signals. Generate a clock pulse. 1
Reference numeral 2 denotes a first counter which counts 1H (one horizontal period Th) of the input video signal, that is, the basic clock pulse between the horizontal synchronization pulse and the next horizontal synchronization pulse as shown in FIGS. 2A and 2B. Assuming that the count value is n, there is the following relationship.

【0010】 n=Th/Tr=Fr/Fh ………… (1) ∴Th=n×Tr=n/Fr ………… (2) 13は第2カウンタで、図2C,Dに示すように入力映
像信号の1垂直期間Tv,即ち、垂直同期パルスと次の
垂直同期パルスとの間の入力映像信号の水平同期パルス
を計数する。その計数値をmとすれば次の関係がある。
N = Th / Tr = Fr / Fh (1) ∴Th = n × Tr = n / Fr (2) Reference numeral 13 denotes a second counter, as shown in FIGS. 2C and 2D. The vertical synchronization period Tv of the input video signal, that is, the horizontal synchronization pulse of the input video signal between the vertical synchronization pulse and the next vertical synchronization pulse is counted. Assuming that the count value is m, there is the following relationship.

【0011】 m=Tv/Th=Fh/Fv ………… (3) ∴Tv=m×Th=m×n×Tr=m×n/Fr ………… (4) 第1,第2カウンタの計数値n,mは制御部(CPU)
7に取り込まれる。制御部7は必要に応じ(2)式より Fh=1/Th=Fr/n …………(2′) を演算する。また制御部7は必要に応じ(4)式より Fv=1/Tv=Fh/m=Fr/mn ………… (5) を演算する。制御部7はこれらの演算した水平周波数F
hd,垂直周波数FvdをRAM8に格納されている図
3の水平周波数Fh,垂直周波数Fvと比較して入力映
像信号の種類を判別し、処理回路2に対し必要な制御を
行う。
M = Tv / Th = Fh / Fv (3) ∴Tv = m × Th = m × n × Tr = m × n / Fr (4) First and second counters Count values n and m of the control unit (CPU)
7. The control unit 7 calculates Fh = 1 / Th = Fr / n (2 ′) according to the equation (2) as necessary. Further, the control unit 7 calculates Fv = 1 / Tv = Fh / m = Fr / mn (5) from Expression (4) as necessary. The control unit 7 calculates the calculated horizontal frequency F
hd and the vertical frequency Fvd are compared with the horizontal frequency Fh and the vertical frequency Fv of FIG. 3 stored in the RAM 8 to determine the type of the input video signal and perform necessary control on the processing circuit 2.

【0012】対象とする複数種類の映像信号に対して
は、m=Fh/Fv及びn=Fr/Fhは既知であるの
で、これらのデータをRAM8に予め格納して置いて、
制御部7が水平周波数Fhdや垂直周波数Fvdを演算
しないで、計数値n,mを直接RAM8に格納した対応
するデーと比較することにより映像信号の種類を判別す
るようにしてもよい。
Since m = Fh / Fv and n = Fr / Fh are known for a plurality of types of video signals of interest, these data are stored in the RAM 8 in advance, and
The control unit 7 may determine the type of the video signal by directly comparing the count values n and m with the corresponding data stored in the RAM 8 without calculating the horizontal frequency Fhd or the vertical frequency Fvd.

【0013】基準発振器11の基準クロックの影響でL
CD4の画面にノイズが乗るような場合には、制御部7
は、基準発振器11が入力映像信号の種類を判別するに
必要な所定の期間のみ発振動作を行うように制御するの
が望ましい。
Under the influence of the reference clock of the reference oscillator 11, L
If the noise appears on the screen of the CD4, the control unit 7
It is desirable to control the reference oscillator 11 to perform the oscillation operation only for a predetermined period necessary for determining the type of the input video signal.

【0014】[0014]

【発明の効果】 この発明では、従来、水平、垂直周波数の測定精度
の低い原因となっていたF/V変換器及びA/D変換器
を用いず、カウンタで水平期間Th及び垂直期間Tvを
計測すると共に、それらの計測に必要な計数用パルスと
して、水平周波数Fh及び垂直周波数Fvより100〜
1000倍と言うように十分大きな周波数の基本クロッ
ク及び水平周波数をそれぞれ用いている。従って、従来
より高精度で入力映像信号の水平、垂直周波数或いは期
間を測定することができ、その結果、入力映像信号の種
類を確実に判別できる。
According to the present invention, the horizontal period Th and the vertical period Tv are not counted by the counter without using the F / V converter and the A / D converter which have conventionally caused the low accuracy of the horizontal and vertical frequency measurement. In addition to measuring, as a counting pulse necessary for the measurement, 100 to 100 pulses from the horizontal frequency Fh and the vertical frequency Fv
The basic clock and the horizontal frequency having sufficiently large frequencies such as 1000 times are used. Therefore, the horizontal or vertical frequency or period of the input video signal can be measured with higher accuracy than before, and as a result, the type of the input video signal can be reliably determined.

【0015】 従来のように判別回路の途中に電源変
動やノイズの影響を受け易いアナログ電圧を介在させて
いないので、電源変動やノイズに強い判別回路が得られ
る。 この発明では、従来のF/V変換器やA/D変換器
を用いず、より安価なカウンタ及び基準発振器を用いて
いるので、従来より経済的な判別回路が得られる。
Since an analog voltage that is easily affected by power supply fluctuation and noise is not interposed in the middle of the determination circuit as in the related art, a determination circuit that is resistant to power supply fluctuation and noise can be obtained. According to the present invention, since a less expensive counter and reference oscillator are used without using a conventional F / V converter or A / D converter, a more economical discriminating circuit can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の実施例を示すブロック図。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】図1の要部のタイミングチャート。FIG. 2 is a timing chart of a main part of FIG. 1;

【図3】対象とする複数種類の映像信号の水平、垂直周
波数等を示す図。
FIG. 3 is a diagram showing horizontal and vertical frequencies and the like of a plurality of types of video signals to be processed;

【図4】従来の画像表示装置の映像信号判別回路のブロ
ック図。
FIG. 4 is a block diagram of a video signal discriminating circuit of a conventional image display device.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 水平周波数または垂直周波数の異なる複
数種類の映像信号の中より、任意の1種類の映像信号が
画像表示装置に入力され、その入力映像信号の種類を判
別する画像表示装置の映像信号判別回路において、 前記複数種類の映像信号の水平周波数の最大値より十分
大きい周波数の基本クロックパルスを発生する基準発振
器と、 入力映像信号の1H(1水平期間)の前記基本クロック
パルスを計数する第1カウンタと、 入力映像信号の1垂直期間の水平同期パルスを計数する
第2カウンタと、 前記第1,第2カウンタの計測値より入力映像信号の種
類を判別する制御部とを具備することを特徴とする画像
表示装置の映像信号判別回路。
1. An image display apparatus comprising: an image display device that receives an arbitrary one of a plurality of types of video signals having different horizontal frequencies or vertical frequencies and determines the type of the input image signal; In the signal discriminating circuit, a reference oscillator for generating a basic clock pulse having a frequency sufficiently higher than the maximum value of the horizontal frequencies of the plurality of types of video signals, and counting the basic clock pulses of 1H (one horizontal period) of the input video signal. A first counter, a second counter that counts horizontal synchronization pulses in one vertical period of the input video signal, and a control unit that determines a type of the input video signal based on measured values of the first and second counters. A video signal discriminating circuit of an image display device, characterized by comprising:
【請求項2】 請求項1において、前記基準発振器は、
前記制御部により制御されて、入力映像信号の種類を判
別するに必要な所定の期間のみ発振動作を行うことを特
徴とする映像信号判別回路。
2. The method according to claim 1, wherein the reference oscillator comprises:
A video signal discriminating circuit, controlled by the control unit, to perform an oscillation operation only for a predetermined period necessary for discriminating a type of an input video signal.
JP9123935A 1997-05-14 1997-05-14 Video signal discriminating circuit for picture display device Pending JPH10312182A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9123935A JPH10312182A (en) 1997-05-14 1997-05-14 Video signal discriminating circuit for picture display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9123935A JPH10312182A (en) 1997-05-14 1997-05-14 Video signal discriminating circuit for picture display device

Publications (1)

Publication Number Publication Date
JPH10312182A true JPH10312182A (en) 1998-11-24

Family

ID=14873004

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9123935A Pending JPH10312182A (en) 1997-05-14 1997-05-14 Video signal discriminating circuit for picture display device

Country Status (1)

Country Link
JP (1) JPH10312182A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365798B2 (en) 2003-12-03 2008-04-29 Seiko Epson Corporation Video signal identification device and video signal identification method
KR100983998B1 (en) 2007-11-08 2010-09-28 르네사스 일렉트로닉스 가부시키가이샤 Signal processing apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365798B2 (en) 2003-12-03 2008-04-29 Seiko Epson Corporation Video signal identification device and video signal identification method
KR100983998B1 (en) 2007-11-08 2010-09-28 르네사스 일렉트로닉스 가부시키가이샤 Signal processing apparatus

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