JPH10308690A - Interference removal reception equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve communication quality and to acquire soft discrimination demodulated result by performing redemodulation of remaining received signals while using a residual signal, the demodulated result and a replica signal. SOLUTION: A replica generation part 14 generates the replica signal for each user from the information of transmission response for each user and a deffusion system for each user. A partial system estimation part 17 removes the demodulated component of received signals from the received signals and outputs the remaining signal as the residual signal. While using the transmission response, code timing information, the estimated result and the residual signal, a following step detection part 18 demodulates remaining user components, outputs the demodulated result and outputs (feeds back) the output of internal matched filter to a code synchronizing part 12 and a transmission line response estimating part 13. The matched filter 23 at this following step detection part 18 inversely deffuses a synthesized signal, outputs it to a sample/hold circuit 24 as a matched filter output and feeds it back to the transmission line response estimating part 13 and the code synchronizing part 12 as well. Besides, a discriminator 26 discriminates the phase of the multiplied result and outputs it as the demodulated result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interference canceling receiver used in a communication system employing a code division multiple access (CDMA) system.

[0002]

2. Description of the Related Art One of the communication systems is a CDMA system.
This CDMA system is Code Division Multiple Acces
This is an abbreviation of the s method, and a specific code is assigned to each line (or each user if each line and channel correspond one-to-one) and transmitted with the same frequency modulated wave. This is a multiple access method for identifying a desired line with code synchronization.

In the CDMA system, unlike the TDMA system and the like, random access can be easily performed, and a large number of users can directly communicate with each call as long as codes are determined between a transmitting side and a receiving side. It is regarded as a promising communication system that can be adapted to a further increase in the amount of users.

As a communication system adopting the CDMA system, there is, for example, a CDMA cellular system. In this CDMA cellular system, since a plurality of users perform communication using the same carrier frequency, the total interference amount is lower than the user of the system. Determine the capacity. That is, if the total interference amount increases to some extent, the communication quality deteriorates, so that the user capacity is limited.

[0005] In order to improve this, several receivers for removing interference have been proposed.

[0006] Above all, users who are communicating are grouped into a plurality of groups in the order of signal strength, and within the group, a received signal replica candidate and a received signal, or a received signal replica candidate (corresponding to all possible combinations of information symbols within the group). ) And the residual signal power of the received signal from which some interference has been removed in the previous step, and by selecting a replica candidate with a small power value, the information with the highest likelihood in the group is obtained. A receiver configured to output a combination of symbols as a demodulation result and to use a residual signal generated by a selected received signal replica candidate for demodulation of the next group is disclosed in Japanese Patent Application No. 8-216429. Have been. In this receiving apparatus, by combining sequence estimation and interference cancellation, interference cancellation can be efficiently performed with a small amount of calculation.

[0007]

However, in the above-described receiving apparatus, there is a problem that if there is an error in the sequence estimation, the interference removal performance is reduced accordingly and the communication quality is deteriorated.

Further, since the estimation result indicates a discrete value, there is a disadvantage that a soft decision demodulation result cannot be obtained from the estimation result.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and improves the communication quality by removing interference by increasing the accuracy of sequence estimation and obtains a soft decision demodulation result from the sequence estimation result. It is an object of the present invention to provide an interference canceling receiver capable of performing the above-described steps.

[0010]

In order to achieve the above object, an interference cancellation receiving apparatus according to the first aspect of the present invention is configured such that a plurality of wireless communication apparatuses are multiplexed using different spreading codes within the same frequency band. Code division multiple access (CDMA) for communication
In a receiving apparatus for receiving and demodulating a signal of a system, the frequency of the received signal is converted to obtain a baseband signal.
Receiving means; transmission path response means for estimating a transmission path response received by the baseband signal for each spreading code; code synchronization means for synchronizing each spreading code with the baseband signal; A replica signal for generating a replica signal of a received signal corresponding to each user using the transmission path response estimated value estimated by the response estimating means and the timing information of each spreading code synchronized by the code synchronizing means. Generating means for calculating the power of the received signal of each user based on the estimated value of the channel response obtained by the channel response estimating means, and sorting the received signal of each user in the order of the calculated received power Sorting means, and interference removal while demodulating the user's received signal using the replica signal in the order sorted by the received power sorting means. A partial sequence estimating means for outputting a residual signal including information components corresponding to the remaining users, and a residual signal output from the partial sequence estimating means, the demodulated result, and the replica. A post-detection unit that re-demodulates the remaining reception signals using the replica signal of the reception signal for each user generated by the signal generation unit.

According to a second aspect of the present invention, there is provided the interference cancellation receiving apparatus according to the first aspect, wherein the subsequent-stage detecting means converts a replica signal of the reception signal of each user according to a respective demodulation result. Multiplication means for performing phase modulation, addition means for adding the residual signal to a received signal replica phase-modulated corresponding to each user, and a matched filter for performing despreading on the signal added by the addition means And determining means for obtaining a re-demodulation result based on the despread signal despread by the matched filter.

According to a third aspect of the present invention, in the interference canceling receiving apparatus according to the second aspect, the determination unit samples the output signal despread by the matched filter at an appropriate timing. Holding means; multiplying means for multiplying the signal sampled by the sample-and-hold means by the transmission path response estimation value output from the transmission path response estimating means; and judging and re-demodulating the signal multiplied by the multiplication means. And a determiner for obtaining a result.

According to a fourth aspect of the present invention, in the interference cancellation receiving apparatus according to the second aspect, the determination unit samples the output signal despread by the matched filter at an appropriate timing. Holding means; multiplying means for multiplying the signal sampled by the sample-and-hold means with the transmission path response estimation value output from the transmission path response estimating means; and optimal timing of the serial signal multiplied by the multiplication means. And an deciding unit for judging the signal added by the adding means to obtain a re-demodulation result.

According to a fifth aspect of the present invention, there is provided an interference cancellation receiving apparatus in which a plurality of wireless communication devices perform multiplex communication using different spreading codes within the same frequency band (CD).
In a receiving apparatus for receiving and demodulating a signal of the MA) system, a first antenna for receiving the signal of the CDMA system, and a frequency conversion of a received signal received by the first antenna to obtain a baseband signal First RF receiving means; first transmission path response estimating means for estimating, for each spreading code, a transmission path response received by the baseband signal frequency-converted by the first RF receiving means; Code synchronization means for synchronizing each spread code with respect to a band signal, a second antenna for receiving the CDMA signal, and frequency conversion of a received signal received by the first antenna to convert a baseband signal A second RF receiving means for obtaining, and a second estimation means for estimating, for each spreading code, a transmission path response received by the baseband signal frequency-converted by the second RF receiving means. A channel response estimating unit, a first channel response estimation value estimated by the first channel response estimating unit, and timing information of each spread code when synchronized by the code synchronizing unit. A first replica signal generating means for generating a first replica signal of the received signal corresponding to each user using the second transmission path response estimation value estimated by the second transmission path response estimation means; A second replica signal generating means for generating a second replica signal of a received signal corresponding to each user by using timing information of each spreading code synchronized by the code synchronizing means; And demodulating the received signal of the user in a predetermined order using the respective transmission path response estimation values and the first and second replica signals, removing interference, outputting a demodulation result, and outputting the remaining users. To Subsequence estimating means for outputting first and second residual signals including the information component to be processed, the first and second residual signals output from the subsequence estimating means, the demodulation result, and the first and second residual signals. Second
And a second-stage detection unit for performing re-demodulation of the remaining reception signals using the first and second replica signals of the reception signals for each user generated by the replica signal generation unit.

According to a sixth aspect of the present invention, in the interference cancellation receiving apparatus according to the fifth aspect, the post-stage detecting means demodulates the first replica signal of the reception signal of each user to a respective demodulation result. The first that modulates the phase according to
Multiplying means, and a second replica signal for phase-modulating a second replica signal of the received signal of each user according to the demodulation result.
Multiplying means for adding the first residual signal to the received signal replica phase-modulated corresponding to each user.
Adding means for adding the second residual signal to a received signal replica phase-modulated corresponding to each user.
, A first matched filter for despreading the signal added by the first adding means and outputting a first despread signal, and a signal added by the second adding means. A second matched filter that performs despreading on the signal and outputs a second despread signal, and a first that samples the first despread signal despread by the first matched filter at an appropriate timing. Sample and hold means, second sample and hold means for sampling the second despread signal despread by the second matched filter at an appropriate timing, and a signal sampled by the first sample and hold means. First multiplication means for multiplying and phase modulating the first transmission path response estimation value output from the first transmission path response estimation means, and the second sample Second multiplying means for multiplying the signal sampled by the holding means by a second transmission path response estimation value output from the second transmission path response estimating means and performing phase modulation, and the first and second multiplication means Combining means for combining the first and second signals phase-modulated by the means;
Determining means for determining a signal synthesized by the synthesizing means to obtain a re-demodulation result.

According to a seventh aspect of the present invention, in the interference cancellation receiving apparatus of the sixth aspect, the synthesizing means includes a first signal which is phase-modulated by the first multiplying means and the second signal. An adder for adding the second signal phase-modulated by the multiplication means of 2, and a determiner for determining a signal added by the adder and obtaining a re-demodulation result.

According to an eighth aspect of the present invention, in the interference cancellation receiving apparatus of the sixth aspect, the synthesizing means converts the first signal phase-modulated by the first multiplying means to each of the first signals. A first shift register for holding each waveform, a second shift register for holding a second signal phase-modulated by the second multiplying means for each waveform, a first and a second shift register In-phase combining means for in-phase combining the waveforms held in the first and second sections, and a determiner for determining the phase of the signal in-phase combined by the in-phase combining means and obtaining a re-demodulation result.

According to a ninth aspect of the present invention, in the interference cancellation receiving apparatus of the second or sixth aspect, each of the transmission path response estimating means includes a despreading signal output from each of the matched filters. A transmission path response is estimated using a signal and a re-demodulation result output from the determination unit.

That is, according to the present invention, the output of the matched filter of the post-stage detecting means is fed back to the channel response estimating means, so that the complex channel response coefficient can be accurately estimated, and this estimation result is utilized. The communication quality can be improved by performing interference removal.

Further, according to the present invention, a demodulation result is obtained by adding a received signal replica phase-modulated with an information symbol to a residual signal finally generated by partial sequence estimation and despreading the replica. For example, a soft decision demodulation result can be obtained.

[0021]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an interference cancellation receiver in a DS-CDMA system which is a first embodiment of the interference cancellation receiver of the present invention. FIG. 2 is a partial sequence estimation of the interference cancellation receiver of FIG. FIG. 3 is a diagram illustrating a specific configuration example of the unit, and FIG. 3 is a diagram illustrating a specific configuration example of the subsequent detection unit. FIG. 4 is a diagram illustrating another specific example (a configuration example for realizing path diversity) of the subsequent stage detection unit, and FIG. 5 is a diagram illustrating another specific example (successive type interference cancellation receiver) of the partial sequence estimation unit. is there. DS is an abbreviation for Direct Sequence (direct spreading modulation).

As shown in FIG. 1, this interference cancellation receiving apparatus includes an antenna 10, an RF receiving section 11, a code synchronizing section 12,
Transmission path response estimating unit 13, replica generating unit 14, received power sorting unit 15, previous bit interference removing unit 16, partial sequence estimating unit 17, subsequent stage detecting unit 18, delay unit (delay1) 1
9, a delay unit (delay2) 110 and the like.
The RF receiving unit 11 obtains a baseband signal from a received signal received by the antenna 10. The received signal may be an analog signal or a digital signal. In the case of an analog signal, an A / D converter is provided in the RF receiving unit 11 to perform A / D conversion to obtain a digital signal. Code synchronization unit 1
Numeral 2 is for synchronously acquiring and holding the spread code of each user from the baseband signal input from the RF receiving unit 11. The transmission path response estimating unit 13 is configured to transmit the baseband signal supplied from the RF receiving unit 11 and the code synchronization unit 12
The transmission path response received by the received signal of each user is estimated based on the timing information from the user. The replica generation unit 14 generates a replica signal for each user from the transmission path response for each user obtained by the transmission path response estimation unit 13 and information on the spreading sequence of each user. The received power sorting section 15 calculates the received power from the transmission path response (delay profile) of each user, associates the actual user number with the order of the received signal strength, and obtains the order information for each user into the partial sequence estimating section 17. To communicate. Delay unit (delay1)
19 delays the replica signal generated at the previous time by one symbol, and outputs the delayed signal to the previous bit interference removing unit 16.
The delay unit (delay2) 110 delays the transmission bit estimation result generated at the previous symbol time by one symbol, and outputs the result to the previous bit interference removal unit 16. The previous bit interference removing unit 16 removes interference of the previous bit. The partial sequence estimating unit 17 performs sequence estimation on a received signal of the highest order group of the order information notified from the received power sorting unit 15 while dividing some users, for example, all users to be received into some groups. , And outputs the estimation result to the subsequent detection unit 18. In this sequence estimation, all combinations of users in a group are set as states, and a surviving path for sequence estimation is selected and demodulated between the grouped states. Further, the partial sequence estimating unit 17 removes the demodulated portion of the received signal from the received signal and outputs the remainder to the subsequent stage detecting unit 18 as a residual signal. Rear detection unit 1
Reference numeral 8 denotes a demodulation unit for demodulating the remaining users by using the transmission path response (delay profile), code timing information, the estimation result, and the residual signal, outputting the demodulation result, and outputting the output of the internal matched filter to the code synchronization unit 12 and the transmission unit. Road response estimation unit 13
Output (feedback). Subsequence estimation unit 1
As an example of 7, as shown in FIG.
A plurality of shift registers 42 for users, a reference signal generator 43, a plurality of subtracters 44, a plurality of signal power calculators 45,
It comprises a minimum value selector 46, switches 47 and 48, a sequence estimation controller 49, and the like. The switch 41 sets a plurality of input signals (received signal-previous bit interference removal signal) in the shift register 42. The reference signal generator 43 generates a plurality of received signal replica candidates from the replica signals of all users obtained from the replica generator 14, the order information of the sorting result, and the user grouping information obtained from the sequence estimation controller 49. Reference signal generator 4
3 generates a different received signal replica candidate in synchronization with the shift of the switch 47 and generates a residual signal corresponding to each received signal replica candidate using the subtractor 44. The signal power calculator 45 calculates the power of each user. The minimum value selector 46 selects the minimum value from each signal power calculation result and outputs it as an estimation result. The switch 48 outputs the finally selected residual signal. The sequence estimation control unit 49 controls the above units and outputs user grouping information and control signals.

FIG. 3 shows an example of the latter-stage detector 18.
As shown in (1), it comprises a multiplier 21, an adder 22, matched filters (MF # 1 to #K) 23, a multiplier 25, a sample-and-hold circuit 24, a determiner 26 and the like. The sample and hold circuit 24, the multiplier 25, the determiner 26 and the like are referred to as determination means.

The multiplier 21 multiplies the received signal replica of each user by the corresponding estimation result and performs phase modulation. The adder 22 adds (combines) the phase-modulated replica signal and each residual signal from the partial sequence estimating unit 17 to generate a reception signal from which only interference signals of other users have been removed. Matched filter (MF # 1-
#K) 23 has a spreading code corresponding to each signal as a coefficient, despreads the signal synthesized by each adder 22, outputs the despread signal as a matched filter output to the sample and hold circuit 24, and transmits it. Road response estimation unit 1
3 and the code synchronization unit 12. The sample and hold circuit 24 converts the introduced despread signal into a code synchronizing unit 1
2 or only a part of the signal is sampled based on the code timing information from the transmission path response estimating unit 13. The multiplier 25 calculates the complex conjugate coefficient of the complex delay profile of each transmission path obtained from the transmission path response estimation unit 13 and the sample and hold circuit 2
4 multiplied by the sampled despread signal. The determiner 26 determines the phase of the multiplication result and outputs the result as a demodulation result. Here, when a soft decision output is required for reception, the soft decision result is output as a demodulation result.

In the case of the interference cancellation receiving apparatus of the first embodiment, when an RF signal (analog radio wave) is transmitted from the base station of the CDMA system, the RF signal is transmitted to the antenna 1
When the signal is received by the RF receiving unit 11 through 0, the received signal is frequency-converted into a baseband signal by the RF receiving unit 11, sampled by an A / D converter in the RF receiving unit 11, and converted into a digital signal. . This digital signal is output to code synchronization section 12, transmission path response estimation section 13, and previous bit interference removal section 16.

When the digital signal is input to the code synchronization section 12, the code synchronization section 12 detects the timing of the spread code of the received signal and transmits the timing information to the transmission path response estimation section 13. The transmission path response estimating unit 13 measures the complex delay profile (transmission path response value) of the transmission path received by the reception signal of each user using the known signal portion (known symbol) of the sampled reception signal.

As a method of estimating a channel response using portions other than known symbols, a result of demodulation of a received signal in a subsequent stage is fed back, and a phase uncertainty due to an information component is removed from the received signal to remove a channel uncertainty. Although there is a method of estimating the state, any one of them is used depending on the frame configuration of the received signal or the transmission state. The replica generation unit 14 obtains information corresponding to each user from the code timing information obtained by the code synchronization unit 12 and the delay profile information of the transmission path received by each user's received signal obtained by the transmission path response estimation unit 13. Generate a replica signal containing no component.

On the other hand, received power sorting section 15 calculates the received power from the delay profile of each user, associates the actual user number with the order of the received power, and transmits this information to subsequence estimation section 17. . The previous bit interference removing unit 16 calculates a replica signal of the received signal of each user input via the delay unit (delay1) 19 and the transmission bit estimation result of each user of the subsequence estimation unit 13 input via the delay unit 110. The signal is used to generate a synthesized replica signal one symbol before the symbol to be estimated and remove it from the received signal. Note that the delay units (delay1) 19 and 110 adjust the delay amounts so that the replica signal generated at the previous time and the estimation result are output with a one-symbol shift.

The signal from which the previous bit interference has been removed by the preceding bit interference removing section 16 is input to the partial sequence estimating section 17, and the partial sequence estimating section 17 performs a partial sequence estimating operation (interference removing receiving operation). .

In this case, the contents of the shift register 51 are transferred to the shift register 42 at an appropriate timing via the switch 41 in the previous bit interference elimination signal input to the partial sequence estimating unit 17. The signal first introduced into the shift register 42 is fed back to the subtractor 44 via the switch 47.

On the other hand, in the reference signal generator 43, different received signal replica candidates are generated in synchronization with the shift of the switch 47, and the subtractor 44 generates a residual signal corresponding to each replica candidate. Is done.

Further, the reference signal generation unit 43 generates a plurality of received signal replicas based on the replica signals of all users obtained from the replica generation unit 14, the sorting result, and the user grouping information obtained from the sequence estimation control unit 49. Candidates are generated. As the received signal replica candidates, all combinations of the users in each group over two symbol times are generated. In addition, each time interference removal is completed by one step, a received signal replica candidate of a different group is generated in synchronization with the contents of the shift register 42.

The residual signal generated by the reference signal generator 43 is introduced again into the shift register 42, and the power of the contents of the shift register 42 is measured by the signal power calculator 45. These power measurement results are introduced to the minimum value determiner 46, and a combination of a residual signal having the smallest power and an information symbol candidate that has generated the residual signal is selected. With respect to this residual signal, again the candidate with the lowest power is fed back to the next step by the switch 47. In addition, 1
The estimation result for the group is output. After the next step, sequence estimation in the next group is performed in the same procedure as above, except that the residual signal is used, and this sequence estimation operation is performed until the estimation of the last user is completed, or a predetermined number of steps. Done until. Further, after these series of operations are completed, the switch 48 is turned on by the control signal from the sequence estimation control unit 49, and the final residual signal is output to the subsequent detection unit 18 to perform the next time symbol determination. Then, the received signal is transferred to the shift register 42 again.

In this way, the subsequence estimation unit 17
The primary demodulation results of all users are output to the subsequent detection unit 18 as partial sequence estimation results. Further, it outputs a residual signal generated from the signal obtained by synthesizing the estimation result and the replica signal of the received signal of each user and the received signal to the post-stage detecting unit 18.

In the subsequent stage detecting section 18, the partial sequence estimating section 17
The received signal replica having no information component used for the residual signal output from, the estimation result of all users, and the sequence estimation used in the sequence estimation is introduced to the subsequent detection unit. The received signal replica of each user is phase-modulated by the multiplier 21 with each corresponding estimation result. These information-modulated replica signals are separately added to the residual signal of the partial sequence estimating unit using the adder 22. By this processing, the signal after each addition is a received signal from which only the interference signal of another user has been removed. These signals are converted to matched filters (MF # 1 to MF # 1) each having a spreading code corresponding to each signal as a coefficient.
K) Despread by passing through 23. Since this despread signal includes delay profile information of a transmission path response, it is transmitted to the transmission path response estimation unit 13 as a matched filter output.

On the other hand, these despread signals are introduced into the sample-and-hold circuit 24, and only the part is sampled based on the code timing information from the code synchronization section or the transmission path response estimation section 13. The sampled despread signal is multiplied by the complex conjugate coefficient of the complex delay profile of each transmission path obtained from the transmission path response estimating unit 13 using the multiplier 25, and further, the phase is determined by the decision unit 26 and demodulated. Output the result. Here, when a soft decision output is required for reception, the soft decision result is output as a demodulation result.

That is, the post-stage detector 18 corrects the estimation result using the residual signal and estimation result obtained by the partial sequence estimator 17 and the replica signal of each user, and finalizes the corrected result. At the same time as the output, the matched filter output of each user in the state where interference has been removed is transmitted to the code synchronization section 12 and the transmission path response estimation section 13.

As described above, the DS-CD of the first embodiment
According to the interference cancellation receiving apparatus in the MA system, the post-stage detecting unit 18 is a simple circuit such as the multiplier 21, the adder 22, the matched filter (MF) 23, the sample and hold circuit 24, the multiplier 25, and the decision unit 26. In addition to the configuration, it is possible to take measures against multipath and obtain high-quality reception characteristics.

The matched filters (MF # 1 to MF #)
K) By returning the output a of 23 to the channel response estimating unit 13, the error in the channel response estimation is reduced, and the channel response from which the interference signal is almost eliminated (delay profile information)
Is obtained, and the receiving characteristics can be improved.

Hereinafter, a modification of the first embodiment will be described.

First, a modification of the latter-stage detector 18 will be described with reference to FIG.

FIG. 4 is a diagram showing a circuit configuration for realizing path diversity as another embodiment of the latter-stage detector 18. As shown in FIG.

In this case, as shown in FIG. 4, the post-stage detector 18 includes a multiplier 31, an adder 32, a matched filter (MF # 1 to MF # K) 33, and a sample-and-hold circuit 3.
4. It comprises a multiplier 35 as a phase correcting means, a shift register 36 as a phase adding means for each waveform, an adder (３７) 37 as an in-phase synthesizing means, a decision unit 38 and the like. In the case of the latter detection unit 18, the estimation result of all users and the received signal replica having no information component used for the sequence estimation are introduced into the multiplier 31.

Then, the received signal replica of each user is phase-modulated by the multiplier 31 with each corresponding estimation result. These information-modulated replica signals are separately output to the adder 32, and are added to the residual signal input from the partial sequence estimator 17 by the adder 32. By this processing, the signal after each addition is a received signal from which only the interference signal of another user has been removed. These received signals are output to a matched filter 33 having a spreading code corresponding to each signal as a coefficient, and are despread by each matched filter 33 to be despread signals. The despread signal includes delay profile information of the transmission path response, and feeds back the delay profile information to the transmission path response estimation unit 13 as a matched filter output in order to reuse the delay profile information for the next transmission path response estimation.

On the other hand, each despread signal is introduced into a sample and hold circuit 34, and only a part is sampled based on code timing information from the code synchronization section 12 or the transmission path response estimation section 13. The sampled despread signal is multiplied by the complex conjugate coefficient of the complex delay profile of each transmission path obtained from the transmission path response estimating unit 13 in the multiplier 35, and the phase is corrected. At this time, these complex coefficients input values corresponding to the respective paths in synchronization with the output timing of the sample and hold circuit 34. These signals are introduced into a shift register 36, in-phase synthesized by an adder 37, further subjected to a phase determination by a determiner 38, and a demodulation result is output. Here, when a soft decision output is required for reception, the soft decision result is output as a demodulation result. In addition to this embodiment, in order to realize path diversity, matched filters 33 are prepared in parallel for the number of paths.
A KE configuration may be used.

As in the application example of the post-stage detector 18, the multiplier 31, the adder 32, and the matched filters (MF # 1 to MF # 1)
MF # K) 33, sample hold circuit 34, multiplier 3
5, shift register 36, adder (Σ) 37, determiner 3
By realizing the path diversity with a simple circuit such as 8, a multipath countermeasure can be taken, and high-quality reception characteristics can be obtained. Matched filters (MF # 1 to MF # K)
By feeding back the output a of 33 to the transmission path response estimating unit 13, a transmission path response (delay profile information) from which an error in the transmission path response estimation is eliminated and an interference signal is removed is obtained.
The receiving characteristics can be improved. In addition, since interference cancellation reception can be performed with a simple configuration, it is possible to cope with an increase in user capacity in the future.

Next, another embodiment of the subsequence estimation unit 17 will be described.

The partial sequence estimating section 17 shown in FIG. 3 may be of a successful interference canceling type as shown in FIG.

That is, as shown in FIG.
1, matched filter 82, multiplier 84, PN generator 8
6, multiplier 87, delay unit 88, subtractor 89, switch 8
The subsequence estimation unit 17 is composed of 10 and the like. The matched filter 82 performs despreading with the setting (code selection signal) from the received power sorting unit 15. The PN generator 86 is a code selection signal input similarly to the matched filter 82, and sequentially changes a generated spreading code. The delay unit 88 adjusts the timing between the received signal and the respread signal.

In the case of the partial sequence estimating unit 17, the signal from which the interference of the previous bit has been removed or the received signal is introduced into the matched filter 82 via the switch 81 and despread. Note that the tap coefficients of the matched filter are sequentially set in accordance with the signal from the received power sorting unit, starting from the one with the largest received power, and the spreading code of the signal with the largest received power is initially set as the tap coefficient.

Next, the result of the despreading is sampled based on the synchronization timing of the code (code timing information from the code synchronization unit 12) and output to the multiplier 84 and the multiplier 87. The result of the despreading input to the multiplier 84 is multiplied by the complex conjugate coefficient of the complex delay profile from the channel response estimator 13, and the information symbol is determined by the determiner 85.

On the other hand, the result of the despreading input to the multiplier 87 is multiplied by the output from the PN generator 86 in the multiplier 87 to perform respreading. The re-spread signal output from the multiplier 87 acts as an interference signal for other users, and is therefore removed from the received signal by the subtractor 89. The signal after the removal is introduced again to the matched filter 82 via the switch 81, and the signal having the next highest received power is despread.

After the above operation is repeated until a signal having the smallest received signal power is determined, the switch 810 is turned on, and the final residual signal is output to the post-stage detector 18.

As described above, the partial sequence estimation unit 17
By configuring as the ve interference removal type, it is possible to obtain a primary determination result and a residual result. Here, the case where interference removal is performed for each bit has been described, but it is also possible to remove interference in burst units, for example. In this example, the result of despreading is used as it is for the signal used for re-spreading. Alternatively, for example, a signal obtained by multiplying a signal after determination by a transmission path response may be used.

Next, an antenna diversity receiving apparatus according to a second embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram showing the configuration of the antenna diversity receiving apparatus according to the second embodiment, and FIG.
9 is a block diagram showing a specific configuration of FIG. 9, and FIG. 8 is a block diagram showing another embodiment (modification) of the subsequent detection section 59.

As shown in FIG. 6, the antenna diversity receiving apparatus according to the second embodiment has antennas 50a and 50a.
b, RF receivers 51 and 55, code synchronizer 52, channel response estimators 53 and 56, replica generators 54 and 57, partial sequence estimator 58, post-stage detector 59, and the like. The RF receiving units 51 and 55, the code synchronizing unit 52, the transmission line response estimating units 53 and 56, and the replica generating units 54 and 57 have the same functions as those of the corresponding names in the first embodiment, and will be described. Is omitted. The antenna 50a, RF
Receiving section 51, transmission path response estimating section 53, replica generating section 5
4 is a first antenna system, antenna 50b, RF receiving unit 5
5. The transmission path response estimation unit 56 and the replica generation unit 57
Antenna system.

The subsequence estimating section 58 includes a first antenna system,
Partial users corresponding to each of the second antenna systems, for example, sequence estimation is performed on the received signal of the group having the strongest reception strength while dividing all the users to be received into several groups, and the estimation result and The corresponding residual signals a and b are output to the subsequent detection unit 59. The subsequent detection section 59 outputs the residual signals a,
b, the estimation result, and the replica signals a, b of each user, the estimation result is corrected, and the corrected result is used as the final output. The post-stage detection unit 59 outputs the matched filter output of each user in a state where interference has been removed to the code synchronization unit 5.
2 and the channel response estimating units 53 and 56.

As shown in FIG. 7, the latter-stage detector 59 includes a first antenna processing system (a multiplier 61, an adder 62,
A matched filter (MF) 63, a sample and hold circuit 64, a multiplier 65) and a second antenna processing system (a multiplier 66, an adder 67, a matched filter (MF) 68, a sample and hold circuit 69, a multiplier 610) Adder 611 as combining means for performing in-phase combining (maximum ratio combining) obtained by the first and second antenna systems, respectively, and performs phase determination of the in-phase combining result signal output from the adder 611 to demodulate. And a decision unit 612 that outputs the result.

Next, the operation of the antenna diversity receiver according to the second embodiment will be described. In the first antenna system, a signal received by an antenna 50a from a base station of a CDMA system or the like is frequency-converted into a baseband signal by an RF receiver 51, and A / D converted (sampling) by an A / D converter. And converted into a digital signal. In response to this signal, the code synchronization section 52 detects the timing of the spread code of the received signal and transmits the timing information to the transmission path response estimation section 53. Transmission path response estimator 5
In 3, the complex delay profile of the transmission path received by each user's received signal is measured using the known signal portion of the sampled received signal. As a method of realizing the transmission path response estimation using a portion other than the known symbol, a method of estimating a state of a transmission path response by feeding back a demodulation result and removing a phase uncertainty due to an information component from a received signal is used. The two estimation methods are selected and used depending on the frame configuration and transmission state of the received signal.

The replica generation unit 54 calculates the code timing information obtained by the code synchronization unit 52 and the delay profile information of the transmission path received by each user received signal obtained by the transmission path response estimation unit 53 from A replica signal containing no information component corresponding to each user is generated. In addition,
Although not shown in FIG. 6, the reception power sorting section 15 shown in FIG. 1 is provided, and the reception power (however, the first and second reception powers are determined based on the delay profile (transmission path response) of each user).
(The total received power of the antenna processing system), and the information can be transmitted to the subsequence estimation unit 58 by associating the actual user number with the order of the received power. Similarly, it is also possible to provide the preceding bit interference removing unit 16 shown in FIG. 1 to generate a combined replica signal one symbol before the symbol to be estimated and remove it from the received signal.

On the other hand, in the second antenna system, the CDM
A signal received by an antenna 50b from a base station of the A system is frequency-converted into a baseband signal by an RF receiver 55, A / D converted (sampled) by an A / D converter, and converted into a digital signal. You. The timing information generated by the code synchronization section 52 is also transmitted to the transmission path response estimation section 56. The transmission path response estimator 56 also measures the complex delay profile of the transmission path received by each user's received signal using the known signal portion of the sampled received signal. As a method of realizing transmission path response estimation using parts other than known symbols, there is a method of estimating a state of a transmission path response by feeding back a demodulation result and removing a phase uncertainty due to an information component from a received signal. Both estimation methods are selected and used depending on the frame configuration and transmission state of the above.

Then, based on the code timing information obtained by the code synchronization section 52 by the replica generation section 57 and the delay profile information of the transmission path received by each user received signal obtained by the transmission path response estimation section 56, A replica signal containing no information component corresponding to the user is generated. Note that, also in this case, it is possible to provide the preceding bit interference removing unit 16 as described above, generate a combined replica signal one symbol before the symbol to be estimated, and remove it from the received signal.

When a received signal or a signal from which the interference of the previous bit has been removed is input from the first antenna system and the second antenna system to the partial sequence estimating unit 58, the partial sequence estimating unit 58 To perform interference cancellation reception. As a result of the interference cancellation reception, the estimation result that is the primary demodulation result of all users is output from the partial sequence estimation unit 58 to the subsequent detection unit 59, and the estimation result and the replica signal of each user are output. Residual signals a and b between the combined signal and the received signal are output to post-stage detector 59.

That is, the partial sequence estimating section 58 generates residual signals a and b corresponding to the first antenna system and the second antenna system, respectively, and outputs the generated signals to the subsequent detection section 59. The residual signals a and b and the estimation result obtained from the sequence estimating unit 58 and the replica signals a and
b and the estimated result is corrected, and the corrected result is used as the final output. At the same time, the matched filter output of each user in the state where interference cancellation has been performed is transmitted to the code synchronization unit 5.
2 and the channel response estimating units 53 and 56. Here, the operation of the downstream detection unit 59 will be described in detail.

Subsequent detection section 59 includes subsequence estimation section 58
, The residual signal a of the first antenna system, the estimation result of all users, and the received signal replica a having no information component used for sequence estimation are introduced into the first antenna processing system (multiplier 61). Is done. Further, in the subsequent detection section 59, the residual signal b of the second antenna system output from the partial sequence estimation section 58, the estimation result of all users, and the received signal replica b having no information component used for the sequence estimation are included. It is introduced to the second antenna processing system (multiplier 67).

First, the first antenna processing system will be described.

In the first antenna processing system (the signal processing system on the side of the antenna 50a), the received signal replica of each user is phase-modulated by the multiplier 61 with each corresponding estimation result. These information-modulated replica signals are separately added to the residual signal a from the corresponding subsequence estimation unit 58 using an adder 62. By this processing, the signal after each addition is a received signal from which only the interference signal of another user has been removed. Despreading is performed by passing these signals through a matched filter 63 having a spreading code corresponding to each signal as a coefficient. Since this despread signal includes the delay profile information of the channel response on the antenna 50a side, the channel response estimating unit 5 outputs the matched filter output a.
Returned to 3.

On the other hand, these despread signals are introduced into a sample-and-hold circuit 64, and only a part thereof is sampled based on code timing information from the code synchronization section 52 or the transmission path response estimation section 53. The sampled despread signal is output to a multiplier 65, and the multiplier 65 multiplies the complex conjugate coefficient of the complex delay profile of each transmission path on the antenna 50a side obtained from the transmission path response estimation unit 53.

Next, the second antenna processing system will be described.

In the second antenna processing system (the signal processing system on the side of the antenna 50b), the received signal replica of each user is phase-modulated by the multiplier 67 with each estimation result corresponding to each user. These information-modulated replica signals are:
The adder 67 adds the residual signal b from the corresponding partial sequence estimating section 58 to the residual signal b. These signals are
Despreading is performed through a matched filter (MF) 68 having a spreading code corresponding to each signal as a coefficient.
This despread signal contains delay profile information of the channel response on the antenna 50b side, and is fed back to the channel response estimator 56 as the output b of the matched filter (MF) 68 as in the first antenna processing system. You. On the other hand, these despread signals are introduced into a sample-and-hold circuit 69, and only a part is sampled based on the code timing information from the code synchronization section 52 or the transmission path response estimation section 56. The sampled despread signal is multiplied by a multiplier 61.
By using 0, the complex conjugate coefficient of the complex delay profile of the transmission path on the antenna 50b side obtained from the transmission path response estimation unit 56 is multiplied.

Then, the signal obtained by the first antenna processing system (the antenna 50a obtained by multiplication by the multiplier 65)
The despread signal sample value of the second antenna processing system and the signal obtained by the second antenna processing system (the despread signal sample value of the antenna 50b obtained by multiplication by the multiplier 610) are added to the adder 61.
1 and is added (combined) here.

This combined signal is output to decision unit 612, the phase of which is decided by decision unit 612, and the demodulation result is outputted. Here, when a soft decision output is required for reception, the soft decision result is output as a demodulation result.

As described above, according to the antenna diversity receiving apparatus of the second embodiment, the signals respectively received by antennas 50a and 50b are individually processed, and the partial sequence estimating section 58 and subsequent detecting section 59 respectively process the signals. A high-quality reception characteristic can be obtained by realizing antenna diversity reception using the signal obtained from the above system. In addition, the output a, b of each matched filter (MF) 63, 68 is fed back to the transmission path response estimating sections 53, 56 in the subsequent detection section 59, so that the error in the transmission path response estimation is eliminated and the interference signal is removed. A transmission path response (delay profile information) can be obtained, and the reception characteristics can be improved.

Next, referring to FIG.
Another example (application example) will be described. FIG. 8 is a diagram showing a specific circuit configuration of the latter-stage detector 59 for simultaneously realizing the antenna diversity reception and the path diversity reception.

In this case, as shown in FIG. 8, the post-stage detector 59 includes a first antenna processing system (multiplier 71, adder 7).
2. Matched filter 73, sample hold circuit 7
4, a multiplier 75, a shift register 76) and a second antenna processing system (a multiplier 77, an adder 78, a matched filter 79, a sample and hold circuit 710, a multiplier 711,
Shift register 712), an adder (Σ) 713 that combines the multiplication result signals (despread signal sample values) obtained by the first and second antenna processing systems, and an adder (Σ) 713. And a decision unit 714 that determines the phase of the received signal and outputs the result as a demodulation result.

In the case of this application example, the partial sequence estimating unit 58
The residual signal a and the residual signal b respectively corresponding to each antenna system output from, and the estimation results of all users and the received signal replicas a and b of each antenna system having no information component used for sequence estimation are included in the subsequent stage. It is introduced into the detection unit 59.

The post-stage detector 59 performs signal processing for each antenna system.

First, the first antenna processing system will be described. In the first antenna processing system, the received signal replica of each user is phase-modulated by the multiplier 71 with each corresponding estimation result. These information-modulated replica signals are separately added to the residual signal a of the partial sequence estimator 58 corresponding to the antenna 50a side by the adder 72. By this processing, the signal after each addition is a received signal from which only the interference signal of another user has been removed. These signals are passed through a matched filter 73 having a spreading code corresponding to each signal as a coefficient to be despread. The inverse spread signal contains the delay profile information of the transmission path response on the side of the antenna 50a, and is used for the estimation of the transmission path response.
Is returned to the transmission path response estimation unit 53.

On the other hand, these despread signals are introduced into a sample-and-hold circuit 74, and only a part is sampled based on code timing information corresponding to the multi-bus delay time from the code synchronization section 52 or the transmission path response estimation section 53. You. The sampled despread signal is output to a multiplier 75, and the multiplier 75 multiplies the complex conjugate coefficient of the complex delay profile of each transmission path obtained from the transmission path response estimation unit 53. At this time, each complex coefficient inputs a value corresponding to each bus in synchronization with the output timing of the sample and hold circuit 74. The signal resulting from the multiplication by the multiplier 75 is introduced into the shift register 76.

Next, the second antenna processing system will be described. In the second antenna processing system, the multiplier 77
The received signal replica of each user is phase-modulated with each corresponding estimation result. These information-modulated replica signals are separately added to the residual signal b of the partial sequence estimator 58 corresponding to the antenna 50b side using an adder 78.
Is added to These signals are passed through a matched filter 79 having a spreading code corresponding to each signal as a coefficient to perform despreading. This despread signal is transmitted to the antenna 5
Since the delay profile information of the transmission path response on the 0b side is included, the output b of the matched filter 79 is fed back to the transmission path response estimating unit 56 as in the antenna 50a.

On the other hand, these despread signals are introduced into a sample-and-hold circuit 710, and based on code timing information corresponding to the multipath delay time on the antenna 50b side from the code synchronization section 52 or the transmission path response estimation section 56. , Only a portion is sampled. The sampled despread signal is subjected to transmission channel response estimation
6 is multiplied by the complex conjugate coefficient of the complex delay profile (transmission path response b) of each transmission path. At this time, values corresponding to the respective paths are input to these complex coefficients in synchronization with the output timing of the sample and hold circuit 710. These signals are introduced to the shift register 712.

The despread signal sample values obtained by the first and second antenna processing systems are combined by an adder 713 and output to a decision unit 714, and the decision unit 714 determines the phase and demodulates them. The result is output. Here, when a soft decision output is required for reception, the soft decision result is output as a demodulation result. As an example other than this application example, path diversity may be realized as a RAKE configuration in which matched filters are prepared in parallel in the number of paths.

As described above, in the antenna diversity receiving apparatus, by realizing the path diversity reception by the post-stage detecting section 59, it is possible to take measures against multipath and to obtain higher quality reception characteristics. In addition, the outputs a and b of the matched filters 73 and 79 are fed back to the transmission path response estimation units 53 and 56, respectively, so that the transmission path response estimation error is eliminated and the interference signal is removed (delay profile information). Is obtained, and the receiving characteristics can be improved.

As described above, the embodiments and each circuit configuration example shown in each figure can be realized by combining them. In the first and second embodiments, each component in the receiving apparatus is separated into blocks. However, the present invention is not limited to this. For example, a single or a plurality of signal processors may be provided. It is also possible to realize each component collectively.

[0086]

As described above, according to the present invention, the output of the matched filter of the post-stage detecting means is fed back to the transmission path response estimating means, so that the transmission path response from which the interference signal has been removed can be obtained. The receiving characteristics can be improved. As a result, the accuracy of sequence estimation is increased, interference can be more reliably removed, and communication quality can be improved. Also, since the output of the matched filter, that is, the despread signal, is fed back to the partial sequence estimating means from the subsequent stage detecting means, a soft decision demodulation result can be obtained. Further, since diversity reception and path diversity reception are realized, high quality reception characteristics can be obtained. Further, the post-stage detection means can be realized with a simple circuit configuration such as a multiplier, an adder, and a matched filter.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an interference cancellation receiving apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a specific example of a post-stage detection unit of the interference cancellation reception apparatus according to the first embodiment.

FIG. 3 is a diagram showing a specific example of a subsequence estimation unit of the interference cancellation reception apparatus according to the first embodiment.

FIG. 4 is a diagram showing a circuit configuration for implementing path diversity as an application example of the post-stage detection unit in FIG. 2;

FIG. 5 shows an example of application of the partial sequence estimator of FIG.
FIG. 2 is a diagram showing a circuit configuration of an interference removal type.

FIG. 6 is a block diagram showing a configuration of an antenna diversity receiving apparatus according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a specific example of a post-stage detection unit of the antenna diversity receiving apparatus according to the second embodiment.

8 is a diagram showing a circuit configuration for realizing antenna diversity and path diversity at the same time as an application example of the latter-stage detection unit in FIG. 6;

[Explanation of symbols]

11, 51, 55 ... RF receiving unit, 12, 52 ... code synchronization unit, 13, 53, 56 ... transmission line response estimation unit, 14, 5
4, 57: replica generation unit, 15: power sorting unit, 16: previous bit interference removal unit, 17, 58: partial sequence estimation unit, 18, 59: post-stage detection unit, 19, 110: delay unit, 21, 25 31, 35, 61, 65, 66, 61
0, 71, 75, 77, 711... Multipliers, 22, 32,
37, 62, 611, 72, 78, 713 ... adder, 2
3, 33, 63, 68, 73, 79 ... matched filter, 24, 34, 64, 69, 74, 710 ... sample and hold circuit, 26, 38, 612, 714 ... decision unit,
36, 42, 76, 712 shift register, 41, 4
7, 48 switch, 43 reference signal generator, 44 subtractor, 45 signal power calculator, 46 minimum value determiner, 8
1,810: switch, 82: matched filter, 83
... Sample hold circuits, 84, 87 ... Multipliers, 85 ...
Judgment unit, 86: spread code generation unit, 88: delay element, 89
... subtractor.

Claims (9)

[Claims] 1. A receiving apparatus for receiving and demodulating a code division multiple access (CDMA) signal in which a plurality of wireless communication devices perform multiplex communication using different spreading codes within the same frequency band, wherein the reception signal is RF receiving means for performing frequency conversion on the baseband signal, transmission path response means for estimating the transmission path response received by the baseband signal for each spreading code, and Code synchronization means for performing synchronization, and corresponding to each user using the transmission path response estimation value estimated by the transmission path response estimation means and the timing information of each spread code when synchronized by the code synchronization means. Replica signal generation means for generating a replica signal of the received signal obtained, and a reception signal of each user based on each transmission path response estimation value obtained by the transmission path response estimation means. Calculate the power, received power sorting means for sorting the received signals of each user in the order of the calculated received power, while demodulating the received signals of the user using the replica signal in the order sorted by the received power sorting means Output the demodulation result after removing interference,
A partial sequence estimating unit that outputs a residual signal including an information component corresponding to the remaining users; a residual signal output from the partial sequence estimating unit, the demodulation result, and each user generated by the replica signal generating unit. And a post-detection unit for performing re-demodulation of the remaining received signal using a replica signal of each received signal. 2. The interference cancellation receiving apparatus according to claim 1, wherein the subsequent-stage detecting means includes: a multiplying means for performing phase modulation on a replica signal of a reception signal of each user according to a demodulation result; Adding means for adding the residual signal to the corresponding phase-modulated received signal replica; matched filter for despreading the signal added by the adding means; and despreading by the matched filter. A receiver for determining a re-demodulation result based on the spread signal. 3. The interference cancellation receiving apparatus according to claim 2, wherein the determination unit samples the output signal despread by the matched filter at an appropriate timing, and the sampled and sampled by the sample and hold unit. Multiplication means for multiplying the signal obtained by the transmission path response estimation value output from the transmission path response estimation means, and a determiner for determining a signal multiplied by the multiplication means to obtain a re-demodulation result. An interference cancellation receiver characterized by the following. 4. The interference cancellation receiver according to claim 2, wherein the determination unit samples the output signal despread by the matched filter at an appropriate timing, and the sampled and sampled output signal is sampled by the sample and hold unit. Multiplying means for multiplying the signal obtained by the transmission path response estimation value output from the transmission path response estimation means; andaddition means for holding the serial signal multiplied by the multiplication means at an optimal timing and adding in parallel. A decision unit for judging a signal added by the adding means to obtain a re-demodulation result. 5. A receiving apparatus for receiving and demodulating a code division multiple access (CDMA) signal in which a plurality of wireless communication devices perform multiplex communication using different spreading codes within the same frequency band, wherein the CDMA method is used. A first antenna for receiving a signal of the first type; a first RF receiving unit for converting a frequency of a received signal received by the first antenna to obtain a baseband signal; and a frequency conversion by the first RF receiving unit. A first channel response estimating unit for estimating a channel response received by the obtained baseband signal for each spreading code; a code synchronizing unit for synchronizing each of the spreading codes with the baseband signal; A second antenna for receiving a signal of a system, a second RF receiving means for frequency-converting a received signal received by the first antenna to obtain a baseband signal, A second transmission path response estimating means for estimating, for each spreading code, a transmission path response received by the baseband signal frequency-converted by the second RF receiving means; and a first transmission path response estimating means. A first replica signal of a received signal corresponding to each user is generated using the estimated first channel response estimation value and timing information of each spreading code synchronized by the code synchronization unit. A first replica signal generating unit, a second transmission line response estimation value estimated by the second transmission line response estimation unit, and a timing of each spreading code when synchronized by the code synchronization unit. Second replica signal generating means for generating a second replica signal of the received signal corresponding to each user using the information, the first and second transmission path response estimated values, and the first and second No A demodulated signal is output while demodulating the user's received signal in a predetermined order by using the precursor signal and outputting a demodulated result, and a first signal including information components corresponding to the remaining users is output.
Subsequence estimating means for outputting the first and second residual signals, first and second residual signals output from the subsequence estimating means, the demodulation result, and the first and second replica signal generating means And a second-stage detection unit for performing re-demodulation of the remaining received signal using the first and second replica signals of the received signal for each user generated by the above-described method. 6. The interference canceling receiving apparatus according to claim 5, wherein the subsequent-stage detecting unit performs phase modulation on a first replica signal of the received signal of each user according to a demodulation result. A second multiplying means for phase-modulating a second replica signal of the received signal of each user according to a respective demodulation result; and a first multiplying means for the received signal replica phase-modulated corresponding to each user. First adding means for adding the residual signal of the second signal, second adding means for adding the second residual signal to a received signal replica phase-modulated corresponding to each user, A first matched filter for despreading the signal added by the adding means and outputting a first despread signal; and a second matched filter for despreading the signal added by the second adding means. Out of the despread signal A second matched filter for, the sampling the first despread signal despread by said first matched filter at the right time 1
And a second sampler for sampling the second despread signal despread by the second matched filter at an appropriate timing.
And a first multiplication for phase-modulating the signal sampled by the first sample-and-hold means with a first transmission-line response estimation value output from the first transmission-line response estimation means. Means, and a second multiplying means for multiplying a signal sampled by the second sample-and-hold means with a second transmission path response estimation value output from the second transmission path response estimating means and performing phase modulation, A synthesizing means for synthesizing the first and second signals phase-modulated by the first and second multiplying means; and a judging means for judging the signal synthesized by the synthesizing means to obtain a re-demodulation result. An interference cancellation receiving apparatus, comprising: 7. The interference cancellation receiving apparatus according to claim 6, wherein said combining means comprises: a first signal phase-modulated by said first multiplying means; and a second signal phase-modulated by said second multiplying means. An interference canceling reception apparatus, comprising: an adder that adds the signals of the above signals; and a determiner that determines a phase of the signal added by the adder and obtains a re-demodulation result. 8. The interference cancellation receiving apparatus according to claim 6, wherein said combining means comprises: a first shift register for holding, for each waveform, a first signal phase-modulated by said first multiplying means; A second shift register for holding, for each waveform, a second signal phase-modulated by the second multiplying means, and an in-phase synthesis for in-phase synthesizing the waveforms held in the first and second shift registers. Means for determining the phase of the signal in-phase synthesized by the in-phase synthesizing means and obtaining a re-demodulation result. 9. The interference cancellation receiving apparatus according to claim 2, wherein each of the transmission path response estimating means includes: a despread signal output from each of the matched filters; and a re-demodulation output from the determining means. An interference canceling receiver for estimating a channel response using the result.