JPH10308686A - Power source control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To switch transmission/reception at a high speed only with a switch control in a power source part without providing a high frequency signal switch element on a transmitter/receiver for half-duplex communication. SOLUTION: Operation power of a transmitter/receiver for half-duplex communication is supplied from three terminal regulators 14a and 14b through power switching elements 15a and 15b. Parallel switching elements 32a and 32b are provided between output terminals of the upper switching elements 15 and 15b and the ground. Control signals applied to a reception control input terminal 16 and a transmission control input terminal 17 are inputted to the gates of the power switching elements 15a and 15b, and are also inputted to the gates of the parallel switching elements 32a and 32b through inverters 33a and 33b. At the time of on/off-controlling the power switching elements 15a and 15b, the parallel switching elements 32a and 32b quickly discharge the charge of a power bypass capacitor C and switch the receiver 1 and the transmitter at a high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control circuit for controlling a power supply of a transmission / reception circuit using a half-duplex communication system.

[0002]

2. Description of the Related Art Control of a power supply for a transmission / reception circuit using a half-duplex communication system is conventionally performed as shown in FIG. In FIG. 3, reference numeral 1 denotes a receiver which receives a signal input from an input terminal 2, converts the signal into an intermediate frequency, and outputs the intermediate frequency. The receiver 1 is provided with a power supply terminal 3 and a signal control terminal 4. An on / off control signal of a high-frequency signal is input to the signal control terminal 4 from a controller (not shown). The receiver 1 has a high-frequency signal switch element inserted in series in an internal high-frequency circuit unit, and switches the high-frequency signal switch element by a control signal input to a signal control terminal 4 to turn on / off a reception operation. It has become. The intermediate frequency signal output from the receiver 1 is sent to a signal input / output terminal 6 via a transmission / reception switch 5. The signal input / output terminal 6 is connected to, for example, a modem (not shown).

A transmission signal (intermediate frequency signal) input from the modem to a signal input / output terminal 6 is transmitted to a transmitter 8 via a transmission / reception switch 5. The transmission / reception signal switch 5 switches between the receiver 1 and the transmitter 8 according to a switching signal provided from the controller via a signal line 7.

The transmitter 8 includes a transmission / reception switch 5.
Is converted into a high-frequency signal, amplified, and output from an output terminal 9. The transmitter 8 is provided with a power supply terminal 10 and a signal control terminal 11, to which an on / off control signal of a high-frequency signal is input from a controller. The transmitter 8 has a high-frequency signal switch element inserted in series in the high-frequency circuit unit similarly to the receiver 1, and switches the high-frequency signal switch element by a control signal input to the signal control terminal 11 to turn on the transmission operation. / Off.

The power supply terminal 3 of the receiver 1 and the power supply terminal 10 of the transmitter 8 are supplied with operating power from a power supply controller 12. The power supply controller 12 stabilizes the power supply voltage supplied from the power supply unit (not shown) to the power supply terminal 13 by the three-terminal regulators 14a and 14b, and supplies power to the receiver 1 via the power supply switching elements 15a and 15b. The power is supplied to the terminal 3 and the power supply terminal 10 of the transmitter 8.

The power switching elements 15a, 15b
For example, a P-channel MOSFET is used. A control signal applied from the controller to the reception control input terminal 16 is input to the gate of the power supply switching element 15a via the gate resistor 18a. The connection point between the gate resistor 18a and the reception control input terminal 16 is grounded via a noise bypass capacitor 19a. The gate of the power supply switching element 15b has
A control signal provided from the controller to the transmission control input terminal 17 is input via the gate resistor 18b.
The connection point between the gate resistor 18b and the transmission control input terminal 17 is grounded via a noise bypass capacitor 19b.

Further, three-terminal regulators 14a, 14b
Has a three-terminal input capacitor 21a between the input terminal and the ground.
21b are connected, and three-terminal output capacitors 22a and 22b are connected between the output terminal and the ground.

In the above configuration, when performing a reception operation, a switching signal is sent from the controller to the transmission / reception switch 5 so as to select the receiver 1 side, and a high-frequency switch is connected to the signal control terminal 4 of the receiver 1. An ON signal and a high frequency signal OFF signal are sent to the signal control terminal 11 of the transmitter 8. Further, a low-level (L) signal for turning on the power switching element 15a is sent from the controller to the reception control input terminal 16, and a high level (H) for turning off the power switching element 15b is sent to the transmission control input terminal 17. ) Is sent.

When the low-level signal is supplied to the reception control input terminal 16 as described above, the power supply switching element 15a is turned on, and the three-terminal regulator 14 is turned on.
The output voltage “a” is supplied to the power supply terminal 3 of the receiver 1 via the power switching element 15a. Also, receiver 1
Turns on the high-frequency signal switching element in response to the high-frequency switch-on signal supplied to the signal control terminal 4. As a result, the receiver 1 is in the operating state, receives the high-frequency signal input to the input terminal 2, converts it to an intermediate-frequency signal, and outputs it. The output signal of the receiver 1 is sent to the modem via the transmission / reception switch 5 and the signal input / output terminal 6.

On the other hand, the power supply switching element 15b is turned off when a high-level signal is supplied from the controller to the transmission control input terminal 17. Therefore, 3
The output voltage of the terminal regulator 14b is not supplied to the transmitter 8, and the transmitter 8 is kept in a non-operation state. Similarly, the receiver 1 can be switched to the non-operation state and the transmitter 8 can be switched to the operation state by the control signal from the controller.

[0011]

In the conventional power supply control circuit, a high-frequency signal switch element is provided in the receiver 1 and the transmitter 8 as described above, and the high-frequency signal switch element and the on / off control of the operating voltage are performed by controlling the operation voltage. , The receiving operation and the transmitting operation are switched. When the operation of the receiver 1 and the transmitter 8 is switched by a high-frequency signal switch element as in the above-described conventional case, the switch element becomes expensive, the circuit pattern becomes complicated, and noise is prevented from being mixed. Countermeasures are required. On the other hand, the power control unit 12
The transceiver is loaded for the purpose of lowering the total power, and switching to the non-operating state is performed by the high-frequency signal switching element.
The quick response by 15b is not considered.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and the operation of the receiver and the transmitter can be performed only by switch control in the power supply unit without providing a high-frequency signal switch element in the receiver and the transmitter. It is an object of the present invention to provide a power supply control circuit capable of switching at high speed.

[0013]

According to the present invention, there is provided a power supply control circuit for controlling a power supply to a receiver and a transmitter in a half-duplex communication system, wherein a stable power is supplied to the receiver and the transmitter. First and second three-terminal regulators; first and second power supply switching elements respectively provided between the output terminals of the first and second three-terminal regulators and the receiver; A first and a second parallel switching element respectively provided between the output terminal of the second power switching element and the ground; and a first control signal applied to the first power switching element to perform on / off control. A first control means for inverting the first control signal by an inverter and delaying the first control signal for a short time by an inverter;
Second control means for applying on / off control of the first parallel switching element to a state opposite to that of the first power supply switching element;
A third control means for applying a second control signal synchronized with the first control signal to the power supply switching element, and performing on / off control in a state opposite to that of the first power supply switching element; and The second control signal is inverted by the inverter and delayed for a short time and applied to the second parallel switching element, and the second parallel switching element is turned on / off in a state opposite to that of the second power supply switching element. And a fourth control means.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of a transmission / reception circuit and a power supply control circuit using a half-duplex communication method according to an embodiment of the present invention.

In FIG. 1, a receiver 1 receives a signal input from an input terminal 2, converts the signal into an intermediate frequency, and outputs the intermediate frequency. The receiver 1 is provided with a power supply terminal 3. The receiver 1 is activated when a power supply voltage is supplied to the power supply terminal 3, and is deactivated when the power supply voltage is cut off. The intermediate frequency signal output from the receiver 1 is transmitted to a transmission / reception switch 5 and a signal input / output terminal 6.
To a modem (not shown).

A transmission signal input from the modem to the signal input / output terminal 6 is transmitted to the transmitter 8 via the transmission / reception switch 5. Transmission / reception switch 5
Performs switching between the receiver 1 and the transmitter 8 according to a switching signal provided from the controller via the signal line 7.

The transmitter 8 includes a transmission / reception switch 5
Is converted into a high-frequency signal, amplified, and output from an output terminal 9. The transmitter 8 is provided with a power supply terminal 10. The power supply terminal 10 is activated when a power supply voltage is supplied thereto, and becomes inactive when the power supply voltage is cut off.

As described above, the receiver 1 and the transmitter 8 do not have a high-frequency signal switch element therein, and can be switched between operation and non-operation depending on the presence or absence of a power supply voltage supplied to the power supply terminals 3 and 10. Done.

The power supply terminal 3 of the receiver 1 and the power supply terminal 10 of the transmitter 8 are supplied with operating power from a power control unit 31. The power control unit 31 includes three-terminal regulators 14a and 14b and power switching elements 15a and 15b, and parallel switching elements 32a and 32b between the output terminals of the power switching elements 15a and 15b and the ground. As the parallel switching elements 32a and 32b, for example, a P-channel M
OSFET is used. The control signal supplied from the controller to the receiving control input terminal 16 is supplied to the gate of the parallel switching element 32 a by the inverter 33.
a and the input through the gate resistor 34a. Further, a connection point between the inverter 33a and the gate resistor 34a is grounded via a noise bypass capacitor 35a.

The gate of the parallel switching element 32b is connected to the transmission control input terminal 17 from the controller.
Is input via the inverter 33b and the gate resistor 34b. The inverter 33a,
As the 33b, for example, a C-MOS that operates at high speed is used. Further, a connection point between the inverter 33b and the gate resistor 34b is grounded via a noise bypass capacitor 35b. Other configurations of the power control unit 31 are the same as those of the power control unit 12 illustrated in FIG.

Next, the operation of the above embodiment will be described. In the above configuration, when performing a receiving operation, a switch signal is sent from the controller to the transmission / reception switch 5 so as to select the receiver 1 side, and the power supply switching element 15a is connected to the reception control input terminal 16 from the controller.
Is turned on, and a high-level (H) signal for turning off the power supply switching element 15b is sent to the transmission control input terminal 17.

When a low-level (L) signal is applied to the reception control input terminal 16 as described above, the power supply switching element 15a is turned on, and the output of the inverter 33a is inverted to a high-level signal, so that parallel switching is performed. The element 32a is turned off. As a result, the output voltage of the three-terminal regulator 14a is supplied to the power supply terminal 3 of the receiver 1 via the power switching element 15a,
Is in the operating state. At the same time, the transmission control input terminal 1
7, the power supply switching element 15b is turned off, and the inverter 3
The output of 3b is inverted to a low level signal, and the parallel switching element 32b is turned on. Therefore, the transmitter 8
The operating voltage is not supplied to the power supply terminal 10 of, and the transmitter 8 is in a non-operating state.

Hereinafter, the power control operation of the receiver 1 will be described in detail with reference to FIG. FIG. 2 equivalently shows the configuration of the power control unit 31 for the receiver 1.
L is the power supply line equivalent reactance, C is the total capacitance of the power supply bypass capacitor inserted in the receiver circuit, and Z is the equivalent impedance seen from the power supply side of the receiver 1.

Now, assuming that the control signal applied to the receiving control input terminal 16 is at a low level (a steady state) as shown in FIG.
5a is turned on. At this time, assuming that the voltage drop by the power supply switching element 15a is almost 0 V, E
The same voltage as the output terminal A of the three-terminal regulator 14a is supplied to the point, that is, the power supply terminal 3 of the receiver 1,
The receiver 1 operates normally.

Next, when the control signal applied to the reception control input terminal 16 rises, that is, in the transient state of (b), the power supply switching element 15a responds to the control signal by several ns to several ns. It turns off with a delay of 10 ns. Generally, a parallel switching element 32a, a gate resistor 34a,
When there is no control element including the noise bypass capacitor 35a and the inverter 33a, the voltage at the point E is discharged with a time constant determined by the power supply bypass capacitor C and the discharge characteristic of the load impedance Z that changes with the applied voltage. It takes experimentally several hundred μs for the voltage at the point E to drop to a voltage at which the receiver 1 does not operate sufficiently.

In the present invention, the parallel switching element 32
By providing a, the charge of the power supply bypass capacitor C is forcibly discharged, and the voltage at the point E is reduced to a voltage at which the receiver 1 does not operate. That is, the control signal supplied to the reception control input terminal 16 is:
The voltage is applied to the power switching element 15a and the inverter 33a in the same phase from point C. As the inverter 33a, a C-MOS that operates at high speed is used, but there is actually a delay of several ns, so that the control signal is applied to the parallel switching element 32a with a slight time difference. Therefore, the parallel switching element 32a is turned on slightly after the power switching element 15a is turned off, thereby preventing the output of the three-terminal regulator 14a from being short-circuited. As a result, there is no reduction in reliability due to the rush current.

The discharge time constant for the power supply bypass capacitor C is determined by the internal resistance of the parallel switching element 32a. The internal resistance of the parallel switching element 32a is several tens mΩ, and the time required to drop the voltage at the point E to a voltage at which the receiver 1 does not operate can be increased to several μs.

When the control signal is at the high level (c) (steady state), the power supply switching element 15a is kept off, the parallel switching element 32a is kept on, and the voltage at point E is 0V.

When the control signal falls at the point (d), the power switching element 15a is turned on. At this time, the transient characteristic of the voltage rise at point B, which is the output terminal of the power supply switching element 15a, is represented by a power supply line equivalent reactance L,
The response is determined by the power supply bypass capacitor C and the characteristics of the receiver 1. The response at this time is experimentally several μs, and enters a steady value.

The parallel switching element 32a has a C
The control signal applied to the point is inverted by the inverter 33a to turn off the parallel switching element 32a with a delay of several ns. This off operation is turned off when the voltage at the point B slightly increases. As a result, the power supply switching element 1
The output of 5a is not short-circuited, and the reliability is maintained.

The power supply line equivalent reactance L
Must be reduced to a value that does not significantly affect the time constant term of the circuit. The power supply bypass capacitor C expresses the sum of the capacitance values of the bypass capacitors of each stage inserted in the power supply unit of each amplifier or IC. The minimum is determined to be a low enough impedance for the component to be bypassed.

In the transient state, Z shown as the impedance of the load (receiver 1) is considered to be an instantaneous value of ΔV / ΔI that changes according to the applied voltage. Is a constant resistance value depending on the applied voltage. In FIG. 2 described above, the power control operation on the receiver 1 side has been described, but on / off control of the power supply voltage is also performed on the transmitter 8 side at high speed in the same manner as in the receiver 1.

[0033]

As described above in detail, according to the present invention, the operation power supply to the load can be turned on / off at a very high speed. Instead, high-frequency signal control and power control during transmission and reception can be performed by switching the power supply. Therefore, it is possible to prevent the wiring pattern from becoming complicated, and there is no possibility that noise is mixed by switching between transmission and reception, and it is possible to reduce the cost while maintaining high reliability.

[Brief description of the drawings]

FIG. 1 is a diagram showing an overall configuration of a power supply control circuit according to an embodiment of the present invention.

FIG. 2 is an exemplary view for explaining a power control operation in the embodiment.

FIG. 3 is a diagram showing an entire configuration of a conventional power supply control circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Receiver 2 Input terminal 3 Power supply terminal 5 Transmission / reception switch 8 Transmitter 9 Output terminal 10 Power supply terminal 18a, 18b Gate resistance 19a, 19b Noise bypass capacitor 31 Power supply control unit 32a, 32b Parallel switching element 33a, 33b Inverter 34a, 34b Gate resistance 35a, 35b Noise bypass capacitor

Claims (1)

[Claims] 1. A power supply control circuit for controlling power supply to a receiver and a transmitter by a half-duplex communication method, wherein first and second three-terminal regulators for supplying stable power to the receiver and the transmitter, respectively. A first and a second power switching element provided between the output terminals of the first and second three-terminal regulators and the receiver, respectively; and an output terminal of the first and second power switching elements. First and second parallel switching elements respectively provided between the first power supply switching element and ground, a first control means for applying a first control signal to the first power supply switching element to perform on / off control, Applying the first control signal to the first parallel switching element after inverting and delaying the first control signal for a short time by an inverter;
Second control means for turning on / off the first parallel switching element in a state opposite to that of the first power switching element; and synchronizing the second power switching element with the first control signal. A third control signal for applying an on / off control to a state opposite to that of the first power supply switching element by applying a second control signal;
Control means for inverting and delaying the second control signal by an inverter and applying a small time delay to the second parallel switching element;
A power supply control circuit comprising: fourth control means for controlling on / off of the second parallel switching element in a state opposite to that of the second power supply switching element.