JPH10308685A - Transmission/reception circuit unit for radio equipment - Google Patents

Transmission/reception circuit unit for radio equipment

Info

Publication number
JPH10308685A
JPH10308685A JP9130334A JP13033497A JPH10308685A JP H10308685 A JPH10308685 A JP H10308685A JP 9130334 A JP9130334 A JP 9130334A JP 13033497 A JP13033497 A JP 13033497A JP H10308685 A JPH10308685 A JP H10308685A
Authority
JP
Japan
Prior art keywords
circuit
transmission
reception
antenna
amplifier circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9130334A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Iida
光浩 飯田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MUTOO ENG KK
SYST DESIGN KK
System Design Co Ltd
Original Assignee
MUTOO ENG KK
SYST DESIGN KK
System Design Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MUTOO ENG KK, SYST DESIGN KK, System Design Co Ltd filed Critical MUTOO ENG KK
Priority to JP9130334A priority Critical patent/JPH10308685A/en
Publication of JPH10308685A publication Critical patent/JPH10308685A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To permit a high frequency amplifier to execute transmission and reception, to miniaturize it and to reduce cost. SOLUTION: A first switch circuit 16 connects a modulation circuit 18 with the input terminal 14a of an amplifier circuit 14, interrupts connection between an antenna 20 and the input terminal 14a of the amplifier circuit 14 at the time of transmission, interrupts connection between the modulation circuit 18 and the input terminal 14a of the amplifier circuit 14, and connects an antenna 20 with the input terminal 14a of the amplifier circuit 14 at the time of reception. A second switch circuit 22 interrupts a demodulation circuit 24 and the output terminal 14b of the amplifier circuit 14, connects the antenna 20 with the output terminal 14b of the amplifier circuit 14 at the time of transmission, connects the demodulation circuit 24 with the output terminal 14b of the amplifier circuit 14, and interrupts connection between the antenna 20 and the amplifier circuit at the time of reception. The amplifier circuit 14 is used for transmission and reception by switch operation of the first and second switch circuits 16 and 22.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は無線装置に用いられ
る送信・受信回路ユニットに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission / reception circuit unit used for a radio device.

【0002】[0002]

【従来の技術】無線装置はデータを正確に送るためにデ
ータの確認信号のやりとりを行なっている。基本的に
は、送信装置、受信装置と分類しているが、双方向通信
を行なっており、共に送信回路と受信回路を有してい
る。通信は、単信方式を利用しているので、受信回路と
送信回路は排他的に使用される。従来の方式では、図3
に示すように、送信高周波増幅回路(2)と受信高周波
増幅回路(4)は独立しており、片方が動作している場
合、一方は休止していた。
2. Description of the Related Art Radio apparatuses exchange data confirmation signals in order to transmit data accurately. Basically, it is classified into a transmitting device and a receiving device, but performs bidirectional communication, and both have a transmitting circuit and a receiving circuit. Since the communication uses the simplex system, the receiving circuit and the transmitting circuit are exclusively used. In the conventional method, FIG.
As shown in (1), the transmission high-frequency amplification circuit (2) and the reception high-frequency amplification circuit (4) are independent, and when one is operating, one is at rest.

【0003】図3において、送信時、変調回路(6)の
被変調信号出力は、送信増幅回路(2)で増幅され、切
換回路(8)を経て、アンテナ(10)に供給される。
また、受信時は、切換回路(8)が切り換わり、増幅回
路(2)とアンテナ(10)間は遮断され、アンテナ
(10)に吸収された被変調波は、切換回路(8)を経
て受信増幅回路(4)に入力され、ここで増幅された
後、復調回路(12)によって復調されるように構成さ
れている。
In FIG. 3, at the time of transmission, a modulated signal output of a modulation circuit (6) is amplified by a transmission amplification circuit (2) and supplied to an antenna (10) via a switching circuit (8).
Further, at the time of reception, the switching circuit (8) is switched, the connection between the amplifier circuit (2) and the antenna (10) is cut off, and the modulated wave absorbed by the antenna (10) passes through the switching circuit (8). It is configured to be input to the reception amplification circuit (4), amplified here, and then demodulated by the demodulation circuit (12).

【0004】[0004]

【発明が解決しようとする課題】高周波増幅回路は、入
力と出力に共振回路が必要でこの共振回路は、小型化が
困難であり、しかも調整を必要とする。そのため、2つ
の高周波増幅器を備えることは、送信・受信回路ユニッ
トが大型になるとともにコストが高くなるという問題点
があった。本発明は、上記問題点を解決することを目的
とするものである。
The high-frequency amplifier circuit requires a resonance circuit for input and output, and it is difficult to reduce the size of the resonance circuit, and it requires adjustment. Therefore, the provision of two high-frequency amplifiers has a problem that the size of the transmission / reception circuit unit becomes large and the cost increases. An object of the present invention is to solve the above problems.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するた
め、本発明は、変調回路と、復調回路と、送信用及び受
信用の被変調信号を増幅するための増幅回路とを備えた
無線装置用送信・受信回路ユニットにおいて、送信時、
前記変調回路と前記増幅回路の入力端との間を接続する
とともにアンテナと前記増幅回路の入力端との間を遮断
し、受信時、前記変調回路と前記増幅回路の入力端との
間を遮断するとともにアンテナと前記増幅回路との間を
接続する第1の切換回路と、送信時、前記復調回路と前
記増幅回路の出力端との間を遮断するとともにアンテナ
と前記増幅回路の出力端との間を接続し、受信時、前記
復調回路と前記増幅回路の出力端との間を接続するとと
もにアンテナと前記増幅回路との間を遮断する第2の切
換回路を設け、前記増幅回路を送信・受信兼用としたも
のである。
SUMMARY OF THE INVENTION To achieve the above object, the present invention provides a radio apparatus comprising a modulation circuit, a demodulation circuit, and an amplification circuit for amplifying transmission and reception modulated signals. In the transmission / reception circuit unit for
Connects between the modulation circuit and the input terminal of the amplifier circuit and cuts off between the antenna and the input terminal of the amplifier circuit, and cuts off between the modulation circuit and the input terminal of the amplifier circuit during reception. And a first switching circuit that connects between the antenna and the amplifier circuit, and that, during transmission, cuts off between the demodulation circuit and the output terminal of the amplifier circuit and connects the antenna and the output terminal of the amplifier circuit. And a second switching circuit that connects between the demodulation circuit and the output terminal of the amplification circuit and disconnects between the antenna and the amplification circuit during reception. This is also used for reception.

【0006】[0006]

【発明の実施の形態】以下に本発明の構成を、添付した
図面に示す本発明の実施の形態を参照して説明する。
(14)は送信・受信兼用の高周波増幅回路、(16)
は接点(16a)が前記増幅回路(14)の入力端(1
4a)に接続された第1の切換回路であり、該切換回路
(16)の2つの接点(16b)(16c)のうち、一
方の接点(16b)には、変調回路(18)が接続さ
れ、他方の接点(16c)には、アンテナ(20)が接
続されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of the present invention will be described below with reference to the embodiments of the present invention shown in the attached drawings.
(14) is a high-frequency amplifier circuit for both transmission and reception, (16)
The contact (16a) is connected to the input terminal (1) of the amplifier circuit (14).
4a), a modulation circuit (18) is connected to one contact (16b) of the two contacts (16b) (16c) of the switching circuit (16). An antenna (20) is connected to the other contact (16c).

【0007】(22)は接点(22a)が前記増幅回路
(14)の出力端(14b)に接続された第2の切換回
路であり、該切換回路(22)の2つの接点(22b)
(22c)のうち、一方の接点(22c)には復調回路
(24)が接続され、他方の接点(22b)にはアンテ
ナ(20)が接続されている。前記第1の切換回路(1
6)は、2つの接点(16b)(16c)のうち、いづ
れか一つを電気的に選択して接点(16a)に接続す
る。
A second switching circuit (22) has a contact (22a) connected to the output terminal (14b) of the amplifying circuit (14), and has two contacts (22b) of the switching circuit (22).
Of the contacts (22c), the demodulation circuit (24) is connected to one contact (22c), and the antenna (20) is connected to the other contact (22b). The first switching circuit (1
6) One of the two contacts (16b) (16c) is electrically selected and connected to the contact (16a).

【0008】また、第2の切換回路(22)は、2つの
接点(22b)(22c)のうち、いづれか一つを電気
的に選択して、接点(22a)に接続するものである。
上記各回路は、双方向通信用のユニット化された送信・
受信回路(24)を構成している。 上記した構成にお
いて、回路(24)が送信回路として動作するときは、
第1の切換回路(16)の接点(16b)(16a)間
が電気的に接続し、接点(16c)(16a)間は切り
離される。
The second switching circuit (22) electrically selects one of the two contacts (22b) (22c) and connects it to the contact (22a).
Each of the above circuits is a unitized transmission and
A receiving circuit (24) is configured. In the above configuration, when the circuit (24) operates as a transmission circuit,
The contacts (16b) and (16a) of the first switching circuit (16) are electrically connected, and the contacts (16c) and (16a) are disconnected.

【0009】また、第2の切換回路(22)は、接点
(22a)(22b)間が接続し、接点(22a)(2
2c)間は切り離される。これにより、変調回路(1
8)の出力は、切換回路(16)を経て、増幅回路(1
4)に入力され、ここで、増幅されて、切換回路(2
2)を経て、アンテナ(20)に供給される。送信・受
信回路(24)が受信回路として動作するときは、第1
の切換回路(16)の接点(16c)(16a)間が電
気的に接続し、接点(16b)(16a)間は切り離さ
れる。また、第2の切換回路(22)は、接点(22
a)(22c)間が接続し、接点(22a)(22b)
間は切り離される。
The second switching circuit (22) has a connection between the contacts (22a) and (22b) and a contact (22a) (2
2c) is cut off. Thereby, the modulation circuit (1)
The output of 8) passes through the switching circuit (16), and passes through the amplifier circuit (1).
4), where it is amplified and switched to the switching circuit (2).
After 2), it is supplied to the antenna (20). When the transmitting / receiving circuit (24) operates as a receiving circuit, the first
The contacts (16c) and (16a) of the switching circuit (16) are electrically connected, and the contacts (16b) and (16a) are disconnected. Further, the second switching circuit (22) includes a contact (22)
a) and (22c) are connected, and the contacts (22a) and (22b)
The space is cut off.

【0010】これにより、アンテナ(20)からの電波
は、切換回路(16)を経て、増幅回路(14)に入力
にされ、ここで、増幅されて、切換回路(22)を経
て、復調回路(24)に供給される。上記送信・受信回
路(24)は、双方向通信を行なう種々の無線装置に用
いられる。図2は、無線プリンタ共有装置に本回路(2
4)を使用した実施形態を示している。無線プリンタ共
有装置のケーシングには、コネクタ(図示省略)を介し
て、パーソナルコンピュータ(26)のプリンタコネク
タや、コンピュータの出力機器であるプリンタ(28)
のコンピュータコネクタに接続するためのI/0ポート
(30)と、CPU(中央処理装置)(32)と、メモ
リ(34)とからなるマイクロコンピュータが内蔵され
ている。
Thus, the radio wave from the antenna (20) is input to the amplifier circuit (14) via the switching circuit (16), where it is amplified and passed through the switching circuit (22) to the demodulation circuit. (24). The transmission / reception circuit (24) is used for various wireless devices that perform two-way communication. FIG. 2 shows this circuit (2
4 shows an embodiment using (4). A printer connector of a personal computer (26) and a printer (28) as an output device of the computer are provided on a casing of the wireless printer sharing device via a connector (not shown).
The microcomputer includes an I / O port (30) for connecting to a computer connector of the present invention, a CPU (central processing unit) (32), and a memory (34).

【0011】CPU(32)には、UART(汎用非同
期レシーバトランスミッタ)を介して送信・受信回路
(24)が接続している。(38)は電源回路、(4
0)はスイッチング回路、(42)はコンデンサからな
る高域通過フィルタ回路、(44)はチョークから成る
低域通過フィルタ回路であり、これらの各回路は図示の
如く接続されている。
A transmission / reception circuit (24) is connected to the CPU (32) via a UART (general-purpose asynchronous receiver transmitter). (38) is a power supply circuit, (4)
0) is a switching circuit, (42) is a high-pass filter circuit composed of a capacitor, and (44) is a low-pass filter circuit composed of a choke, and these circuits are connected as shown.

【0012】前記電源回路(38)は、低域通過フィル
タ回路(44)を介してACアダプタ(46)に接続
し、送信・受信回路(24)の入出力部は、高域通過フ
ィルタ(42)を介してACアダプタ(46)のアンテ
ナを兼ねた電源コード(48)に接続している。例えば
2台のパソコン(26)(26)が1台のプリンタ(2
8)を共有する場合には、無線プリンタ共有装置(5
0)が3台用意され、この共有装置(50)が1台づつ
各パソコン(26)(26)とプリンタ(28)に取り
付けられる。共有装置(50)は、パソコン(26)
(26)のプリンタコネクタ及びプリンタ(28)のコ
ンピュータコネクタに適合するコネクタが一体的に装備
されている。
The power supply circuit (38) is connected to an AC adapter (46) via a low-pass filter circuit (44), and the input / output section of the transmission / reception circuit (24) is connected to a high-pass filter (42). ) Is connected to a power cord (48) also serving as an antenna of the AC adapter (46). For example, two personal computers (26) and (26) are connected to one printer (2).
8), the wireless printer sharing device (5)
0) are prepared, and the sharing device (50) is attached to each of the personal computers (26) (26) and the printer (28) one by one. The sharing device (50) is a personal computer (26)
A connector compatible with the printer connector of (26) and the computer connector of the printer (28) is integrally provided.

【0013】そのため、共有装置(50)のパソコン
(26)(26)やプリンタ(28)への取り付けは、
コネクタをパソコンやプリンタのコネクタに差し込むだ
けで良い。パソコン(26)(26)に取り付けられた
共有装置(50)は主として、プリントデータ送信装置
として用いられ、プリンタ(28)に取り付けられた共
有装置(50)は、プリントデータ受信装置として用い
られる。
Therefore, the attachment of the shared device (50) to the personal computer (26) (26) or the printer (28)
All you have to do is plug the connector into your computer or printer. The sharing device (50) attached to the personal computer (26) (26) is mainly used as a print data transmitting device, and the sharing device (50) attached to the printer (28) is used as a print data receiving device.

【0014】2台のパソコン(26)(26)のうち、
1台のパソコンの印字、図形プリントデータは、共有装
置(50)のI/0ポート(30)を経て、CPU(3
2)の処理動作によって、バッファメモリ(34)に転
送される。バッファメモリ(34)に蓄積された印字、
図形プリントデータは、UART(36)を介して送信
モードの送信・受信回路(24)に送られ、ここで増幅
変調されてアンテナ(48)から、対応するプリンタ
(28)の共有装置(50)に電波としてデータ送信さ
れる。この印字、図形データがのった電波は、プリンタ
(28)の共有装置(50)のアンテナ(48)に吸収
され、受信モードの送信・受信回路(24)により受信
される。
Of the two personal computers (26) and (26),
The print data and graphic print data of one personal computer are sent to the CPU (3) via the I / O port (30) of the shared device (50).
The data is transferred to the buffer memory (34) by the processing operation 2). Printing stored in the buffer memory (34),
The graphic print data is sent via the UART (36) to the transmission / reception circuit (24) in the transmission mode, where it is amplified and modulated therefrom and sent from the antenna (48) to the shared device (50) of the corresponding printer (28). Is transmitted as radio waves. The radio waves on which the print and graphic data are superimposed are absorbed by the antenna (48) of the shared device (50) of the printer (28) and received by the transmission / reception circuit (24) in the reception mode.

【0015】送信・受信回路(24)により受信され
た、印字、図形データは、ここで増幅復調された後、U
ART(18)を経て、バッファメモリ(34)に格納
される。このバッファメモリ(34)に蓄積された印
字、図形データは、CPU(32)の処理によって、I
/0ポート(30)から出力され、プリンタ(28)に
よって、印字、作図される。
The print / graphic data received by the transmission / reception circuit (24) is amplified and demodulated here.
The data is stored in the buffer memory (34) via the ART (18). The print and graphic data stored in the buffer memory (34) are processed by the CPU (32) to generate I / O data.
It is output from the / 0 port (30) and printed and plotted by the printer (28).

【0016】[0016]

【発明の効果】本発明は上述の如く構成したので、回路
の小型化とコストダウンを達成することができる。
Since the present invention is constructed as described above, it is possible to reduce the size and cost of the circuit.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のブロック回路図である。FIG. 1 is a block circuit diagram of the present invention.

【図2】本発明の応用例を示すブロック説明図である。FIG. 2 is an explanatory block diagram showing an application example of the present invention.

【図3】従来技術のブロック回路図である。FIG. 3 is a block diagram of a prior art.

【符号の説明】[Explanation of symbols]

2 増幅回路 4 増幅回路 6 変調回路 8 切換回路 10 アンテナ 12 復調回路 14 増幅回路 14a 入力端 14b 出力端 16 第1の切換回路 16a 接点 16b 接点 16c 接点 18 変調回路 20 アンテナ 22 第2の切換回路 22a 接点 22b 接点 22b 接点 24 復調回路 26 コンピュータ 28 プリンタ 30 I/0ポート 32 CPU 34 メモリ 36 UART 38 電源回路 40 スイッチング回路 42 高域通過フィルタ 44 低域通過フィルタ 46 ACアダプタ 48 アンテナ 50 無線プリンタ共有装置 Reference Signs List 2 amplifying circuit 4 amplifying circuit 6 modulating circuit 8 switching circuit 10 antenna 12 demodulating circuit 14 amplifying circuit 14a input terminal 14b output terminal 16 first switching circuit 16a contact 16b contact 16c contact 18 modulation circuit 20 antenna 22 second switching circuit 22a Contact 22b Contact 22b Contact 24 Demodulation circuit 26 Computer 28 Printer 30 I / O port 32 CPU 34 Memory 36 UART 38 Power supply circuit 40 Switching circuit 42 High-pass filter 44 Low-pass filter 46 AC adapter 48 Antenna 50 Wireless printer sharing device

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 変調回路と、復調回路と、送信用及び受
信用の被変調信号を増幅するための増幅回路とを備えた
無線装置用送信・受信回路ユニットにおいて、送信時、
前記変調回路と前記増幅回路の入力端との間を接続する
とともにアンテナと前記増幅回路の入力端との間を遮断
し、受信時、前記変調回路と前記増幅回路の入力端との
間を遮断するとともにアンテナと前記増幅回路との間を
接続する第1の切換回路と、送信時、前記復調回路と前
記増幅回路の出力端との間を遮断するとともにアンテナ
と前記増幅回路の出力端との間を接続し、受信時、前記
復調回路と前記増幅回路の出力端との間を接続するとと
もにアンテナと前記増幅回路との間を遮断する第2の切
換回路を設け、前記増幅回路を送信・受信兼用としたこ
とを特徴とする無線装置用送信・受信回路ユニット。
In a transmission / reception circuit unit for a wireless device comprising a modulation circuit, a demodulation circuit, and an amplification circuit for amplifying a transmission and reception modulated signal, when transmitting,
Connects between the modulation circuit and the input terminal of the amplifier circuit and cuts off between the antenna and the input terminal of the amplifier circuit, and cuts off between the modulation circuit and the input terminal of the amplifier circuit during reception. And a first switching circuit that connects between the antenna and the amplifier circuit, and that, during transmission, cuts off between the demodulation circuit and the output terminal of the amplifier circuit and connects the antenna and the output terminal of the amplifier circuit. And a second switching circuit that connects between the demodulation circuit and the output terminal of the amplification circuit and disconnects between the antenna and the amplification circuit during reception. A transmission / reception circuit unit for a wireless device, which is also used for reception.
JP9130334A 1997-05-02 1997-05-02 Transmission/reception circuit unit for radio equipment Pending JPH10308685A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9130334A JPH10308685A (en) 1997-05-02 1997-05-02 Transmission/reception circuit unit for radio equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9130334A JPH10308685A (en) 1997-05-02 1997-05-02 Transmission/reception circuit unit for radio equipment

Publications (1)

Publication Number Publication Date
JPH10308685A true JPH10308685A (en) 1998-11-17

Family

ID=15031889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9130334A Pending JPH10308685A (en) 1997-05-02 1997-05-02 Transmission/reception circuit unit for radio equipment

Country Status (1)

Country Link
JP (1) JPH10308685A (en)

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