JPH10304249A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image pickup device in which flicker effects are reduced. SOLUTION: In the device, a read period of a photo diode of a CMOS sensor 5 is set to a multiple of (n+1/2) of a flicker period of a fluorescent light (n is integer). Thus, a phase of an output signal (d) of an A/D converter 7 and a phase of an output signal (e) of a frame memory 14 are shifted by 180 deg. (flicker phase is inverted for each frame) and an output signal (f) of an adder 13 that is an image pickup signal is obtained, where the flicker component for each frame is reduced by using the adder 13 to integrate (sum) the signals (d), (e).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device using a CMOS image sensor as a solid-state imaging device used for a personal computer camera, an electronic still camera, or the like.

[0002]

2. Description of the Related Art Conventionally, an image pickup tube has been used in a color camera. This is not to consider each pixel of the image one by one, but is a so-called continuous analog signal, and the image information stored in the photoconductive layer of the image pickup tube leaks as much as possible between adjacent information in the horizontal direction. And stored as a continuous signal by continuous scanning of the electron beam in the horizontal direction.

However, a CCD (Charge Coupled Device)
Since the development of solid-state imaging devices typified by charge-coupled devices, imaging tubes are no longer used for purposes other than those for broadcast stations and special applications, and are mostly replaced by solid-state imaging devices.

In the case of a solid-state image pickup device, unlike the above-mentioned image pickup tube, each pixel is stored in a clearly independent manner, and the one corresponding to the electron beam scanning of the image pickup tube is based on a reading reference called a clock. This is a continuous pulse. Each pixel information is stored as a signal charge, sequentially transferred by a clock pulse, read out and arranged, and becomes a television signal.

On the other hand, in recent years, CMOS image sensors have been developed and manufactured as solid-state imaging devices replacing CCDs. This CMOS image sensor (hereinafter simply referred to as CMO)
The S sensor is also manufactured by the same CMOS process as the LSI memory and the processor. Therefore, it operates with a single power supply and operates with ultra-low power consumption (about 1/10) as compared with a CCD image sensor. Further, it has an excellent feature that an imaging section and an element driving circuit can be integrated on one chip, and high-density and high-definition pixels can be configured.

FIG. 3 is a block diagram showing a configuration example of a conventional solid-state imaging device using a CMOS sensor as a solid-state imaging device.

In FIG. 3, a fluorescent lamp 2 supplied with power from a commercial power supply 1 illuminates a subject 3 of a solid-state imaging device. Here, the subject 3 is,
For example, white paper having a uniform reflectance over the entire surface is selected.

The solid-state imaging device shown in FIG. 3 includes a lens 4 for imaging the subject 3 on the CMOS sensor 5, a CMOS sensor 5 for converting the formed image to an electric signal, and a CMOS sensor 5. A system clock 11, which supplies various timing signals for converting the formed image into electric signals, a drive pulse generator 12, an electronic shutter pulse generator 10, and an amplifier 6 which amplifies the input signal; An A / D converter 7 for converting an analog signal into a digital signal, a signal processing unit 8 for outputting an input signal (imaging signal) as a video signal separated into, for example, a luminance signal and a chrominance signal, 1V (vertical)
It comprises an integrator 9 which receives a luminance signal of a period and supplies brightness information of an image to the electronic shutter pulse generator 10.

In the solid-state imaging device configured as described above, the reflected light from the subject 3 passes through the lens 4 and
Enter the S sensor 5. After the output of the CMOS sensor 5 is amplified by the amplifier 6, it is converted into a digital signal by the A / D converter 7, separated into a luminance signal a and a chrominance signal b by the signal processing circuit 8, and becomes an output of the camera block. It is supplied to an interface circuit such as a personal computer (not shown).

FIG. 4 is a diagram showing the internal configuration of the CMOS sensor 5. As shown in FIG.
The pulse applied to the sensor 5 (the vertical shift registers 20 and 21 and the horizontal shift register 22) is a pulse V that determines a signal reading start position in the vertical direction.
P, a pulse HP for determining a horizontal signal read start position, a pulse CLK for determining a horizontal read time,
There is a pulse ESP that determines the value of the electronic shutter.

The ESP pulse is generated by the electronic shutter pulse generator 10 shown in FIG.
The pulse is generated by the drive pulse generator 12 in FIG.
The drive pulse generator 12 is created by dividing each pulse based on the system clock 11 from the system clock 11.

The electronic shutter pulse generator 10 generates an ESP pulse based on the vertical read start signal from the drive pulse generator 12, and its timing is calculated based on the luminance signal a from the signal processor 8. The electronic shutter pulse generator 10 determines (adjusts) based on the light / dark information of the image supplied from 9. That is, the electronic shutter pulse generator 10 controls (adjusts) the shutter speed of the electronic shutter so that a signal (imaging signal) of a certain amount of brightness is obtained from the CMOS sensor 5.
Is performed.

Next, referring to FIG.
The operation of the OS sensor 5 will be described in detail.

In FIG. 4, a photodiode 23 is connected to a MOS switch 24 for discharging electric charges and a signal read switch 25, respectively.

The vertical shift register 20 is cleared by the ESP pulse, and is driven by the HP pulse to output a pulse for sequentially driving the switch 24 in the vertical direction for each horizontal line of the photodiode 23. ESP
Switch 2 on the first line with the first HP pulse after the pulse
Then, a pulse for turning on the LED 4 is output, whereby the cathode of the photodiode 23 on the first line is connected to the reference potential (ground potential) point, and the charges accumulated in the photodiode 23 are swept out. The switch 24 on the second line is turned on by the next HP pulse, and the switch 24 on the first line is turned on.
Is turned off, and the photodiode 23 accumulates electric charge.
When the vertical shift register 20 sweeps out the charges of all the photodiodes 23 in this manner, an ESP pulse is applied again after one vertical cycle, and the operation returns to the initial operation state, and thereafter, the operation is repeated.

The vertical shift register 21 is cleared by the VP pulse and driven by the HP pulse to output a pulse for sequentially driving the switch 25 in the vertical direction for each horizontal line of the photodiode 23. A pulse for turning on the switch 25 on the first line is output by the first HP pulse after the VP pulse.
Moved to At the same time, the horizontal shift register 22
Since the pulse is cleared so as to output a pulse for sequentially turning on the switch 27 in the horizontal direction by the clock CLK, the charge of the capacitor 26 is read out to the IV converter 28 in a serial manner. The vertical shift register 21 outputs a pulse for turning on the switch 25 on the second line by the next HP pulse, and the electric charge of the photodiode 23 is transferred to the capacitor 26 and read out by the horizontal shift register 22. When the operation is performed for one vertical period and all the charges of the photodiodes 23 are read, a VP pulse is applied again, and thereafter, the operation is repeated.

Here, the charge transferred to the capacitor 26 is proportional to the period from the application of the ESP pulse to the application of the VP pulse, and is controlled by controlling the time interval between the ESP pulse and the VP pulse. It can be seen that the shutter speed can be controlled. still,
Since the vertical shift registers 20 and 21 are driven by the HP pulse, the charge accumulation period of the photodiode 23 is actually an integral multiple of the HP pulse period.

FIG. 5 shows the relationship between the VP pulse and the ESP pulse, the input light, and the output signal out of the CMOS sensor 5. In FIG. 5, the system clock 1 shown in FIG.
1 is set to three times the flicker cycle of the fluorescent light 2,
The shutter speed of the CMOS sensor indicates a high-speed shutter in which the ESP pulse is close to the VP pulse.

By the way, the CM as the solid-state image pickup device
The OS sensor differs from the CCD in that the exposure timing in the V direction differs between pixels. That is, as shown in FIG. 4, the output of the CMOS sensor is controlled by the shift registers 20 and 21 controlled by the ESP pulse and the VP pulse (the shutter speed determined by the time difference s between the ESP pulse and the VP pulse).
Thus, the charge stored in each of the photodiodes 23 is read out line by line (held by each of the capacitors 26), scanned in the H direction by the shift register 22, and taken out as a 1H signal (the same exposure timing). It has become. Further, this is equivalent to the number of photodiodes 23 arranged in the V direction (480 in the figure).
By repeating the process, signals of the number (all pixels) of all the photodiodes 23 (640 × 480 in the figure) are extracted (exposure timings in the V direction are different).

For this reason, for example, when photographing is performed under an indoor fluorescent lamp, the fluorescent lamp flicker causes an exposure difference in the V direction of each pixel of the CMOS sensor. This causes a problem that a luminance difference occurs in the vertical direction depending on the value of the electronic shutter.

[0021]

As described above, when a solid-state imaging device using a CMOS sensor as an imaging device is illuminated with an object having flicker, such as a normal fluorescent lamp using a commercial power supply, is used. However, when controlling the light amount using the electronic shutter of the CMOS sensor, there is a problem (defect) that horizontal stripes corresponding to the flicker cycle of the illumination are generated in the video output of the solid-state imaging device.

Therefore, the present invention has been made in view of such a problem,
It is an object of the present invention to provide a solid-state imaging device in which even when an image of a subject under illumination having flicker is taken, the influence (the occurrence of horizontal stripes) of flicker caused by illumination is reduced to a practical level.

[0023]

According to a first aspect of the present invention, there is provided a solid-state imaging device including a plurality of photoelectric conversion elements arranged two-dimensionally in a matrix, and a plurality of photoelectric conversion elements arranged via a switch from the plurality of photoelectric conversion elements. In the solid-state imaging device including a control unit that controls the light receiving time of the plurality of photoelectric conversion elements in units of rows configuring the line while periodically reading out the imaging signal in a line-sequential manner, periodically irradiating the imaging target with light. A light source whose light intensity changes,
The imaging signals read from the plurality of photoelectric conversion elements are set to 1
Storage means for storing the image data for one screen; adding means for adding the image signal for one screen read from the plurality of photoelectric conversion elements and the image signal for one screen stored in the storage means; An output unit that outputs an output of the unit as an imaging signal; and a light receiving cycle of the plurality of photoelectric conversion elements, wherein a fluctuation phase of a fluctuation component generated in the imaging signal in accordance with a change in the light amount of the light source corresponds to one adjacent screen. Means for setting the cycle to be the reverse of the signal.

According to the first aspect of the present invention, the light receiving cycle of the plurality of photoelectric conversion elements is set such that the fluctuation phase of the fluctuation component generated in the imaging signal according to the change in the light amount of the light source is a signal of one adjacent screen. Is set to the opposite cycle, and the signals for the adjacent one screen are added, so that the influence of the flicker component of the lighting device on the CMOS sensor is reduced to a practical level (１ ／). be able to.

According to a second aspect of the present invention, there is provided a solid-state imaging device having a plurality of photoelectric conversion elements arranged two-dimensionally in a matrix, and imaging signals from the plurality of photoelectric conversion elements in a line-sequential manner via a switch. A solid-state imaging device comprising: a readout unit; and a control unit configured to control a light receiving time of the plurality of photoelectric conversion elements in units of rows constituting the line. A storage unit for storing the image signals read from the plurality of photoelectric conversion elements for one screen; and an image signal for one screen read from the plurality of photoelectric conversion elements and stored in the storage unit. Addition means for adding an image signal for one screen, output means for outputting the output of the addition means as an image signal, and a light receiving cycle of the plurality of photoelectric conversion elements as (n + 1) of a light quantity change cycle of the light source. 2) times (n is one which is characterized by comprising a means for setting an integer).

According to a third aspect of the present invention, in addition to the configuration of the solid-state imaging device according to the first or second aspect, amplifying means for amplifying the outputs of the plurality of photoelectric conversion elements, and the amplifying means And an analog / digital conversion means for converting the output of the above to a digital signal and outputting the digital signal to the storage means.

According to a fourth aspect of the present invention, there is provided a solid-state imaging device according to the first or second aspect.
The plurality of photoelectric conversion elements are each configured by a photodiode, and a charge unit photoelectrically converted by the photodiode is supplied to the line unit via a switch to be stored, and a switch is provided for storing the charge stored in the storage unit. And means for sequentially reading the data through the memory.

According to the second to fourth aspects of the present invention, C
A read cycle of the image signal from the MOS sensor is (n + 1/2) times {n is an integer} times a flicker cycle of the lighting device, and an image signal obtained by delaying the image signal from the CMOS sensor by one frame period is generated. Is added, so that the CM is generated by a flicker component of the lighting device.
The effect on the OS sensor can be reduced to a practical level (1/2).

[0029]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a solid-state imaging device of the present invention using a CMOS sensor as a solid-state imaging device.

In FIG. 1, a fluorescent lamp 2 supplied with electric power from a commercial power supply 1 illuminates a subject 3 of a solid-state imaging device. Here, for the sake of explanation, the subject 3 is, for example, white paper having a uniform reflectance over the entire surface.

Further, the solid-state imaging device of the present invention shown in FIG. 1 has a lens 4 for forming an image of a subject 3 on a CMOS sensor 5 and a C for converting the formed image into an electric signal.
MOS sensor 5, system clock 11 for supplying various timing signals for converting an image formed by CMOS sensor 5 into an electric signal (imaging signal), drive pulse generator 12, and electronic shutter pulse generator 10, an amplifier 6 for amplifying an input signal, an A / D converter 7 for converting an analog signal to a digital signal,
Frame memory 14 for delaying the image signal by one frame period
An adder 13 for adding an output (imaging) signal of the frame memory 14 and an imaging signal before delay, and a signal processing unit 8 for outputting an input signal as a video signal separated into a luminance signal and a chrominance signal. For example, an integrator 9 that inputs a luminance signal for one frame period and supplies brightness information of an image to the electronic shutter pulse generator 10.

In the solid-state imaging device configured as described above, the reflected light from the subject 3 passes through the lens 4 and
Enter the S sensor 5. After the output of the CMOS sensor 5 is amplified by the amplifier 6, it is converted into a digital signal by the A / D converter 7 and input to the adder 13 and the frame memory 14. The frame memory 14 is driven by the synchronization pulse from the drive pulse generator 12, operates so as to delay the image signal by one frame at any time, and outputs the delayed image signal to the adder 13. The output of the adder 13 is input to the signal processing circuit 8, where the luminance signal a and the chrominance signal b
And is output from the camera block and supplied to an interface circuit such as a personal computer (not shown).

The pulses supplied to the CMOS sensor 5 include a pulse VP for determining a vertical signal read start position, a pulse HP for determining a horizontal signal read start position, a pulse CLK for determining a horizontal read time, and an electronic shutter. There is a pulse ESP that determines the value of. Among them, the ESP pulse is generated by the electronic shutter pulse generator 10, and the VP, HP, and CLK pulses are generated by the drive pulse generator 12. The drive pulse generator 12 is created by dividing each pulse based on the system clock 11 from the system clock 11.

Further, the electronic shutter pulse generator 10
Generates an ESP pulse based on the vertical read start signal from the drive pulse generation unit 12, and its timing is based on the luminance signal a from the signal processing unit 8 and supplied from the integrator 9, for example, for one frame. It is determined (adjusted) by the electronic shutter pulse generator 10 based on the brightness information of the image (feedback data of the average light amount). This means that the electronic shutter pulse generator 10
The shutter speed of the electronic shutter is controlled (adjusted) so that a signal of a constant brightness is always obtained.

The system clock 11 is a CMO
The reading cycle of the photodiode of the S sensor 5 is (n + ／) times the flicker cycle of the fluorescent lamp 2 {n is an integer}
Is set to be Thus, for example, at the time of a high-speed shutter, an image signal output as shown in FIG. 2, that is, an image signal output in which the occurrence of horizontal stripes due to flicker is significantly reduced even when photographing under a fluorescent light is obtained. This will be described with reference to FIGS.

FIG. 2 is a diagram showing each output signal of the solid-state imaging device according to the present invention. In FIG. 2, a signal (a) and a signal (b) show a VP pulse and an ESP pulse at the time of a high-speed shutter, and a signal (c) irradiates a fluorescent lamp illumination having a flicker supplied from the commercial power supply 1. 3 shows an input signal (imaging signal) from the subject 3. Note that, as is clear from FIG. 2C, in the embodiment of the present invention, the readout cycle (exposure cycle) of the photodiode of the CMOS sensor 5 is set to 3.5 times the flicker cycle of the fluorescent lamp 2. I have.

At this time, for example, a signal shown in FIG. 2D is output from the A / D converter 7, and this signal (d) is supplied to the frame memory 14 and the adder 13, respectively. . On the other hand, a signal (e) obtained by delaying the signal (d) by one frame period is supplied from the frame memory 14 to the adder 13, and the adder 13 outputs the two signals (d) and ( The addition of e) is performed.

As described above, in this embodiment, the read cycle of the photodiode of the CMOS sensor 5 is set to be 3.5 times the flicker cycle of the fluorescent lamp 2, so that the signal (d) and the signal (d) are used. In (e), the phase is shifted by 180 degrees (accurately, 1260 degrees). Therefore, the adder 13 integrates (adds) the signal (d) and the signal (e) with the flicker phase inverted for each frame. As a result, the output signal of the adder 13 becomes as shown in FIG. 2F, and the flicker component for each frame can be reduced to a practical level (1/2).

[0039]

As described above, according to the present invention, even when photographing under illumination having flicker such as a fluorescent lamp, the occurrence of horizontal stripes, which is the effect of the flicker generated by the illumination, is minimized. Can be reduced to within.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an embodiment of a solid-state imaging device according to the present invention using a CMOS sensor as a solid-state imaging device.

FIG. 2 is a diagram illustrating each output signal of the solid-state imaging device according to the present invention.

FIG. 3 is a block diagram illustrating a configuration example of a conventional solid-state imaging device using a CMOS sensor as a solid-state imaging device.

FIG. 4 is a diagram showing an internal configuration of the CMOS sensor 5.

FIG. 5 is a diagram showing each output signal in a conventional solid-state imaging device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Commercial power supply 2 ... Fluorescent lamp 3 ... Subject 4 ... Lens 5 ... CMOS image sensor 6 ... Amplifier (AMP) 7 ... A / D converter 8 ... Signal processing part 9 ... Integrator 10 ... Electronic shutter pulse generation part 11 ... System clock 12 ... Drive pulse generator 13 ... Adder 14 ... Frame memory

Claims (4)

[Claims] A plurality of photoelectric conversion elements arranged two-dimensionally in a matrix, an image pickup signal is read out from the plurality of photoelectric conversion elements in a line-sequential manner via a switch, and light reception of the plurality of photoelectric conversion elements is performed. In a solid-state imaging device including a control unit that controls time in units of rows constituting the line, a light source that periodically irradiates light to an object to be imaged and a light source is read from the plurality of photoelectric conversion elements Image signal 1
Storage means for storing one screen; and addition means for adding an image signal for one screen read from the plurality of photoelectric conversion elements and an image signal for one screen stored in the storage means. An output unit that outputs an output of the unit as an imaging signal; and a light receiving cycle of the plurality of photoelectric conversion elements, wherein a fluctuation phase of a fluctuation component generated in the imaging signal according to a change in the light amount of the light source is equivalent to one adjacent screen. A solid-state imaging device, comprising: means for setting the period of the signal to be opposite. A plurality of photoelectric conversion elements arranged two-dimensionally in a matrix, wherein image pickup signals are read out from the plurality of photoelectric conversion elements via a switch in a line-sequential manner, and light reception of the plurality of photoelectric conversion elements is performed. In a solid-state imaging device including a control unit that controls time in units of rows constituting the line, a light source that periodically irradiates light to an object to be imaged and a light source is read from the plurality of photoelectric conversion elements Image signal 1
Storage means for storing one screen; and addition means for adding an image signal for one screen read from the plurality of photoelectric conversion elements and an image signal for one screen stored in the storage means. Output means for outputting an output of the means as an image pickup signal; and means for setting a light receiving cycle of the plurality of photoelectric conversion elements to (n + 1/2) times (n is an integer) a light quantity change cycle of the light source. A solid-state imaging device characterized by the following. 3. An amplifying means for amplifying outputs of said plurality of photoelectric conversion elements, and analog / digital converting means for converting outputs of said amplifying means into digital signals and outputting to said storage means. The solid-state imaging device according to claim 1. 4. The storage device according to claim 1, wherein each of the plurality of photoelectric conversion elements is constituted by a photodiode, and a charge unit photoelectrically converted by the photodiode is supplied through a switch for each line and stored, and the storage unit stores the charge. The solid-state imaging device according to claim 1, further comprising a unit that sequentially reads out the electric charges via a switch.