JPH10294651A - Logic signal converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the influence of dispersion in parallel outputs based on fluctuation in the power supply voltages of plural comparators with parallel inputs. SOLUTION: The output of a comparator 17 is supplied to the base of a transistor 21 and outputted from an output terminal 22 of its collector. A power supply voltage Vcc of the comparator 17 is inputted to a voltage detection circuit 31 and when the Vcc is a voltage Vt1 a little higher than an operation guarantee power supply voltage Vg of the comparator 17, the voltage detection circuit 31 is a high impedance output and does not exert any influence. When the voltage Vcc gets lower than the Vt1 , however, the output of the circuit 31 becomes at a low level L and the transistor 21 is turned off so that the output of the comparator 17 is prevented from being supplied to the output terminal 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a logic signal converter for converting an analog signal into a logic signal by a comparator.

[0002]

2. Description of the Related Art FIG. 2A shows a conventional logic signal converter.
This example converts an input binary optical signal to an electrical signal,
In this case, the analog electric signal is converted into a logical signal. The power supply terminal 11 is connected to an inverting input side of an operational amplifier 14 through a resistive element 12 and a light receiving element 13 such as a photodiode, and a non-inverting input terminal of the operational amplifier 14 is connected to a predetermined reference power supply 15. The side is connected to the inverting input terminal of the operational amplifier 14 through the feedback resistor element 16, the output terminal is connected to the non-inverting input terminal of the comparator 17, and the reference power supply 18 is connected to the non-inverting input terminal of the comparator 17. The output terminal of the comparator 17 is connected to the base of an npn-type switching transistor 21 through a resistance element 19, the emitter of the transistor 21 is grounded, and the collector is connected to the output terminal 22, that is, the input terminal of a post-stage circuit (not shown). . The operating power supply voltage of the operational amplifier 14 and the comparator 17 is the power supply terminal 1
Supplied from 1.

[0003] As shown in FIG. 2 Ba, the light reception signal of the light receiving element 13, that is, the transmission signal on the transmission side, takes a high level H or a low level L as shown in FIG. 2 Ba.
As indicated by Bb, if the power supply voltage is equal to or higher than the operation-guaranteed power supply voltage Vg of the comparator 17, the received optical signal is turned on, that is, if the transmission signal is at a high level H, the output of the operational amplifier 14 is reduced, Lower than comparator 17
Becomes high level, the transistor 21 is turned on, and the output voltage of the output terminal 22, that is, the comparator 17 is turned on.
The logical conversion output for the input analog signal is low level L.
become. On the other hand, when the received optical signal is off, that is, when the transmission signal is at the low level L, the output of the operational amplifier 14, that is, the analog signal becomes higher than the reference voltage of the reference power supply 18, the output of the comparator 17 becomes low, and the transistor 21
Is turned off, and the output of the output terminal 22 becomes high level H.

When the voltage Vcc of the power supply terminal 11 decreases and becomes equal to or lower than the operation guarantee power supply voltage Vg of the comparator 17, the operation of the comparator 17 becomes unstable, and the output becomes high level H or low level L regardless of the input. Or the output fluctuates between a high level H and a low level L, such as a so-called chattering state. When the voltage of the power supply terminal 11 becomes completely zero,
The output of the comparator 17 also goes low. Even when the voltage Vcc of the power supply terminal 11 becomes equal to or higher than the operation guarantee power supply voltage Vg of the comparator 17 from the power-off state, the output of the comparator 17 is in an indeterminate state during that time.

[0005]

When the operating power supply voltage of the conventional logic signal converter falls below the operation guaranteeing power supply voltage Vg of the comparator 17, the operation of the conventional logic signal converter becomes unstable, which may adversely affect the subsequent circuit. In addition, the period Ta of the operation indefinite state becomes longer when the voltage Vcc of the power supply terminal 11 gradually changes. However, even when the power supply is normally turned on and off, the voltage Vcc of the power supply terminal 11 is not changed. There is always an undefined state for a certain period, and even in such a short undefined state, there is a case where the subsequent circuit is adversely affected.

[0006]

According to the present invention, a power supply state detection circuit is provided, and a power supply voltage is higher than a predetermined voltage close to or outside the operation guaranteed power supply voltage of the comparator. A state signal is detected depending on whether the state is close to or far from the operation-guaranteed power supply voltage. In accordance with the state signal, a shutoff means inserted at the output side of the comparator is controlled, and the state signal is controlled by the operation-guaranteed power supply. The output of the comparator is blocked from being supplied to the subsequent circuit in a state close to the voltage.

[0007]

FIG. 1 shows an embodiment of the present invention, and FIG.
The same reference numerals are given to portions corresponding to. In this embodiment, a power supply state detection circuit 31 is provided, and the power supply voltage Vcc of the power supply terminal 11 is supplied to the power supply state detection circuit 31.
The power supply state detection circuit 31 detects that the voltage Vcc of the power supply terminal 11 is higher than the operation guarantee power supply voltage Vg of the comparator 17.
It detects and outputs a state signal indicating whether the state is lower than the predetermined voltage _Vt1 or higher than _Vt1 . Such a power supply state detection circuit 31 is commercially available as an integrated voltage detection circuit, for example, XC61AN3001M manufactured by Torex Semiconductor.
An R voltage detector can be used. What is necessary is _just to set _Vt1 to the detection setting voltage of this voltage detector.

The output state signal of the power supply state detection circuit 31 is supplied to the base of the switching transistor 21 in this example. The collector of the transistor 21 is connected to the output terminal 22 and to the power supply terminal 11 through the resistance element 32. Power status detection circuit 31 in this example, the input power supply voltage Vcc is low level L becomes the state detection signal becomes below the voltage V _t1 decided in advance from the high-impedance output state, the power supply voltage Vcc rises from the state Vg If it exceeds a predetermined value V _t2 higher than V _t1, in which the state signal changes from low level L to a high-impedance output state.

With such a configuration, as shown in FIG. 1B, when the received optical signal changes as shown in FIG. 1Ba and the power supply voltage Vcc of the power supply terminal 11 changes as shown in FIG. The output voltage at terminal 22, that is, the conversion logic signal, changes as shown in FIG. 1Bc. That is, if the power supply voltage Vcc is set voltage V _t1, V _t2 or more, since the output of the power supply state detection circuit 31 becomes a high impedance state, which is be connected to the base of the transistor 21, which is affected in any way Instead, the output analog voltage of the operational amplifier 14 corresponding to ON and OFF of the input signal is converted into the low level L and the high level H of the logic signal, respectively, as in the prior art, and is obtained at the output terminal 22.

From this state, the power supply voltage Vcc decreases,
_{At t1} or less, the output state signal of the power state detection circuit 31 changes from the high impedance state to the low level L, the transistor 21 is turned off, and the supply of the output of the comparator 17 to the output terminal 22 is cut off. Therefore, the power supply voltage Vcc is the operation guarantee power supply voltage Vg of the comparator 17.
In the following, even if the output of the comparator 17 becomes indefinite, there is no possibility that this will appear at the output terminal 22.

Further, even when the power supply voltage Vcc rises from zero and reaches a predetermined voltage, the output state signal of the power supply state detection circuit 31 is at a low level L until the power supply voltage Vcc becomes _Vt2 , and the transistor 21 Is turned off, and there is no possibility that the undefined output of the comparator 17 is supplied to the output terminal 22. When the power supply voltage Vcc exceeds _Vt2 , the output state signal of the power supply state detection circuit 31 becomes a high impedance state, and the output of the comparator 17 is given to the base of the transistor 21 without being affected by the detection circuit 31, The output corresponding to the output of the comparator 17 is output terminal 2
2 are obtained.

[0012] FIG supply voltage Vcc falls below V _t1 in the example shown in 1B, during the period Ta to exceed then V _t2, the transistor 21 is cut off by the output of the power supply state detection circuit 31, the output of the comparator 17 is output Not supplied to terminal 22. If the power supply voltage Vcc is applied during periods other than the period Ta, the output of the comparator 17 is
Is supplied to the output terminal 22 without being interrupted by
Normal operation is performed.

[0013] change in the output state signal of the power supply state detection circuit 31 in above, and when the power supply voltage Vcc is lowered, but a different value V _t1 and V _t2 between time goes up, they may be the same value Vt . Also, although the electrical converted analog signal of the received optical signal is supplied to the comparator 17, the comparator 1
The input signal of 7 is not limited to the converted output of an optical signal, but may be any analog signal. Fig. 2A
An AND circuit is inserted in series with the base of the transistor 21 inside, and the output of the comparator 17 and the output of the power supply state detection circuit 31 are given as two inputs of the AND circuit,
The power supply state detection circuit 31 detects that the voltage Vcc of the power supply terminal 11 is _Vt1.
The above can be modified to an H level and to an L level below. Further, in the above description, the description has been made on the assumption that the power supply voltage Vcc is a positive voltage. However, when the power supply voltage Vcc is a negative voltage, the above-described Vg, Vt1 _,.
It may be provided above relationship for the absolute value of V _t2.

[0014]

As described above, according to the present invention, the power supply voltage Vcc is the operation guarantee power supply voltage Vg of the comparator 17.
When the voltage becomes slightly lower than the voltage _Vt1 , the output of the comparator 17 is cut off from being supplied to the output terminal 22, so that the power supply voltage Vcc becomes lower than the operation-guaranteed power supply voltage Vg, and the output of the comparator 17 becomes unstable. This is not output to the output terminal 22, and there is no possibility of affecting the subsequent circuit. Note that the output voltage of the output terminal 22 changes as shown in FIG. 1Bc, and changes in response to a change in the power supply voltage Vcc. Works,
During the period Ta when the state signal is at the low level L, the input operates as a low level input, and there is no significant influence.

In particular, when a plurality of bit signals are input in parallel as in an optical link, if the operation of each bit channel is different, a great effect is caused as received data. This state occurs when the power supply is turned on and off. However, if the present invention is applied, the operation guarantee power supply voltage V
If the voltage _Vt1 is set to a value that is not affected by the variation even if g varies slightly, the output of each bit channel is affected the same even if the power supply voltage varies. In addition, it is possible to correctly operate a plurality of bits of a parallel input with respect to a fluctuation in power supply voltage.

[Brief description of the drawings]

FIG. 1A is a circuit diagram showing an embodiment of the present invention, and FIG. 1B is a time chart for explaining its operation.

2A is a circuit diagram showing a conventional logic signal converter, and FIG. 2B is a time chart for explaining its operation.

Claims (1)

[Claims] 1. A logic signal converter for converting an analog signal to a logic signal by a comparator, wherein the power supply voltage of the comparator is within the operation-guaranteed power supply voltage of the comparator, but is close to the outside of the operation-guaranteed power supply voltage. A power state detection circuit that outputs a state signal depending on whether the state is close to or far from the operation-guaranteed power supply voltage than the operation-guaranteed power supply voltage, and inserted into the output side of the comparator to detect the output of the power state detection circuit. A logic signal converter, controlled by a status signal, comprising: shutoff means for interrupting the output of the comparator from being supplied to a subsequent stage when the status signal is close to outside the guaranteed power supply voltage.