JPH10294369A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

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Publication number
JPH10294369A
JPH10294369A JP11631697A JP11631697A JPH10294369A JP H10294369 A JPH10294369 A JP H10294369A JP 11631697 A JP11631697 A JP 11631697A JP 11631697 A JP11631697 A JP 11631697A JP H10294369 A JPH10294369 A JP H10294369A
Authority
JP
Japan
Prior art keywords
film
sog
orientation
bpsg
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11631697A
Other languages
Japanese (ja)
Inventor
Takeshi Saito
剛 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP11631697A priority Critical patent/JPH10294369A/en
Publication of JPH10294369A publication Critical patent/JPH10294369A/en
Withdrawn legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve (111) orientation of an Al film regardless of process conditions at the time of wiring formation by applying SOG(spin on glass) to a BPSG film for increasing the supply of atoms of hydrogen onto the surface of the BPSG film. SOLUTION: An SOG film 30 is formed on a BPSG film 20 formed on a semiconductor substrate. A contact hole or a via hole penetrating the BPSG film 20 and the SOG film 30 is formed. A barrier film 40 including a Ti layer is formed on the SOG film 30. An Al film 50 containing impurities is formed on the barrier film 40. Atoms of hydrogen are supplied from the SOG film 30 on the BPSG film 20 to the surface of the BPSG film 20 for increasing the throughput. The (002) orientation of Ti of the barrier film 40 is improved for improving the (111) orientation of the Al based film regardless of process conditions at the time of wiring formation. In this way, the resistance to electromigration is increased and the life of wiring is improved.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置及びそ
の製造方法に関し、特に、Al系配線の配線寿命の向上に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to an improvement in the wiring life of Al-based wiring.

【0002】[0002]

【従来の技術】近来の半導体装置の高集積化に伴う素子
の微細化により、配線を流れる電流密度が増大するため
断線などの問題が大きくなっており、 配線のEM(elect
ro migration) 耐性を向上させることが必要となってき
ている。このEMとは、電子により金属イオンが動かされ
ることによって、ボイドが発生し、ついに断線に至る現
象である。
2. Description of the Related Art With the miniaturization of elements accompanying the recent high integration of semiconductor devices, the current density flowing through wirings has been increased, so that problems such as disconnection have increased.
ro migration) It is necessary to improve resistance. The EM is a phenomenon in which a metal ion is moved by an electron to generate a void, which eventually leads to disconnection.

【0003】そこで従来、配線のEM耐性を向上させる方
法の一つとしてAlの(111) 結晶方位の配向を向上させる
という方法が検討されている。一つの検討例として、Al
膜の(111) 配向は下地層となるTiの(002) 配向を反映
し、Tiの結晶配向性は下地層となるBPSG(borophosphosi
licate glass) 膜の表面近傍の水素原子濃度を高めるこ
とで向上することが報告されている(1996 応用物理学会
秋期大会8p-N-7) 。
Therefore, a method of improving the orientation of the (111) crystal orientation of Al has been conventionally studied as one of the methods for improving the EM resistance of the wiring. One study example is Al
The (111) orientation of the film reflects the (002) orientation of the underlying layer Ti, and the Ti crystal orientation is BPSG (borophosphosi
It has been reported that the concentration can be improved by increasing the concentration of hydrogen atoms near the surface of the (licate glass) film (8p-N-7, 1996 Autumn Meeting of the Japan Society of Applied Physics).

【0004】具体的には、高濃度なB を含むBPSG膜を成
膜し、長時間大気放置することによりBPSG膜の表面近傍
の水素原子濃度を高めている。また、コンタクトホ−ル
での信頼性を高めるため、Al層の下にバリアメタルを設
けるというプロセスが一般的に行なわれている。
[0004] Specifically, a BPSG film containing a high concentration of B is formed and left in the air for a long time to increase the concentration of hydrogen atoms near the surface of the BPSG film. In order to enhance the reliability of the contact hole, a process of providing a barrier metal under the Al layer is generally performed.

【0005】このバリアメタルの構造としては、コンタ
クトのオ−ミック性を確保する目的で用いるTi層、バリ
ア性を確保する目的で用いるTiN 層を積層させるのが一
般的である。更に、これらバリアメタルの配向性がAlの
配向性に影響を与えることが知られている。
As a structure of the barrier metal, a Ti layer used for securing the ohmic property of the contact and a TiN layer used for securing the barrier property are generally laminated. Furthermore, it is known that the orientation of these barrier metals affects the orientation of Al.

【0006】図4は、従来、Al配線の配向性向上を目的
として提案された半導体装置の概略構成を示す断面図で
ある。従来の半導体装置の製造方法の一例を図4を参照
して説明する。図4において、シリコン基板10上にシリ
コン酸化(SiO2)膜の層間絶縁膜80を形成し、前記層間絶
縁膜80にコンタクトホ−ルを開孔する。
FIG. 4 is a cross-sectional view showing a schematic configuration of a semiconductor device conventionally proposed for the purpose of improving the orientation of Al wiring. An example of a conventional method for manufacturing a semiconductor device will be described with reference to FIG. In FIG. 4, an interlayer insulating film 80 of a silicon oxide (SiO 2 ) film is formed on a silicon substrate 10, and a contact hole is formed in the interlayer insulating film 80.

【0007】前記コンタクトホ−ルを開孔したウエハを
RFバイアス印加型のECR(electron cyclotron resonanc
e) プラズマCVD(chemical vapor deposition)装置にセ
ットし、特定の条件でCVD-Ti膜90をTiCl4 とH2を原料ガ
スとして2 〜10nm成膜する。ここではRFバイアス電圧を
印加することでTi粒子の入射角度分布を抑え(002) 配向
を有するCVD-Ti膜90を形成する。
[0007] The wafer having the contact hole is opened.
RF bias application type ECR (electron cyclotron resonanc)
e) Set in a plasma CVD (chemical vapor deposition) apparatus, and form a CVD-Ti film 90 under specific conditions by using TiCl 4 and H 2 as source gases at 2 to 10 nm. Here, by applying an RF bias voltage, the incident angle distribution of Ti particles is suppressed, and a CVD-Ti film 90 having a (002) orientation is formed.

【0008】次にTiCl4 、H2、N2、Arを導入した特定の
条件下で放電を行い(111) 配向を有するCVD-TiN 膜100
を形成する。その後、スパッタリング法を用いてTi膜70
とAl-1%Si膜110 を形成している。上記従来の半導体装
置の製造方法は、特開平7-41949 号公報に記載されてい
る。
Next, a discharge is performed under specific conditions in which TiCl 4 , H 2 , N 2 and Ar are introduced, and the CVD-TiN film 100 having (111) orientation
To form Then, the Ti film 70 using a sputtering method
And an Al-1% Si film 110. The conventional method for manufacturing a semiconductor device is described in Japanese Patent Application Laid-Open No. 7-41949.

【0009】[0009]

【発明が解決しようとする課題】上記従来例では、高濃
度な Bを含むBPSG膜を成長後、長時間大気中に放置する
ため、スル−プットが低いという問題があった。もう一
つの従来例は、Al系配線の配向性の向上を達成するため
に、バリアメタルを含めた配線形成のために用いられる
スパッタリング、CVD 等の装置構造、あるいはプロセス
条件を詳細に検討し、最適化することが必要であった。
しかし、プロセス条件には様々なパラメ−タが存在し、
それらのパラメ−タは配向性のみならず膜の密着性、抵
抗値などにも影響を及ぼすことから非常に困難な作業で
あるという問題があった。
In the above conventional example, since a BPSG film containing a high concentration of B is grown and left in the air for a long time, there is a problem that the throughput is low. Another conventional example examines in detail the device structure such as sputtering and CVD used for forming the wiring including the barrier metal, or the process conditions, in order to achieve the improvement of the orientation of the Al-based wiring, It needed to be optimized.
However, there are various parameters in the process conditions,
Since these parameters affect not only the orientation but also the adhesion of the film, the resistance value, and the like, there is a problem that the operation is very difficult.

【0010】そこで、本発明は、 BPSG 膜上にSOG(spin
on glass)膜を形成することにより、BPSG膜表面への水
素原子供給量を増加させ、スル−プットが高く、配線形
成時のプロセス条件によらず、Al膜の(111) 配向を向上
させることを目的とする。
[0010] Accordingly, the present invention provides a method of forming SOG (spin
By increasing the supply of hydrogen atoms to the BPSG film surface by forming an (on glass) film, the throughput is high, and the (111) orientation of the Al film is improved regardless of the process conditions when forming wiring. With the goal.

【0011】[0011]

【課題を解決するための手段】本発明の半導体装置は、
半導体基板上に形成された絶縁膜と、前記絶縁膜上に形
成されたSOG 膜と、前記絶縁膜及び前記SOG 膜に形成さ
れた前記半導体基板に達する開孔と、前記SOG 膜上及び
前記開孔内に形成されたバリアメタル膜と、前記バリア
メタル膜上に形成された不純物を含有するAl膜とを有す
ることを特徴としている。
According to the present invention, there is provided a semiconductor device comprising:
An insulating film formed on the semiconductor substrate; an SOG film formed on the insulating film; an opening reaching the semiconductor substrate formed on the insulating film and the SOG film; and an opening on the SOG film and the opening. It is characterized by having a barrier metal film formed in the hole and an Al film containing impurities formed on the barrier metal film.

【0012】また、本発明の半導体装置の製造方法は、
半導体基板上に絶縁膜、SOG 膜を順次形成する工程と、
前記絶縁膜及び前記SOG 膜に前記半導体基板に達する開
孔を形成する工程と、前記SOG 膜上及び前記開孔内にバ
リアメタル膜を形成する工程と、前記バリアメタル膜上
に不純物を含有するAl膜を形成する工程とを有すること
を特徴としている。
Further, a method of manufacturing a semiconductor device according to the present invention
Forming an insulating film and an SOG film sequentially on the semiconductor substrate;
Forming an opening in the insulating film and the SOG film reaching the semiconductor substrate, forming a barrier metal film on the SOG film and in the opening, and including an impurity on the barrier metal film. Forming an Al film.

【0013】[0013]

【作用】本発明によれば、BPSG膜上のSOG 膜からBPSG膜
表面へ水素原子が供給されるため、バリア膜のTiの(00
2) 配向が向上し、Ti上のAl系膜の(111) 配向を向上さ
せることができる。
According to the present invention, hydrogen atoms are supplied from the SOG film on the BPSG film to the surface of the BPSG film.
2) The orientation is improved, and the (111) orientation of the Al-based film on Ti can be improved.

【0014】[0014]

【実施例】以下に本発明の実施例を、図面を参照しなが
ら具体的に説明する。図1(e)は、本発明の第1の実
施例に係わるAl系配線構造を示す概略縦断面図を示す。
次に、図1(e)に示すAl系配線構造の製造工程を図1
(a)〜(e)に分割して具体的に述べる。図1(a)
に示すように、シリコン(Si)基板10上に、絶縁膜として
BPSGあるいはPSG 等の不純物を含有する酸化膜を形成す
るため、例えば常圧 CVD法を用いてBPSG膜20を形成す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1E is a schematic longitudinal sectional view showing an Al-based wiring structure according to the first embodiment of the present invention.
Next, the manufacturing process of the Al-based wiring structure shown in FIG.
(A) to (e) will be specifically described. FIG. 1 (a)
As shown in the figure, on a silicon (Si) substrate 10, as an insulating film
In order to form an oxide film containing impurities such as BPSG or PSG, the BPSG film 20 is formed using, for example, a normal pressure CVD method.

【0015】次に、図1(b)に示すように、SOG コ−
タを用いて SOG膜30を形成しアニ−ルを行う。ここで、
図1(c)に示すように、レジスト(不図示)を塗布し
フォトリソグラフィ−技術を用いてコンタクトホ−ルあ
るいはビアホ−ルを形成する。その後、図1(d)に示
すように、例えばコリメ−ト式スパッタ法によりTi膜40
を形成する。
Next, as shown in FIG.
The SOG film 30 is formed using a heater and annealing is performed. here,
As shown in FIG. 1C, a resist (not shown) is applied, and a contact hole or a via hole is formed by using a photolithography technique. Thereafter, as shown in FIG. 1 (d), for example, a Ti film 40 is formed by collimated sputtering.
To form

【0016】次に、図1(e)に示すように、通常のス
パッタリング法により不純物を含有するAl膜50を形成す
る。前記Al膜50は不純物としてSi、Cuを含むAl-Si-Cu、
あるいはAl-Si あるいはAl-Cu を用いる。このようにし
て形成された配線は、BPSG膜20上の SOG膜30からBPSG膜
20表面へ水素原子が供給されるため、バリア膜のTi膜40
の(002) 配向が向上する。したがって、Ti膜40上のAl系
膜50の(111) 配向が向上するためエレクトロマイグレ−
ション耐性が向上し、配線寿命を向上させることができ
る。
Next, as shown in FIG. 1E, an Al film 50 containing impurities is formed by a usual sputtering method. The Al film 50 is made of Al-Si-Cu containing Si and Cu as impurities,
Alternatively, Al-Si or Al-Cu is used. The wiring formed in this manner is changed from the SOG film 30 on the BPSG film 20 to the BPSG film.
20 Since hydrogen atoms are supplied to the surface, the Ti film 40
(002) orientation is improved. Therefore, since the (111) orientation of the Al-based film 50 on the Ti film 40 is improved, electromigration is performed.
And the service life of the wiring can be improved.

【0017】次に、本発明の第2の実施例を、図面を参
照しながら具体的に説明する。図2(b)は、本発明の
第2の実施例に係わるAl系配線構造を示す概略縦断面図
を示す。図2(b)に示すAl系配線構造の製造工程を図
1(a)〜(d)及び図2(a)に基づいて具体的に述
べる。
Next, a second embodiment of the present invention will be specifically described with reference to the drawings. FIG. 2B is a schematic vertical sectional view showing an Al-based wiring structure according to a second embodiment of the present invention. The manufacturing process of the Al-based wiring structure shown in FIG. 2B will be specifically described based on FIGS. 1A to 1D and FIG.

【0018】この第2の実施例においても、図1(a)
〜(d)の工程を第1の実施例と同様に行う。そして、
図1(d)に示したバリア膜のTi膜40を形成した後、図
2(a)に示すように、前記Ti膜40上に TiN膜60を形成
しTi/TiNの積層構造とし、バリア性の向上を計る。
Also in this second embodiment, FIG.
Steps (d) to (d) are performed in the same manner as in the first embodiment. And
After forming the Ti film 40 of the barrier film shown in FIG. 1D, a TiN film 60 is formed on the Ti film 40 as shown in FIG. Improve sexuality.

【0019】(002) 配向性の向上したTi膜40上の TiN膜
60は(111) 配向を有し、 前記(111) 配向の TiN膜60上
に成膜されたAl系膜50は(111) 配向のTiN 膜60と格子定
数が近い(111) 配向のAlに配向する。そのため TiN膜60
を形成しバリア性の向上を計っても、第1の実施例で示
した構造と同様の構造が得られ、第1の実施例と同様に
エレクトロマイグレ−ション耐性が向上し、配線寿命が
向上する効果が得られる。
(002) TiN film on Ti film 40 with improved orientation
The Al-based film 50 formed on the (111) -oriented TiN film 60 has a (111) -oriented TiN film 60 and a (111) -oriented Al having a lattice constant close to that of the (111) -oriented TiN film 60. Orient. Therefore, TiN film 60
Even if the barrier property is improved by forming the same, a structure similar to the structure shown in the first embodiment can be obtained, and the electromigration resistance is improved and the wiring life is improved as in the first embodiment. The effect to be obtained is obtained.

【0020】次に、本発明の第3の実施例を、図面を参
照しながら具体的に説明する。図3(b)は、本発明の
第3の実施例に係わるAl系配線構造を示す概略縦断面図
を示している。図3(b)に示すAl系配線構造の製造工
程を図1(a)〜(d)及び図2(a)と図3(a)に
基づいて具体的に述べる。この第3の実施例において
も、図1(a)〜(d)の工程を第1の実施例と同様に
行う。
Next, a third embodiment of the present invention will be specifically described with reference to the drawings. FIG. 3B is a schematic vertical sectional view showing an Al-based wiring structure according to the third embodiment of the present invention. The manufacturing process of the Al-based wiring structure shown in FIG. 3B will be specifically described with reference to FIGS. 1A to 1D and FIGS. 2A and 3A. Also in the third embodiment, the steps of FIGS. 1A to 1D are performed in the same manner as in the first embodiment.

【0021】続いて、第2の実施例の図2(a)に示し
た TiN膜60を形成した後、図3(a)に示すように、前
記 TiN膜60上に更にTi膜70を形成し、さらにその上にAl
膜50を形成し、Ti/TiN/Ti の積層構造とする。(002) 配
向のTi膜40、Ti膜70、(111)配向の TiN膜60及び(111)
配向のAl系膜50はそれぞれ格子定数が近いためバリア膜
を積層化して低抵抗化し、膜の密着性とバリア性の向上
を計っても、第1の実施例で示した構造と同様の構造が
得られ、第1の実施例、及び第2の実施例と同様にエレ
クトロマイグレ−ション耐性が向上し、配線寿命が向上
する効果が得られる。
Subsequently, after the TiN film 60 of the second embodiment shown in FIG. 2A is formed, a Ti film 70 is further formed on the TiN film 60 as shown in FIG. And on top of that Al
The film 50 is formed to have a laminated structure of Ti / TiN / Ti. (002) Oriented Ti film 40, Ti film 70, (111) oriented TiN film 60 and (111)
Since the oriented Al-based film 50 has a lattice constant close to each other, even if the barrier film is laminated to lower the resistance and the adhesion and barrier property of the film are improved, the structure is the same as the structure shown in the first embodiment. As in the first and second embodiments, the effect of improving the electromigration resistance and the life of the wiring can be obtained.

【0022】[0022]

【発明の効果】以上、本発明によれば、BPSG膜上のSOG
膜からBPSG膜表面へ水素原子が供給されるため、スル−
プットが高く、配線形成時のプロセス条件によらず、バ
リア膜のTiの(002) 配向が向上する。したがって、Ti上
のAl系膜の(111) 配向が向上するためエレクトロマイグ
レ−ション耐性が向上し、配線寿命が改善される効果が
ある。
As described above, according to the present invention, SOG on BPSG film
Since hydrogen atoms are supplied from the membrane to the BPSG membrane surface,
The put is high, and the (002) orientation of Ti in the barrier film is improved regardless of the process conditions at the time of forming the wiring. Therefore, since the (111) orientation of the Al-based film on Ti is improved, the electromigration resistance is improved, and the life of the wiring is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例を示す工程順の半導体装
置の概略縦断面図である。
FIG. 1 is a schematic longitudinal sectional view of a semiconductor device according to a first embodiment of the present invention in the order of steps.

【図2】本発明の第2の実施例を示す工程順の半導体装
置の概略縦断面図である。
FIG. 2 is a schematic longitudinal sectional view of a semiconductor device in a process order according to a second embodiment of the present invention.

【図3】本発明の第3の実施例を示す工程順の半導体装
置の概略縦断面図である。
FIG. 3 is a schematic vertical sectional view of a semiconductor device according to a third embodiment of the present invention in the order of steps.

【図4】従来例の半導体装置の概略縦断面図である。FIG. 4 is a schematic longitudinal sectional view of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

10 シリコン(Si)基板 20 BPSG膜 30 SOG 膜 40 Ti膜 50 Al系膜 60 TiN 膜 70 Ti膜 80 SiO2膜の層間絶縁膜 90 CVD-Ti膜 100 CVD-TiN 膜 110 Al-1%Si膜10 Silicon (Si) substrate 20 BPSG film 30 SOG film 40 Ti film 50 Al-based film 60 TiN film 70 Ti film 80 Interlayer insulating film of SiO 2 film 90 CVD-Ti film 100 CVD-TiN film 110 Al-1% Si film

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上に形成された絶縁膜と、 前記絶縁膜上に形成されたSOG 膜と、 前記絶縁膜及び前記SOG 膜に形成された前記半導体基板
に達する開孔と、 前記SOG 膜上及び前記開孔内に形成されたバリアメタル
膜と、 前記バリアメタル膜上に形成された不純物を含有するAl
膜と、を有することを特徴とする半導体装置。
An insulating film formed on the semiconductor substrate; an SOG film formed on the insulating film; an opening reaching the semiconductor substrate formed on the insulating film and the SOG film; A barrier metal film formed on the film and in the opening, and an Al containing impurity formed on the barrier metal film
And a film.
【請求項2】 前記絶縁膜は、BPSG膜又は PSG膜である
ことを特徴とする請求項1に記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the insulating film is a BPSG film or a PSG film.
【請求項3】 前記バリアメタル膜は、Ti、Ti/TiN又は
Ti/TiN/Ti であることを特徴とする請求項1に記載の半
導体装置。
3. The barrier metal film is formed of Ti, Ti / TiN or
2. The semiconductor device according to claim 1, wherein the ratio is Ti / TiN / Ti.
【請求項4】 前記Al膜は、Al-Si 、Al-Si-Cu又はAl-C
u であることを特徴とする請求項1に記載の半導体装
置。
4. The Al film is made of Al-Si, Al-Si-Cu or Al-C.
The semiconductor device according to claim 1, wherein u.
【請求項5】 半導体基板上に絶縁膜、SOG 膜を順次形
成する工程と、 前記絶縁膜及び前記SOG 膜に前記半導体基板に達する開
孔を形成する工程と、 前記SOG 膜上及び前記開孔内にバリアメタル膜を形成す
る工程と、 前記バリアメタル膜上に不純物を含有するAl膜を形成す
る工程とを有することを特徴とする半導体装置の製造方
法。
5. A step of sequentially forming an insulating film and an SOG film on a semiconductor substrate; a step of forming an opening reaching the semiconductor substrate in the insulating film and the SOG film; and forming an opening on the SOG film and the opening. A method of manufacturing a semiconductor device, comprising: forming a barrier metal film therein; and forming an Al film containing impurities on the barrier metal film.
JP11631697A 1997-04-18 1997-04-18 Semiconductor device and its manufacture Withdrawn JPH10294369A (en)

Priority Applications (1)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11631697A JPH10294369A (en) 1997-04-18 1997-04-18 Semiconductor device and its manufacture

Publications (1)

Publication Number Publication Date
JPH10294369A true JPH10294369A (en) 1998-11-04

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Country Status (1)

Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100299511B1 (en) * 1999-06-18 2001-11-01 박종섭 method for forming metal interconnection line in semiconductor device
JP2008300749A (en) * 2007-06-01 2008-12-11 Ulvac Japan Ltd Method of manufacturing semiconductor device, and film deposition apparatus
JP2011205005A (en) * 2010-03-26 2011-10-13 Citizen Holdings Co Ltd Method of manufacturing semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100299511B1 (en) * 1999-06-18 2001-11-01 박종섭 method for forming metal interconnection line in semiconductor device
JP2008300749A (en) * 2007-06-01 2008-12-11 Ulvac Japan Ltd Method of manufacturing semiconductor device, and film deposition apparatus
JP2011205005A (en) * 2010-03-26 2011-10-13 Citizen Holdings Co Ltd Method of manufacturing semiconductor device

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