JPH10284507A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH10284507A JPH10284507A JP9086394A JP8639497A JPH10284507A JP H10284507 A JPH10284507 A JP H10284507A JP 9086394 A JP9086394 A JP 9086394A JP 8639497 A JP8639497 A JP 8639497A JP H10284507 A JPH10284507 A JP H10284507A
- Authority
- JP
- Japan
- Prior art keywords
- epitaxial film
- sic substrate
- sic
- layer
- low noise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Semiconductor Integrated Circuits (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は高周波デバイス、特
に高出力特性と低雑音特性が要求される情報通信用送受
信アンプの構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency device, and more particularly to a structure of a transmitting / receiving amplifier for information communication requiring high output characteristics and low noise characteristics.
【０００２】[0002]
【従来の技術】近年、小型化・高性能化された携帯電話
の普及が急速に進んでいる。この進歩に大きく貢献した
技術として、高性能な電池の開発と、高性能な電界効果
型トランジスタ、特に砒化ガリウム（ＧａＡｓ）ＭＥＳ
ＦＥＴの開発がある。デバイスとしてのＧａＡｓＭＥＳ
ＦＥＴは、低電圧動作・高利得・高効率・低雑音・低歪
み等の高周波特性に関して優れた性能を発揮し、携帯端
末の送受信アンプとして活躍している。最近では技術の
進歩とともに、従来のハイブリッド構成に対して、１チ
ップ上に低雑音受信アンプ部と高出力送信アンプ部との
全てを形成する一体型ＭＭＩＣ（Ｍｉｃｒｏｗａｖｅ
Ｍｏｎｏｌｉｔｈｉｃ ＩＣ）も開発されている。この
構造を有する従来の送受信アンプの構成を、以下図面を
参照しながら説明する。2. Description of the Related Art In recent years, miniaturized and high-performance mobile phones have been rapidly spreading. Technologies that have greatly contributed to this advance include the development of high-performance batteries and high-performance field-effect transistors, particularly gallium arsenide (GaAs) MES.
There is the development of FET. GaAs MES as device
FETs exhibit excellent performance with respect to high-frequency characteristics such as low-voltage operation, high gain, high efficiency, low noise, and low distortion, and are being used as transmission / reception amplifiers for mobile terminals. Recently, with the advance of technology, an integrated MMIC (Microwave) that forms both a low-noise receiving amplifier section and a high-output transmitting amplifier section on one chip with respect to the conventional hybrid configuration has been developed.
Monolithic IC) has also been developed. The configuration of a conventional transmission / reception amplifier having this structure will be described below with reference to the drawings.
【０００３】図３は、従来の送受信アンプ一体型ＭＭＩ
Ｃを示す構成図である。図３において、３０はＧａＡｓ
基板であり、基板３０には、高出力アンプ部３５および
低雑音アンプ部３６とが形成されている。高出力アンプ
部３５は大きなゲート幅を有するＧａＡｓＭＥＳＦＥＴ
で構成され、低雑音アンプ部３６は、小さなゲート幅を
有するＧａＡｓＭＥＳＦＥＴで構成されている（例え
ば、Ｋ．ＦＵＪＩＭＯＴＯら、「Ａ ｈｉｇｈ ｐｅｒ
ｆｏｒｍａｎｃｅ ＧａＡｓ ＭＭＩＣ ｔｒａｎｓｃ
ｅｉｖｅｒ ｆｏｒ ｐｅｒｓｏｎａｌ ｈａｎｄｙ
ｐｈｏｎｅ ｓｙｓｔｅｍ（ＰＨＳ）」、２５ｔｈ Ｅ
ｕｒｏｐｅａｎ Ｍｉｃｒｏｗａｖｅ Ｃｏｎｆｅｒｅ
ｎｃｅ、Ｐｒｏｃｅｅｄｉｎｇｓ、ｖｏｌ．２、ｐｐ．
９２６−９３０、１９９５など）。FIG. 3 shows a conventional transmission / reception amplifier integrated MMI.
It is a block diagram showing C. In FIG. 3, reference numeral 30 denotes GaAs.
A high-output amplifier 35 and a low-noise amplifier 36 are formed on the substrate 30. The high output amplifier 35 is a GaAs MESFET having a large gate width.
, And the low-noise amplifier 36 is formed of a GaAs MESFET having a small gate width (for example, K. FUJIMOTO et al., “A high per
performance GaAs MMIC transsc
ever for personal handy
phone system (PHS) ", 25th E
european Microwave Confere
nce, Proceedings, vol. 2, pp.
926-930, 1995).
【０００４】[0004]
【発明が解決しようとする課題】しかしながら上記のよ
うな構成では、ＧａＡｓ基板３０の低い熱伝導率（約
０．５Ｗ／ｃｍＫ）の影響で、高出力アンプ部のさらな
る高出力化を図ると、基板温度が上昇し、ＧａＡｓの高
い電子移動度（約６０００ｃｍ・ｃｍ／Ｖｓ）を活かし
た低雑音アンプ部の雑音特性が劣化するという問題が生
じるため、数Ｗから数百Ｗといった高出力タイプの一体
型ＭＭＩＣは、ＧａＡｓでは実現不可能であった。However, in the above-described configuration, when the GaAs substrate 30 has a low thermal conductivity (approximately 0.5 W / cmK), it is necessary to further increase the output of the high-output amplifier. Since the substrate temperature rises and the noise characteristics of the low-noise amplifier part utilizing the high electron mobility (about 6000 cm · cm / Vs) of GaAs deteriorates, a high output type of several W to several hundred W is generated. Integrated MMICs were not feasible with GaAs.
【０００５】本発明は上記問題点に鑑み、受信アンプ部
の低雑音特性の温度劣化を最小限に抑えつつ、送信アン
プ部の飛躍的な高出力化を可能にする半導体装置を提供
するものである。The present invention has been made in view of the above problems, and provides a semiconductor device capable of dramatically increasing the output of a transmission amplifier while minimizing the temperature degradation of the low noise characteristic of the reception amplifier. is there.
【０００６】[0006]
【課題を解決するための手段】上記問題点を解決するた
めに本発明では、ＳｉＣ基板と、前記ＳｉＣ基板上に形
成されたＡｌ（ｘ）Ｉｎ（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ
（０≦ｘ，ｙ≦１）からなるエピタキシャル膜と、前記
ＳｉＣ基板に形成されたパワーアンプ部と、前記エピタ
キシャル膜に形成された低雑音アンプ部とを有する半導
体装置とする。In order to solve the above-mentioned problems, the present invention provides a SiC substrate and an Al (x) In (y) Ga (1-xy) N formed on the SiC substrate.
A semiconductor device includes an epitaxial film (0 ≦ x, y ≦ 1), a power amplifier formed on the SiC substrate, and a low noise amplifier formed on the epitaxial film.
【０００７】また、ＳｉＣ基板と、前記ＳｉＣ基板上に
形成され、かつＳｉＣに格子整合するＡｌ（ｘ）Ｉｎ
（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ（０≦ｘ，ｙ≦１）からな
る第一のエピタキシャル膜と、前記第一のエピタキシャ
ル膜上に形成されたＡｌ（ｘ）Ｉｎ（ｙ）Ｇａ（１−ｘ
−ｙ）Ｎ（０≦ｘ，ｙ≦１）からなる第二のエピタキシ
ャル膜と、前記ＳｉＣ基板上に形成され、かつ上記第一
のエピタキシャル膜をＦＥＴのショットキ−層とするパ
ワーアンプ部と、前記第二のエピタキシャル膜上に形成
された低雑音アンプ部とを有する半導体装置とする。A SiC substrate and Al (x) In formed on the SiC substrate and lattice-matched to SiC.
(Y) a first epitaxial film made of Ga (1-xy) N (0 ≦ x, y ≦ 1); and Al (x) In (y) Ga formed on the first epitaxial film. (1-x
-Y) a second epitaxial film made of N (0 ≦ x, y ≦ 1), and a power amplifier formed on the SiC substrate and using the first epitaxial film as a Schottky layer of the FET; And a low-noise amplifier formed on the second epitaxial film.
【０００８】本発明は上記の構成により、ＳｉＣ上にア
ンプ部を形成し、エピタキシャル膜（たとえばＧａＮ系
半導体材料）上に低雑音アンプ部を形成するので、Ｓｉ
Ｃの高い熱伝導率（約４．９Ｗ／ｃｍＫ）と、ＧａＮ系
材料の高い電子移動度（約１０００ｃｍ・ｃｍ／Ｖｓ）
を同時に活かせるため、高出力送受信一体型ＭＭＩＣが
可能である。According to the present invention, an amplifier section is formed on SiC and a low-noise amplifier section is formed on an epitaxial film (for example, a GaN-based semiconductor material).
High thermal conductivity of C (about 4.9 W / cmK) and high electron mobility of GaN-based material (about 1000 cm · cm / Vs)
, A high-output integrated MMIC is possible.
【０００９】また、高出力用材料としてのＳｉＣは、Ｇ
ａＡｓよりも約１０倍も絶縁破壊電界が大きいため、デ
バイスの耐圧向上・動作電圧向上を可能にし、上記熱伝
導率の効果とともにＧａＡｓの数十倍の高出力化が可能
である。Further, SiC as a material for high output is G
Since the breakdown electric field is about ten times larger than aAs, the breakdown voltage and the operating voltage of the device can be improved, and the output of several tens of times higher than that of GaAs can be achieved together with the effect of the thermal conductivity.
【００１０】さらに、ＧａＮ系材料は、現在単結晶基板
が存在しないためにサファイア基板上などに形成されて
いるが、本発明のＳｉＣ基板上に形成することも可能で
あるため、良好な結晶性が得られる。加えて、ＧａＮ系
材料も、ＳｉＣと同様にワイドギャップ半導体であるた
め、使用可能温度が高くかつリーク電流などの温度に対
する増加量も小さいため、かなり高い温度域においても
低雑音特性を維持できる。Further, although a GaN-based material is formed on a sapphire substrate or the like because a single crystal substrate does not currently exist, it is possible to form a GaN-based material on a SiC substrate of the present invention. Is obtained. In addition, since the GaN-based material is also a wide-gap semiconductor like SiC, it has a high usable temperature and a small increase in temperature, such as leak current, so that low noise characteristics can be maintained even in a considerably high temperature range.
【００１１】[0011]
【発明の実施の形態】以下本発明の一実施例の電界効果
型トランジスタについて、図面を参照しながら説明す
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS A field effect transistor according to one embodiment of the present invention will be described below with reference to the drawings.
【００１２】（実施の形態１）図１は、本発明の第１の
構成による送受信一体ＭＭＩＣを示す構成図である。図
１において、１０はＳｉＣ基板である。ＳｉＣ基板１０
上に、Ａｌ（ｘ）Ｉｎ（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ（０
≦ｘ，ｙ≦１）の混晶材料を用いてエピタキシャル膜１
１が形成されている。具体的には、ＳｉＣ基板１０上
に、ｎ型ＧａＮ層１１ｂからなるチャネル層、およびア
ンドープＡｌ0.2Ｇａ0.8Ｎ層１１ａからなるショットキ
ー層が形成されている。ＧａＮ層１１ａの上には、ゲー
ト電極１６ｓ、ソース電極１６ｇ、ドレイン電極１６ｄ
を有するＭＥＳＦＥＴが形成され、このＦＥＴが低雑音
用のアンプ部１６となっており、ゲート幅は小さい。(Embodiment 1) FIG. 1 is a configuration diagram showing a transmission / reception integrated MMIC according to a first configuration of the present invention. In FIG. 1, reference numeral 10 denotes a SiC substrate. SiC substrate 10
On top, Al (x) In (y) Ga (1-xy) N (0
≦ x, y ≦ 1)
1 is formed. Specifically, on the SiC substrate 10, a channel layer made of the n-type GaN layer 11b and a Schottky layer made of the undoped Al0.2Ga0.8N layer 11a are formed. On the GaN layer 11a, a gate electrode 16s, a source electrode 16g, and a drain electrode 16d
Is formed, and this FET serves as the low-noise amplifier 16 and has a small gate width.
【００１３】１５は高出力アンプ部で、ＳｉＣ基板１０
内に、ｎ＋ソース層、ｎ＋ドレイン層、ｎチャネル層が
形成され、大きなゲート幅を有するＳｉＣＭＥＳＦＥＴ
で構成されている。ソース層、ドレイン層、チャネル層
は、シリコンのイオン注入により形成している。Reference numeral 15 denotes a high-output amplifier, which is a SiC substrate 10
Inside, an n + source layer, an n + drain layer, and an n-channel layer are formed, and a SiC MESFET having a large gate width
It is composed of The source layer, the drain layer, and the channel layer are formed by ion implantation of silicon.
【００１４】このように、高出力用のＭＥＳＦＥＴをＳ
ｉＣ基板に形成することにより、ＳｉＣの高い熱伝導率
を利用できるので、高出力が可能なアンプ部を形成でき
る。また、Ａｌ（ｘ）Ｉｎ（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ
（０≦ｘ，ｙ≦１）であらわされるＧａＮ系半導体にＦ
ＥＴを形成できるため、この材料のもつ高い電子移動度
（約１０００ｃｍ・ｃｍ／Ｖｓ）を活かせるので、雑音
特性のよい低雑音アンプ部を形成できる。As described above, the MESFET for high output is S
By forming on the iC substrate, the high thermal conductivity of SiC can be used, so that an amplifier unit capable of high output can be formed. Also, Al (x) In (y) Ga (1-xy) N
GaN-based semiconductor represented by (0 ≦ x, y ≦ 1)
Since ET can be formed, the high electron mobility (about 1000 cm · cm / Vs) of this material can be utilized, so that a low-noise amplifier having good noise characteristics can be formed.
【００１５】なお、高出力アンプ部１５のＳｉＣＭＥＳ
ＦＥＴの替わりに、さらに動作電圧を高くできるＳｉＣ
ＭＯＳＦＥＴを用いることも可能である。また、上記低
雑音アンプ部のＧａＮ系ＭＥＳＦＥＴの替わりに、さら
に電子移動度を高くできるＡｌＧａＮ／ＩｎＧａＮのヘ
テロ構造ＦＥＴを用いることも可能である。このとき
は、Ｉｎ0.2Ｇａ0.8Ｎ層をチャネル層とし、Ａｌ0.2Ｇ
ａ0.8Ｎ層をバリア層とした構造となり、図４のように
なる。It should be noted that the SiCMEs of the high-output amplifier 15
SiC that can further increase operating voltage instead of FET
It is also possible to use a MOSFET. Also, instead of the GaN-based MESFET in the low noise amplifier section, it is possible to use an AlGaN / InGaN heterostructure FET that can further increase the electron mobility. In this case, the In0.2Ga0.8N layer is used as the channel layer, and the Al0.2G0.8N layer is used.
FIG. 4 shows a structure in which the a0.8N layer is a barrier layer.
【００１６】図４は、低雑音アンプ部４６のヘテロ接合
ＦＥＴを含む構造断面図である。高出力アンプ部１５
は、図１の構成と同じである。ＳｉＣ基板１０上に、ア
ンドープＡｌ０．２Ｇａ０．８Ｎ層４１、アンドープＩ
ｎ０．１Ｇａ０．９Ｎ層４２、アンドープＡｌ０．２Ｇ
ａ０．８Ｎ層４３が形成され、ダブルヘテロ構造となっ
ている。ＡｌＧａＮ４３上には、シリコンデルタドープ
層を含む、アンドープＧａＮ層４４からなるショットキ
ー層が形成され、この層の上に、ゲート電極４６ｇ、ソ
ース電極４６ｓ、ドレイン電極４６ｄが形成されてい
る。FIG. 4 is a structural sectional view of the low noise amplifier section 46 including the heterojunction FET. High output amplifier 15
Is the same as the configuration in FIG. Undoped Al0.2Ga0.8N layer 41, undoped I
n0.1Ga0.9N layer 42, undoped Al0.2G
An a0.8N layer 43 is formed to have a double hetero structure. A Schottky layer composed of an undoped GaN layer 44 including a silicon delta-doped layer is formed on AlGaN 43, and a gate electrode 46g, a source electrode 46s, and a drain electrode 46d are formed on this layer.
【００１７】この構造により、井戸層に電子を閉じ込め
ることができるので、さらに、移動度を高めたヘテロＦ
ＥＴとすることができ、雑音特性も向上する。According to this structure, electrons can be confined in the well layer.
ET can be used, and the noise characteristics are also improved.
【００１８】（実施の形態２）図２は、本発明の第２の
構成による送受信一体ＭＭＩＣを示す構成図である。図
２において、２０はＳｉＣ基板である。基板２０上には
アンドープＡｌ0.2Ｇａ0.8Ｎ層からなる第一エピタキシ
ャル膜２１が成長されている。ＡｌＧａＮ層２１は、Ｓ
ｉＣ基板には、格子整合しないが、ＳｉＣ基板２０上に
格子整合するように組成を選択した、Ａｌ（ｘ）Ｉｎ
（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ（０≦ｘ，ｙ≦１）の混晶
材料を用いて形成してもよい。(Embodiment 2) FIG. 2 is a configuration diagram showing a transmission / reception integrated MMIC according to a second configuration of the present invention. In FIG. 2, reference numeral 20 denotes a SiC substrate. On the substrate 20, a first epitaxial film 21 made of an undoped Al0.2Ga0.8N layer is grown. The AlGaN layer 21 is made of S
Al (x) In which is not lattice-matched to the iC substrate but whose composition is selected so as to lattice-match to the SiC substrate 20.
(Y) It may be formed using a mixed crystal material of Ga (1-xy) N (0 ≦ x, y ≦ 1).
【００１９】２２は第二エピタキシャル膜で、エピタキ
シャル膜２１上に、Ａｌ（ｘ）Ｉｎ（ｙ）Ｇａ（１−ｘ
−ｙ）Ｎ（０≦ｘ，ｙ≦１）の混晶材料を用いて形成さ
れている。具体的には、基板２０上に、アンドープＧａ
Ｎ層２２ｂ、ｎ型Ａｌ0.2Ｇａ0.8Ｎ層２２ａが形成され
ている。Reference numeral 22 denotes a second epitaxial film, on which an Al (x) In (y) Ga (1-x
-Y) It is formed using a mixed crystal material of N (0 ≦ x, y ≦ 1). Specifically, on the substrate 20, undoped Ga
An N layer 22b and an n-type Al0.2Ga0.8N layer 22a are formed.
【００２０】第２のエピタキシャル膜２２には、低雑音
アンプ部２６が形成されている。低雑音アンプ２６は、
ｎ型ＡｌＧａＮ層２２ａをチャネル層としたＭＥＳＦＥ
Ｔであり、小さなゲート幅を有している。In the second epitaxial film 22, a low-noise amplifier 26 is formed. The low noise amplifier 26
MESFE using n-type AlGaN layer 22a as a channel layer
T, which has a small gate width.
【００２１】一方、高出力アンプ部２５にはヘテロ接合
ＦＥＴが形成されており、ＳｉＣ基板２０およびＡｌＧ
ａＮ層２１からなる第一エピタキシャル膜２１内に形成
されている。ＡｌＧａＮ２１とＳｉＣ基板２０との界面
をキャリアが走行する。On the other hand, a heterojunction FET is formed in the high-output amplifier section 25, and the SiC substrate 20 and the AlG
The first epitaxial film 21 is formed in the aN layer 21. Carriers travel on the interface between AlGaN 21 and SiC substrate 20.
【００２２】高出力アンプ部２５では、ＳｉＣよりもさ
らに大きなバンドギャップが実現できるＡｌ（ｘ）Ｉｎ
（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ材料を用いているので、絶
縁破壊電圧が改善されている。またＧａＮ系／ＳｉＣヘ
テロ構造により電子移動度も改善されており、実施形態
１に比べて、利得や効率といった高周波パワーデバイス
特性が向上している。In the high-power amplifier 25, Al (x) In which can realize a band gap larger than that of SiC is used.
(Y) Since the Ga (1-xy) N material is used, the dielectric breakdown voltage is improved. The electron mobility is also improved by the GaN-based / SiC heterostructure, and high-frequency power device characteristics such as gain and efficiency are improved as compared with the first embodiment.
【００２３】さらに実施形態１と同様に、低雑音アンプ
部のＧａＮ系ＭＥＳＦＥＴの替わりに、さらに電子移動
度を高くできるＡｌＧａＮ／ＩｎＧａＮ等のヘテロ構造
ＦＥＴを用いることも可能である。Further, similarly to the first embodiment, it is also possible to use a heterostructure FET such as AlGaN / InGaN which can further increase the electron mobility, instead of the GaN-based MESFET in the low noise amplifier.
【００２４】[0024]
【発明の効果】以上のように本発明による半導体装置
は、ＧａＡｓの約１０倍の高い熱伝導率と絶縁破壊電圧
を有するＳｉＣ基板に高出力アンプ部を形成することに
よって、数十倍の高出力化を実現し、同時にＳｉＣ上に
エピタキシャル成長可能なＧａＮ系材料の高い電子移動
度を活かした低雑音アンプ部を一体形成することによっ
て、従来不可能であった超高出力型の送受信一体ＭＭＩ
Ｃを実現している。特に低雑音アンプ部をワイドギャッ
プ半導体であるＧａＮ系材料での実現により、高い使用
環境温度においても低雑音特性が発揮されるので、今後
さらに需要が拡大するマルチメディア社会の通信用デバ
イスのニーズを担うことができる。As described above, the semiconductor device according to the present invention has a high power amplifier section formed on a SiC substrate having a thermal conductivity and a dielectric breakdown voltage about 10 times higher than that of GaAs. An ultra-high output type integrated transmission / reception MMI, which was impossible in the past, by integrally forming a low-noise amplifier unit utilizing the high electron mobility of a GaN-based material that can be epitaxially grown on SiC while realizing output.
C is realized. In particular, the realization of a low-noise amplifier using a GaN-based material, which is a wide-gap semiconductor, enables low-noise characteristics to be exhibited even at a high operating temperature. Can carry.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明の送受信一体ＭＭＩＣの構成断面図FIG. 1 is a cross-sectional view of the configuration of a transmission / reception integrated MMIC of the present invention.
【図２】本発明の送受信一体ＭＭＩＣの構成断面図FIG. 2 is a sectional view of the configuration of a transmission / reception integrated MMIC of the present invention.
【図３】従来のＭＭＩＣの構成断面図FIG. 3 is a sectional view of the configuration of a conventional MMIC.
【図４】本発明の送受信一体ＭＭＩＣの構成断面図FIG. 4 is a cross-sectional view of a configuration of a transmission / reception integrated MMIC of the present invention.
１０，２０ ＳｉＣ基板 １１ エピタキシャル膜 １５，２５，３５ 高出力アンプ部 １６，２６，３６ 低雑音アンプ部 ２１ 第一エピタキシャル膜 ２２ 第二エピタキシャル膜 ３０ ＧａＡｓ基板 10, 20 SiC substrate 11 Epitaxial film 15, 25, 35 High-power amplifier 16, 26, 36 Low-noise amplifier 21 First epitaxial film 22 Second epitaxial film 30 GaAs substrate
Claims (3)
ａ（１−ｘ−ｙ）Ｎ（０≦ｘ，ｙ≦１）からなるエピタ
キシャル膜と、 前記ＳｉＣ基板に形成されたパワーアンプ部と、 前記エピタキシャル膜に形成された低雑音アンプ部とを
有し、前記パワーアンプ部と、前記低雑音アンプ部とが
同一基板上に形成されている半導体装置。1. An SiC substrate, and an Al (x) In (y) G formed on the SiC substrate.
an epitaxial film made of a (1-xy) N (0 ≦ x, y ≦ 1); a power amplifier formed on the SiC substrate; and a low noise amplifier formed on the epitaxial film. A semiconductor device in which the power amplifier section and the low noise amplifier section are formed on the same substrate.
とＩｎＧａＮ井戸層を含む低雑音アンプ部とする請求項
１に記載の半導体装置。2. The semiconductor device according to claim 1, wherein the epitaxial film is a low-noise amplifier including an AlGaN barrier layer and an InGaN well layer.
るＡｌ（ｘ）Ｉｎ（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ（０≦
ｘ，ｙ≦１）からなる第一のエピタキシャル膜と、 前記第一のエピタキシャル膜上に形成されたＡｌ（ｘ）
Ｉｎ（ｙ）Ｇａ（１−ｘ−ｙ）Ｎ（０≦ｘ，ｙ≦１）か
らなる第二のエピタキシャル膜と、 前記ＳｉＣ基板上に形成され、かつ上記第一のエピタキ
シャル膜をＦＥＴのショットキ−層とするパワーアンプ
部と、 前記第二のエピタキシャル膜上に形成された低雑音アン
プ部とを有し、 前記パワーアンプ部と、前記低雑音アンプ部とが同一基
板上に形成されている半導体装置。3. An SiC substrate, and Al (x) In (y) Ga (1-xy) N (0 ≦) formed on the SiC substrate and lattice-matched to SiC.
x, y ≦ 1), and Al (x) formed on the first epitaxial film.
A second epitaxial film made of In (y) Ga (1-xy) N (0 ≦ x, y ≦ 1); and a first epitaxial film formed on the SiC substrate and Schottky of the FET. A power amplifier section as a layer, and a low noise amplifier section formed on the second epitaxial film, wherein the power amplifier section and the low noise amplifier section are formed on the same substrate. Semiconductor device.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9086394A JP3047852B2 (en) | 1997-04-04 | 1997-04-04 | Semiconductor device |
| CN98101070A CN1131548C (en) | 1997-04-04 | 1998-04-01 | Ohmic electrode forming method and semiconductor device |
| US09/000,544 US6110813A (en) | 1997-04-04 | 1998-04-03 | Method for forming an ohmic electrode |
| US09/400,192 US6274889B1 (en) | 1997-04-04 | 1999-09-21 | Method for forming ohmic electrode, and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9086394A JP3047852B2 (en) | 1997-04-04 | 1997-04-04 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10284507A true JPH10284507A (en) | 1998-10-23 |
| JP3047852B2 JP3047852B2 (en) | 2000-06-05 |
Family
ID=13885668
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9086394A Expired - Fee Related JP3047852B2 (en) | 1997-04-04 | 1997-04-04 | Semiconductor device |
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| Country | Link |
|---|---|
| JP (1) | JP3047852B2 (en) |
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