JPH10270519A - Evaluation of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for evaluating a semiconductor device capable of evaluating the degree of damage of an insulating film in a semiconductor device easily in a short time with high precision. SOLUTION: An MOS(metal oxide semiconductor) capacitor having a substrate, an insulating film formed on the substrate, and electrodes formed on the insulating film is subjected to plasma treatment as an LSI manufacturing process. Then, after the plasma treatment, the IV (current-voltage) characteristic of the MOS capacitor is measured. Then, a voltage lower than the voltage generated by the FN-tunnel current of the MOS capacitor is applied to this MOS capacitor, and a leakage current flowing from the electrode thereof to the substrate is measured. The magnitude of this leakage current is proportional to the degree of the damage of the insulating film due to the plasma treatment so that the degree of the damage thereof can be evaluated. Thus, the degree of the dielectric breakdown damage in case where the semiconductor device is plasma treated is evaluated from this result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for evaluating damage to an insulating film (silicon oxide film) which occurs during plasma processing when manufacturing a semiconductor device such as an LSI, and more particularly to a method for evaluating the damage in a short time. The present invention relates to a semiconductor device evaluation method capable of easily evaluating the size of the semiconductor device.

[0002]

2. Description of the Related Art In recent years, in a plasma process such as an LSI etching process, a resist removing process, and an ion implantation process, an insulating film (silicon oxide film: SiO ₂ ) is broken or damaged by a charge-up phenomenon. That is the problem.

FIG. 7A is a graph showing the distribution of plasma potential on the substrate surface during the plasma processing, and FIG. 7B is a schematic diagram showing the flow of current in the substrate generated by this plasma processing. It is sectional drawing which expands and shows a part of. As shown in FIG. 7A, when performing various plasma treatments on the silicon substrate 22, first, the substrate 22 is
1 and this is placed in the chamber 1 of the plasma processing apparatus.
It is arranged on a support 16 provided in 5. The support 16 is grounded, and the base 21 is the silicon substrate 2.
2 is connected to a power source 17 for applying an RF bias voltage. Accordingly, the RF power is applied to the
When a bias voltage is applied, the silicon substrate 22 also has an RF
A bias voltage is applied.

[0004] As shown in FIG.
2, a gate insulating film 23 is formed thereon, for example, and a plurality of upper electrodes 24 are formed on the gate insulating film 23. The gate insulating film 23 is formed below the upper electrode 24 to have a smaller thickness than other portions.

[0005] When plasma processing is performed on the substrate 22 configured as described above, the plasma potential on the surface of the substrate 22 becomes non-uniform as shown in the graph of FIG. As a result, the electric charge is transmitted from the electrode 24 to the inside of the silicon substrate 22 and moves from a place having a high plasma potential to a place having a low plasma potential. As a result, the upper electrode 24 moves in the direction indicated by the arrow 25.
From the substrate 2 through a thin gate insulating film 23 thereunder.
2, a current flows, causing charge-up damage.

As a method of evaluating the damage of such an insulating film, there is a method of measuring current-voltage characteristics of a device having a MOS (Metal-Oxide-Semiconductor) capacitor structure (IV measuring method) (Hyungcheol Shin et al. "M
odeling Oxide Thickness Dependence of Charging Dam
age by Plasma Processing '' IEEE ELECTRON DEVICE LET
TERS, VOL.14, NO.11, (1993), pp.509-511, Mizutani et al.
"Radiation Damage of SiO ₂ / Si by plasma processes", Applied Physics, Vol. 59, No. 11, (1990), pp.14
96-1501). FIG. 8 is a sectional view showing a MOS capacitor structure used in a conventional IV measurement method. An oxide film (Oxide) 27 is formed on a semiconductor substrate (Semiconductor) 26, and an electrode (Metal) 28 is selectively formed thereon to form a MOS capacitor 29. The oxide film 27 is formed thinner below the electrode 28 than other portions.

[0007] The MOS capacitor 2 thus configured
The IV measurement method using the electrode 9 is to gradually increase the voltage applied to the MOS capacitor 29 and
This is a method for evaluating the damage of the insulating film by measuring the value of the current flowing through the device 6. The measurement can be performed using a device having a simple structure, and the measuring method is simple.

FIG. 9 is a graph showing an example of general IV characteristics with current being plotted on the vertical axis and voltage on the horizontal axis. As shown in FIG. 9, when the voltage applied to the electrode 28 of the MOS capacitor 29 is increased, a leak current 30a is generated. The leak current 30a slightly increases as the voltage value increases until it reaches a certain voltage value. Then, when the voltage exceeds a certain voltage value, the FN tunnel current 30b starts flowing. This FN tunnel current refers to an insulating film (oxide film 27).
Is a phenomenon in which, when a large voltage (electric field) is applied, electrons move to the conduction band of the insulating film due to a tunnel phenomenon, and a current flows.

Thereafter, when the voltage applied to the electrode 28 of the MOS capacitor 29 is further increased, for example, about 12
Irreversible dielectric breakdown 30c occurs by applying a voltage of (MV / cm). In the IV measurement method, a predetermined current value (for example, 5 mA
/ Cm ² )), the damage of the insulating film can be evaluated by measuring the voltage value (GOI voltage) when the voltage reaches the value.

As another method of evaluating the damage of the insulating film, a method of applying a constant current stress to the electrode of the MOS capacitor and measuring the time until the dielectric breakdown (the amount of injected charge) (Q _BD Measurement method) (K. Eriguti et al., “Q
uantitative Evaluation of Gate Oxide Damage during
Plasma Processing Using Antenna-Structure Capacito
rs '', Jpn.J.Appl.Phys., Vol. 33, Part 1, No. 1A, (19
94), pp.83-87).

FIG. 10 is a graph showing a comparison between the time before the breakdown of the device before the plasma treatment and the time after the plasma treatment, with the voltage on the vertical axis and the time on the horizontal axis. . In Figure 10, the time until the plasma pretreatment device to breakdown and T _0, the device after the plasma treatment is a T ₁ the time to dielectric breakdown. When a constant voltage is applied to the MOS capacitor, the current flowing from the electrode to the substrate I, when a and T time to failure, Q _BD can be calculated by I × T.

Further, an EEPROM (Electrically Erasa
ble Programmable Read-Only-Memory) or MNOS (Me
A method of measuring the capacitance-voltage of a tal-Nitride-Oxide-Semiconductor (CV measurement method) is also known (K. Hashimoto et al., "QUANTITATIVE EVALUATION OF CH
ARGE-UP DAMAGE BY USING CURRENT SENSITIVE MOS DIOD
ES '', Proceeding of 13th Dry Process Symposium, (1
991), pp. 93-97). FIG. 11 is a sectional view showing a device having an MNOS structure used in a conventional CV measurement method. An oxide film (O) is formed on a semiconductor substrate (Semiconductor) 31.
xide) 32, and a nitride film 33 is formed thereon. An electrode (Me) is formed on the nitride film 33.
tal) 34 is selectively formed, so that MNOS
A structural device 35 is configured. The oxide film 32
Is formed thinner below the electrode 34 than other portions.

The CV measurement method using the MNOS structure device 35 configured as described above freezes the charge-up voltage received during the plasma processing to obtain a CV (capacitance-
This is a method for evaluating the damage of the insulating film by measuring the voltage.

Further, in CV measurement using the MNOS structure device or the like, a method of measuring a shift of the threshold voltage is also used (Hyungcheol Shin).
`` Spatial Distributions of Thin Oxide Charging
in Reactive Ion Etcher and MERIE Etcher '', IEEE E
LECTRON DEVICE LETTERS, VOL.14, NO.2, (1993), pp.8
8-90).

[0015]

However, the above-described method for measuring the damage of the insulating film has the following problems. For example, generally, the IV characteristic in the FN tunnel region hardly changes at the beginning of plasma damage, but changes abruptly at the final stage of damage, leading to dielectric breakdown. In this case, the measured GOI voltage is a healthy value or a value near zero (dielectric breakdown state), and does not show an intermediate value. Therefore, in the IV measurement method, the magnitude of the damage of the insulating film is determined only in two stages of Good and No-Good, and it is difficult to evaluate the intermediate magnitude of the damage and the continuous magnitude relation of the damage. It is.

In the Q _BD measurement method, since the Q _BD value of each device has a statistical distribution, it is difficult to directly evaluate the magnitude of damage to the insulating film of each device. Further, in order to improve the evaluation accuracy, there is a problem that the time required for the measurement becomes extremely long.

Furthermore, in the CV measurement method, the damage to a device formed in an actual semiconductor device such as a transistor depends on the amount of injected charge.
It is not possible to directly compare the result of the V measurement with the damage to the device formed on the actual semiconductor device. That is, for example, the length of the plasma irradiation time cannot be compared with the magnitude of the damage to the insulating film for evaluation. Furthermore, in this CV measurement method, the device memorizes the maximum charge-up voltage applied during the plasma processing. Therefore, when the plasma changes with time, the damage of the insulating film is accurately evaluated. It is not possible.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and the degree of damage to an insulating film of a semiconductor device can be easily evaluated in a short time. The aim is to provide a method.

[0019]

A method of evaluating a semiconductor device according to the present invention includes a semiconductor substrate, an insulating film formed on the semiconductor substrate, and an electrode formed on the insulating film. After plasma processing of the MOS capacitor, a leakage current generated by applying a voltage lower than a voltage at which an FN tunnel current occurs in the current-voltage characteristic of the MOS capacitor to the MOS capacitor is measured, and the plasma processing of the semiconductor device is performed. The degree of dielectric breakdown damage of the semiconductor device is evaluated by a leak current of the MOS capacitor.

In the present invention, in the current-voltage characteristics of the MOS capacitor, a voltage lower than the voltage at which the FN tunnel current is generated is applied to the MOS capacitor, and the leakage current generated at that time is measured. In the present invention, the magnitude of the leak current in the voltage measurement region depends on the magnitude of the damage to the insulating film of the MOS capacitor and changes continuously depending on the magnitude of the damage. Therefore, this makes it possible to evaluate the degree of damage to the insulating film of the MOS capacitor with high accuracy. Then, the degree of dielectric breakdown damage of the semiconductor device when the semiconductor device is subjected to plasma processing can be evaluated by the value of the leak current.

Further, in the present invention, since the current-voltage characteristic of the MOS capacitor is used, a semiconductor device can be easily evaluated with a device having a simple structure.
The measuring time can be significantly reduced as compared to conventional measuring methods.

In the MOS capacitor, the thickness of the insulating film is 10 to 300 ° and the electrode has an area of 1 to 1,000,000 times the area of the insulating film. Is preferably 5 to 70% of the breakdown voltage of the MOS capacitor.

Since the insulating film of a generally used semiconductor device usually has a thickness of 10 to 300.degree., In the present invention, the same thickness as the insulating film of the semiconductor device to be evaluated is used. It is preferable to use a MOS capacitor having the following. In the present invention, the area ratio of the electrode to the area of the insulating film (antenna ratio) is preferably 1 to 1,000,000 times in the present invention, corresponding to the antenna ratio of a normal semiconductor device.

Further, the voltage for measuring the leak current is MO
If the breakdown voltage of the S capacitor is less than 5%, it becomes difficult to evaluate the degree of damage to the insulating film with high accuracy. On the other hand, when the measured voltage exceeds 70% of the breakdown voltage of the MOS capacitor, the FN tunnel current starts to be generated, and the leak current value at the measured voltage approaches,
It becomes difficult to evaluate the degree of damage to the insulating film with high accuracy. Therefore, in the present invention, it is desirable to measure the leak current at a voltage of 5 to 70% of the breakdown voltage of the MOS capacitor.

In the present invention, appropriate conditions for the plasma processing can be designed based on the evaluation result of the degree of dielectric breakdown damage of the insulating film.

As described above, instead of evaluating the semiconductor device by measuring the charge-up voltage during the plasma processing, the damage of the insulating film caused by the charge-up is directly evaluated. This makes it easy to compare with the damage that the insulating film has. Therefore, the plasma processing conditions when performing the plasma processing on the semiconductor device can be appropriately set depending on the degree of the damage.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for evaluating a semiconductor device according to the present invention will be described with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing a MOS capacitor structure used in the semiconductor device evaluation method according to the present embodiment. Also,
FIG. 2A is a plan view showing a wafer on which a chip is formed, and FIG. 2B is an enlarged plan view showing the chip.

First, as shown in FIG. 2A, for example,
A plurality of chips 6 are formed on the entire surface of an 8-inch wafer 7, and an evaluation wafer is manufactured. Each of these chips 6 has a MOS
A device having a capacitor structure has been formed. The MOS capacitor structure of the device used in this embodiment will be described below. As shown in FIG. 1, a field insulating film 2 is selectively formed on a surface of a p-type silicon substrate 1 serving as a lower electrode, thereby defining an element region. The gate insulating film 3 is formed on the surface of the partitioned element region with a thickness smaller than the field insulating film 2 (for example, a thickness of 90 °). Further, on the gate oxide film 3, an upper electrode 4 made of polysilicon is formed. Thus, a MOS capacitor structure is formed.

In this embodiment, as shown in FIG. 2B, the upper electrode 4 is formed by processing the polysilicon film so that a plurality of separated electrodes having different areas are formed.
Thereby, each evaluation device A, B, C, D, and E is set to 1
One chip 6 was formed. That is, a device subjected to plasma processing under various conditions is assumed by changing the ratio (antenna ratio) of the area of the upper electrode (antenna) 4 to the area of the gate portion (gate oxide film 3) of the insulating film. did. Table 1 below shows the antenna ratio of each evaluation device.

[0030]

[Table 1]

Next, the wafer 7 is subjected to plasma processing (etching, resist removal, ion implantation, etc.) as an LSI manufacturing process. In the present embodiment, the wafer 7 was set in a plasma etching apparatus, and this was subjected to an etching process under predetermined conditions (gas type, gas pressure, high-frequency plasma power, and bias electrode). The etching time was set to a time during which half of the thickness of the upper electrode 4 was etched.

Next, the etched wafer is placed in a prober evaluation apparatus, and the IV (current-voltage) characteristics of each device are measured. FIG. 3 is a graph showing the IV characteristics of each device in one chip 6 on the wafer 7. The symbols in FIG. 3 indicate each device symbol. F indicates a device on a wafer that has not been subjected to plasma processing.
It is known that when the conditions of the plasma processing are constant, the magnitude of the charge-up damage to the gate insulating film 3 of each device is proportional to the antenna area (antenna ratio). Therefore, in this embodiment, the result is the same as the result of evaluating the IV characteristics of the insulating film subjected to the plasma treatment under different conditions and having received the charge-up damage of different sizes.

As shown in FIG. 3, a large current flows through the device A by applying a low voltage. This indicates that the gate insulating film of the device A has already caused dielectric breakdown. In addition, the devices B to E do not cause dielectric breakdown, but generate a leak current at a voltage lower than the FN tunnel current. Further, the device F has no leakage current.

FIG. 4 is a graph showing the value of the leak current generated in each device, with the ordinate representing the leak current value and the abscissa representing the antenna ratio. That is, FIG. 4 shows the leakage current value with respect to the antenna ratio when a voltage of 10 V is applied to the gate insulating film of each device. As shown in FIG. 4, the leakage current value increases in proportion to the magnitude of the antenna ratio, that is, the amount of damage due to charge-up.

On the other hand, in the FN tunnel region, devices B to E have almost the same IV characteristics as device F as shown in FIG. Therefore, according to the conventional technique of evaluating the damage of the insulating film by measuring the GOI voltage, the degree of damage received by the devices B to E cannot be evaluated, and the device A (No-g
ood) and devices B to F (G
ood). Further, since the devices B to E are determined to have no damage (Good), which is the same as the device F in which the insulating film is not damaged, the detection accuracy of the damage is low.

In this embodiment, as shown in FIG.
The difference between the devices B to E and the device F can be clearly evaluated, and the degree of damage between the devices B to E can also be determined. Therefore, the charge-up damage received by the device can be evaluated with high accuracy as a continuous change in damage. Therefore, for example, by evaluating the degree of damage to the insulating film when the plasma processing is performed on the MOS capacitor under various conditions, the plasma processing conditions in the actual semiconductor device manufacturing process can be appropriately set.

As described above, when the plasma processing conditions are constant, the degree of damage to the insulating film is proportional to the antenna ratio and does not depend on the structure of the device. The degree of damage to the insulating film can be evaluated using a three-layer evaluation device. However, the structure of the evaluation device is not limited to the structure shown in FIG. 1, and in the present invention, evaluation devices having various MOS capacitor structures can be used.

FIGS. 5 and 6 are sectional views showing examples of the structure of an evaluation device that can be used in the method for evaluating a semiconductor device according to the present invention. In the devices shown in FIGS. 5 and 6, the same components as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In the evaluation device shown in FIG. 5, a photoresist 9 is selectively formed on the polysilicon film 8 before the upper electrode 4 shown in FIG. 1 is processed. Also,
In the evaluation device shown in FIG. 6, an interlayer insulating film 10 is formed on the entire surface including the upper electrode 4 and the field oxide film 2, and the interlayer insulating film 10 has a contact hole 10a in a region matching the gate insulating film 3. And a metal film 11 filling the contact hole 10a is formed on the interlayer insulating film 10.

With the evaluation device configured as described above, the degree of damage to the insulating film can be evaluated as in the evaluation device shown in FIG.

In this embodiment, the charge-up damage during the etching process was measured using a plasma etching apparatus. However, in the present invention, other plasma processing such as a resist removal (ashing) apparatus or an ion It is possible to measure charge-up damage at the time of removing a resist using an implantation apparatus or at the time of ion implantation.

Further, in this embodiment, a voltage is applied to each device from zero voltage to a voltage at which the undamaged MOS capacitor breaks down, and the I
The characteristics of each device were evaluated by V characteristics. But,
In the present invention, a predetermined voltage smaller than the voltage at which the FN tunnel current of the MOS capacitor is generated, for example, 10
It is also possible to measure only a leak current generated when a voltage of V is applied. This voltage can be set, for example, in the range of 5 to 70% of the breakdown voltage of the MOS capacitor. By doing so, the measurement time can be significantly reduced.

[0043]

As described in detail above, according to the present invention,
Using a MOS capacitor, a voltage lower than the voltage at which the FN tunnel current occurs in the current-voltage characteristic of the MOS capacitor is applied to the MOS capacitor, and the generated leakage current is measured. Therefore, the insulating film of the MOS capacitor is damaged. Can be evaluated with high accuracy, and the value of the leak current allows the degree of dielectric breakdown damage of the semiconductor device when the semiconductor device is subjected to plasma processing to be evaluated with high accuracy. Further, since the MOS capacitor used in the present invention has a simple structure, the evaluation method can be simplified, and the evaluation time can be significantly reduced.

When the insulating film of the MOS capacitor and the antenna ratio are appropriately set and the voltage for measuring the leakage current is appropriately selected, the actual semiconductor device can be strictly compared with the actual semiconductor device, and the damage evaluation accuracy can be improved. Can be improved.

Further, if the conditions of the plasma processing are selected based on the evaluation result of the degree of dielectric breakdown damage of the insulating film, the plasma processing conditions in the actual semiconductor device manufacturing process can be appropriately designed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a MOS capacitor structure used in a semiconductor device evaluation method according to the present embodiment.

2A is a plan view showing a wafer on which chips are formed, and FIG. 2B is an enlarged plan view showing the chips.

FIG. 3 is a graph showing IV characteristics of each device in one chip 6 on a wafer 7;

FIG. 4 is a graph showing a leak current value generated in each device, with a vertical axis indicating a leak current value and a horizontal axis indicating an antenna ratio.

FIG. 5 is a cross-sectional view showing a structural example of an evaluation device that can be used in the semiconductor device evaluation method according to the present invention.

FIG. 6 is a cross-sectional view showing another example of the structure of the evaluation device that can be used in the semiconductor device evaluation method according to the present invention.

FIG. 7A is a graph showing the distribution of plasma potential on the substrate surface during the plasma processing, and a schematic view showing the flow of current in the substrate generated by the plasma processing, and FIG. It is sectional drawing which expands and shows a part.

FIG. 8 is a cross-sectional view showing a MOS capacitor structure used in a conventional IV measurement method.

FIG. 9 is a graph showing an example of general IV characteristics, with the vertical axis representing current and the horizontal axis representing voltage.

FIG. 10 is a graph showing a comparison of a time before a device before plasma treatment and a device after a plasma treatment until dielectric breakdown occurs, with the voltage on the vertical axis and the time on the horizontal axis.

FIG. 11 shows MNOS used in a conventional CV measurement method.
It is sectional drawing which shows the device of a structure.

[Explanation of symbols]

 1, 22, 26, 31; substrate 2: field insulating film 3, 23; gate insulating film 4, 24; upper electrode 6; chip 7, wafer 8; polysilicon film 9, photoresist 10, interlayer insulating film 11; Film 21; Substrate 28, 34; Electrode 29; MOS capacitor 30a; Leakage current 30b; FN tunnel current 30c; Dielectric breakdown 32; Oxide film 33; Nitride film 35; ;device

Claims (3)

[Claims] An MOS capacitor having a semiconductor substrate, an insulating film formed on the semiconductor substrate, and an electrode formed on the insulating film is subjected to plasma processing, and then the current-voltage of the MOS capacitor is changed. The leakage current generated by applying a voltage lower than the voltage at which the FN tunnel current occurs in the characteristics to the MOS capacitor is measured, and the degree of dielectric breakdown damage of the semiconductor device when the semiconductor device is subjected to plasma processing is determined by the leakage of the MOS capacitor. An evaluation method of a semiconductor device, wherein the evaluation is performed by a current. 2. The MOS capacitor according to claim 1, wherein the thickness of the insulating film is 10 to 300 °, and the electrode has an area of 1 to 1,000,000 times the area of the insulating film. The voltage to be applied is
2. The method according to claim 1, wherein the voltage is 5% to 70% of a dielectric breakdown voltage of the capacitor. 3. The method for evaluating a semiconductor device according to claim 1, wherein an appropriate condition of the plasma processing is designed based on an evaluation result of a degree of dielectric breakdown damage of the insulating film.