JPH10247716A - Manufacturing method of lead frame for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid the decline in the solder wettability of Pd or Pd alloy film, by a method wherein a lead frame formed of Pd or Pd alloy film on a platelike raw material in water solution of an electrolyte is used as a cathode to make a potential difference from an anode for producing hydrogen, by supplying a current for a specific time in a specific density. SOLUTION: In a water solution containing an electrolyte, a lead frame formed of a Pd2 film or Pd alloy film on a planner raw material is assumed as a cathode to make a potential difference from an anode as the counter electrode to reform the lead frame, by the hydrogen produced by supplying a current for a specific time in a specific density. In such a constitution, the decline in the solder wettability of Pd or Pd alloy film can be avoided by restoring an oxide formed by the high temperature thermal stress, in the junction time of a semiconductor device to a metal by the reducing action of the hydrogen absorbed in the Pd film 2 or Pd alloy film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a lead frame for a semiconductor device.

[0002]

2. Description of the Related Art FIG. 3 is a plan view showing a general semiconductor device lead frame on which semiconductor devices such as transistors and ICs are mounted, and FIG. 4 is a mounting state diagram showing a state where the semiconductor device is mounted. . 3 and 4, reference numeral 4 denotes a pad portion; 5, an inner lead portion; 6, an outer lead portion;
Is a tie bar, 8 is a semiconductor chip as a semiconductor device, 9
Is an adhesive, 10 is an electrode pad, 11 is a wire, and 12 is a sealing resin.

The arrangement, characteristics, and the like of the semiconductor device lead frame having the above configuration will be described.

In FIG. 3, a plurality of inner lead portions 5 are arranged around a pad portion 4 on which a semiconductor chip 8 is mounted, separated from the pad portion 4, and this inner lead portion 5 is connected via a tie portion 7 to an outer lead portion 6. Is linked to A lead frame for a semiconductor device having a shape as shown in FIG.
It is obtained by subjecting a plate-shaped material made of an alloy or an Fe-Ni alloy to a press working or an etching working. The pad portion 4 and the inner lead portion 5 are partially plated with a noble metal such as Ag to a thickness of about 3 to 5 μm to prevent oxidation.

The mounting of the semiconductor chip 8 on such a semiconductor device lead frame is generally performed in the following process. That is, as shown in FIG. 4, a semiconductor chip 8 is die-bonded on the pad portion 4 using an adhesive 9, and the electrode pad 10 and the inner lead portion 5 previously applied to the semiconductor chip 8 are made of Au, It is electrically connected by wire bonding with the Al or Cu wire 11.

After that, the portion including the wire-bonded portion is sealed with a sealing resin 12 such as an epoxy resin. Next, solder plating such as Sn-Pb alloy is applied to the outer lead portion 6 to impart solderability, and after cutting the tie bar portion 7, the outer lead portion 6 is subjected to a deburring process.
The semiconductor device sealed with resin (resin-sealed semiconductor device) is completed. The resin-encapsulated semiconductor device manufactured as described above is mounted on an external device substrate such as a printed circuit board, and a desired electronic device circuit is formed by necessary wiring on the substrate and soldering of the outer lead portion 6.

The plating process on the outer lead portion 6 is usually performed by a hot-dip plating method or an electroplating method. However, the hot-dip plating method requires a high temperature treatment of about 230 to 400 ° C. Due to strong thermal stress, a minute gap may be generated between the sealing resin 12 and the lead frame, and the reliability of the resin-sealed semiconductor device may be reduced. Also, in the case of the electroplating method, since the plating solution to be used is generally acidic or alkaline, the sealing resin 12 is partially eroded, and the plating solution penetrates into the sealing resin 12 so that the wires 11 and the electrodes are formed. Corrosion may occur in the pad 10, and the reliability of the resin-encapsulated semiconductor device may decrease.

As described above, since the reliability of the resin-encapsulated semiconductor device is deteriorated, recently, Sn
Solder PPF (Pre-Plat) which is solder plated with Pb alloy etc. and then mounts the semiconductor chip on the lead frame
ed Frame, pre-plated frame). However, when using the solder PPF method, it is necessary to set low-temperature bonding conditions such that the heat does not melt the Sn-Pb alloy at the time of wire bonding in a later step, and the plate material is made of Cu material. In the case, Sn-Pb of impurity ions contained in the Cu material
It is necessary to consider the soldering of the outer lead portion 6 due to the heat diffusion to the alloy.

Therefore, in recent years, a lead frame in which a Pd film or a Pd alloy film is formed on the pad portion 4, the inner lead portion 5, and the outer lead portion 6 (see JP-A-59-168659 and JP-A-63-2358). , Pd and a plate material to provide an intermediate layer
A corrosion-resistant lead frame with reduced migration (see Japanese Patent Application Laid-Open No. 2-42753) and a lead frame with improved solder wettability by forming a thin Au or Ag plating film on a Pd film or a Pd alloy film ( Japanese Unexamined Patent Publication (Kokai) No. 4-115558), a lead frame in which cracks during bending are prevented by providing an underlayer such as Ni, Zn, and Sn between a plate-like material and a noble metal such as Pd. No. 117898), a Ni layer, a Pd layer and an Au layer are sequentially laminated on a plate-shaped material,
d is a lead frame having a multilayer structure (JP-A-7-169)
No. 901) has been proposed.

The Pd film or Pd alloy film is made of Ag, A
Since it is the same noble metal as u and the like, it is chemically stable and hardly oxidized, and there is almost no influence of thermal diffusion by the lead frame body. Therefore, good bonding property of the semiconductor chip 8,
Since it has good wire bonding property and good solder wettability, the solderability of the outer lead portion 6 is also good. Furthermore, since the Pd film or the Pd alloy film is formed on the entire surface of the lead frame, there is an advantage that the process can be simplified and the quality can be stabilized.

[0011]

However, the conventional lead frame for a semiconductor device has the following problems.

That is, in recent years, the demands on the characteristics of semiconductor devices have been stricter year by year.
The d film or the Pd alloy film is chemically stable and has a generally satisfactory level of wire bonding properties, but may produce unsatisfactory results for increasingly stringent requirements. For example, although there is no particular problem in the bonding property and wire bonding property of the semiconductor chip 8, the Pd film or the Pd alloy film of the outer lead portion 6 can be said to be a noble metal due to high temperature thermal stress at the time of bonding the semiconductor chip 8. An oxidation reaction occurs, which causes a decrease in solder wettability in a subsequent step, and causes a problem in solderability. That is, it becomes difficult to cover the required solder wetting area, and the immersion time in the solder bath increases to reduce the wetting speed, and the workability decreases, and in severe cases, no solder wetting occurs. Had problems. In particular, with the recent increase in the density of semiconductor devices, the space between the outer lead portions 6 has become narrower, and at the time of reflow joining with cream solder in surface mounting, the solder wettability is poor. There is also a problem that the current flows and a bridge between the wirings is generated and the circuit is short-circuited. Of course, it is possible to reduce the degree of bridge generation to some extent by reducing the amount of cream solder applied, but another problem occurs. That is, the application amount of the cream solder is reduced due to the decrease in the amount of the applied cream solder, and the gap between the outer lead portion 6 and the external device substrate may cause a case where no bonding is performed at all, resulting in an open electronic device circuit. A point occurs.

In this method of manufacturing a lead frame for a semiconductor device, it is necessary to be able to manufacture a lead frame for a semiconductor device in which the solder wettability of a Pd film or a Pd alloy film formed on a plate-like material is prevented from being reduced. Have been.

The present invention provides a method for manufacturing a lead frame for a semiconductor device capable of manufacturing a lead frame for a semiconductor device in which the solder wettability of a Pd film or a Pd alloy film formed on a plate-like material is prevented from being reduced. The purpose is to provide.

[0015]

In order to solve this problem, a method of manufacturing a lead frame for a semiconductor device according to the present invention comprises:
In an aqueous solution containing an electrolyte, a lead frame for a semiconductor device in which a Pd film or a Pd alloy film is formed on a plate-like material is used as a cathode, a potential difference is formed between the lead frame and an anode of a counter electrode, and a predetermined applied current is applied for a predetermined processing time. A structure is provided in which a lead frame for a semiconductor device is reformed by hydrogen generated by passing a current having a high density.

Thus, the Pd formed on the plate-shaped material
A method for manufacturing a lead frame for a semiconductor device capable of manufacturing a lead frame for a semiconductor device in which a decrease in solder wettability of the film or the Pd alloy film is prevented.

[0017]

DETAILED DESCRIPTION OF THE INVENTION The invention according to claim 1 of the present invention is characterized in that a lead frame for a semiconductor device having a Pd film or a Pd alloy film formed on a plate-like material in an aqueous solution containing an electrolyte is used as a cathode, A potential difference is formed between the anode of the counter electrode and a current having a predetermined applied current density for a predetermined processing time, and the lead frame for a semiconductor device is reformed by hydrogen generated by flowing a current having a predetermined current density. However, it is considered that an oxide formed by high-temperature thermal stress at the time of joining a semiconductor device (for example, a semiconductor chip) is restored to a metal by a reducing action of hydrogen absorbed by the Pd film or the Pd alloy film, Alternatively, it has the effect of preventing the solder wettability of the Pd alloy film from being lowered.

According to a second aspect of the present invention, in the first aspect, the electrolyte is A + -B- (A is Li, Na,
At least one group selected from Mg, K and Ca, B
Is a compound represented by at least one group selected from CN, OH, SO ₄ , NO ₃ , and CO ₃ ), and the Pd film or the Pd alloy film is sufficiently modified. It has the action of:

The invention according to claim 3 is the invention according to claim 1 or
2. The method according to claim 2, wherein a predetermined applied current is applied during a predetermined processing time.
The quantity of electricity, which is a value obtained by multiplying the density, is 0.1 to 1.0 AM /
dm ^Two(A is ampere, M is minute)
By electrolysis based on the quantity of electricity, a Pd film or
Has the effect of sufficiently modifying the Pd alloy film.
I do.

[0020] In the invention according to the fourth aspect, in an aqueous solution containing an electrolyte, a P-layer is formed on a plate-like material via a base coat.
A semiconductor device lead frame on which a d film or a Pd alloy film is formed is used as a cathode, a potential difference is formed between the semiconductor device and a counter electrode, and a current having a predetermined applied current density flows for a predetermined processing time. Although the mechanism is not clear, the oxide formed by the high-temperature thermal stress at the time of bonding the semiconductor device reduces the hydrogen absorbed by the Pd film or the Pd alloy film. It is considered that the Pd film or the Pd alloy film is restored to the metal by the action, and has a function of preventing a decrease in the solder wettability of the Pd film or the Pd alloy film.

According to a fifth aspect of the present invention, in the fourth aspect, the electrolyte is A + -B- (A is Li, Na,
At least one group selected from Mg, K and Ca, B
Is a compound represented by at least one group selected from CN, OH, SO ₄ , NO ₃ , and CO ₃ ), and the Pd film or the Pd alloy film is sufficiently modified. It has the action of:

The invention according to claim 6 is the invention according to claim 4 or
5. The method according to claim 5, wherein a predetermined applied current is applied during a predetermined processing time.
The quantity of electricity, which is a value obtained by multiplying the density, is 0.1 to 1.0 AM /
dm ^Two(A is ampere, M is minute)
By electrolysis based on the quantity of electricity, a Pd film or
Has the effect of sufficiently modifying the Pd alloy film.
I do.

The invention according to claim 7 is the invention according to claims 4 to 6
In the invention described in any one of the above, the undercoat film is made of Ni, and has an effect of preventing a decrease in solder wettability of the Pd film or the Pd alloy film due to an antioxidant effect of the material.

An embodiment of the present invention will be described below with reference to FIGS. (Embodiment 1) FIG. 1 is a schematic sectional view of a semiconductor device lead frame for illustrating a method of manufacturing a semiconductor device lead frame according to Embodiment 1 of the present invention. FIG.
FIG. 4 is a schematic sectional view showing a modification of the semiconductor device lead frame of FIG. 1. 1 and 2, reference numeral 1 denotes a copper material as a plate-like material, 2 denotes a Pd film, and 3 denotes a Ni base film.

A method of manufacturing the semiconductor device lead frame shown in FIG. 2 among the semiconductor device lead frames configured as described above will be described. The method for manufacturing the lead frame for a semiconductor device in FIG. 1 may be similar to the method for manufacturing the lead frame for a semiconductor device in FIG.

First, alkali electrolytic degreasing and acid activation are performed on a lead frame made of copper material 1 by a conventional method.
The undercoat 3 was formed to a thickness of 2.0 μm, and a Pd plating film was formed thereon to a thickness of 0.1 μm. Here, the alkaline electrolytic degreasing is performed by using NC Rastol (registered trademark of Okuno Pharmaceutical Co., Ltd.) having a concentration of 60 g / l as a electrolytic solution (NaOH 30 g /
l), using stainless steel for the anode, bath temperature 50 ° C,
The treatment was performed at an applied voltage of 5 V for 15 seconds. The acid activity was immersed in a 3% sulfuric acid solution at a bath temperature of 50 ° C. for 15 seconds.
Ni plating is performed using a nickel sulfamate bath at a bath temperature of 5%.
The test was performed at 0 ° C. and an average current density of 10 A / dm ² . The Pd plating was performed using a K-Pure Palladium (registered trademark) bath manufactured by Kojima Chemical Co., at a bath temperature of 50 ° C. and an average current density of 6 A / dm ^2.
I went in.

Next, a 2% KCN solution was used as the electrolyte, stainless steel was used as the anode, and a bath temperature of 50 ° C., an applied voltage of 5 V, and an applied current density of 2.0 A / dm ² for 0.5 minutes (M). Was done.

Next, a method of measuring the solderability of the plating film of the semiconductor device lead frame of FIGS. 1 and 2 manufactured as described above will be described. First, the plated lead frame for a semiconductor device is heated on a hot plate at 330 ° C. for 60 seconds in the air, and then only the outer lead portion 6 (see FIGS. 3 and 4) of the lead frame for the semiconductor device is cut and soldered. And attached to the mounting test device, according to JIS C 0053
The zero cross time was measured by a soldering test method according to a prescribed balance method. The soldering test apparatus used was SWET100 made of Tartin, and the conditions were as follows:
20 ° C., solder composition 60% Sn-40% Pb, falling speed 10 mm / sec, rising speed 2 mm / sec
c, The immersion time was measured at 0.2 sec. The flux is rosin R-100 (manufactured by Nippon Alpha Metals)
Was used.

The measurement results are shown in Table 1 as Test Example 1. In Test Example 1, the applied current density was 2.0 A in an electrolyte in which the cation of the electrolyte was K and the anion of the electrolyte was CN.
This indicates that the solderability is 0.6 sec when the electrolysis is performed for 0.5 minutes (M) at / dm ² to modify the semiconductor device lead frame. The shorter the time, the better the solderability.

[0030]

[Table 1]

In Test Examples 2 to 5 in Table 1, the applied current density was 2.0 A / dm ² and the treatment time was 0 in an electrolyte solution in which the cation was K and the anions were OH, SO ₄ , NO ₃ , and CO _3. 5 shows the solderability when the lead frame for a semiconductor device is modified by performing electrolysis for 5 minutes, and Test Examples 6 and 7 in Table 1 show electrolysis of Li as the cation, OH as the anion, and SO _{4 as} the anion. This shows the solderability when a lead frame for a semiconductor device is modified by performing electrolysis in a liquid at an applied current density of 2.0 A / dm ² and a processing time of 0.5 minute.

Test results obtained by further changing the conditions are shown as Test Examples 8 to 27 (Table 2), (Table 3), and (Table 4).
Shown in

[0033]

[Table 2]

[0034]

[Table 3]

[0035]

[Table 4]

In Test Examples 8 and 9 in Table 2, the cation was Li.
To improve the solderability when a lead frame for a semiconductor device is modified by performing electrolysis in an electrolyte of NO ₃ or CO ₃ with an applied current density of 2.0 A / dm ² and a processing time of 0.5 minute. Test Examples 10 to 14 in Table 2 show that the cation is N
In a, the applied current density is 2.0 A / dm ² in the electrolyte of CN, OH, SO ₄ , NO ₃ , and CO ₃ where the anion is an anion, and the treatment time is 0.
5 shows the solderability when the lead frame for a semiconductor device is modified by performing electrolysis for 5 minutes.

In Test Examples 15 and 16 in Table 3, the applied current density was 2.0 A / dm ² , and the treatment time was 0.5 minute in an electrolyte solution in which the cation was Mg and the anion was SO ₄ or NO _3. Shows the solderability when the lead frame for a semiconductor device is modified by performing the electrolysis in Table 3. Test Example 17 in Table 3 shows that the applied current density was 2 in an electrolyte solution in which the cation was Ca and the anion was NO _3. .
This shows the solderability when the electrolysis is performed at 0 A / dm ^{2 for} a processing time of 0.5 minute to modify the lead frame for a semiconductor device.

Further, in Test Examples 18 to 21 in Table 3, the applied current density was 1.0 A, 0.5 A, 0.2 A, 0.1 A / dm in an electrolyte solution in which the cation was K and the anion was CN. ² shows the solderability when the electrolysis is performed for 1.0 minute, 2.0 minutes, 0.5 minutes, and 1.0 minute to modify the lead frame for a semiconductor device.

Further, Test Example 22 in Table 4 shows the solderability when the lead frame for a semiconductor device was not modified, and Test Examples 23 to 27 in Table 4 showed that the cation was K. When the applied current density is 2.0 in an electrolyte where the anion is CN
A, 2.0A, 1.0A, 0.5A, 0.1A / d
m ² , processing time 1.0 minute, 2.0 minutes, 2.0 minutes, 3.0
5 shows the solderability when the lead frame for a semiconductor device is modified by performing electrolysis for 0.5 minute and 0.5 minute.

It is considered that the solderability of 1.0 or less is sufficient. However, this is satisfied in Test Examples 1 to 21 and not in Test Examples 22 to 27. As can be seen from a comparison between Test Examples 1 to 21 and Test Examples 22 to 27, the amount of electricity, which is a value obtained by multiplying the processing time by the applied current density, is 0.1 to 1.0 AM / dm ² (A is ampere, M ), The solderability becomes 0.6 sec which is 1.0 sec or less.

This is due to lack of hydrogen generated by electrolysis.
Oxide is converted to metal by moderate and not excessive reduction
It is presumed to be restored. Therefore, the semiconductor device
The conditions for reforming lead frames for Li, Na, M
g, K, any one cation selected from Ca
CN, OH, SO_Four, NO_Three, CO_ThreeSelected from
The amount of electricity is 0.1 in an electrolytic solution comprising the one anion.
1 to 1.0 AM / dm ^TwoSubject to the electrolysis of
I just need.

In the present embodiment, P
Although the lead frame for a semiconductor device having the d film 2 is shown, a similar effect can be obtained by using, for example, a 42% Ni-Fe alloy material instead of the copper material. Although the Ni film 3 is interposed between the copper material 1 and the Pd film 2, the same effect can be obtained by using, for example, Sn-Ni instead of Ni. Furthermore, although the case where the Pd film 2 is formed on the copper material 1 is shown, a similar effect can be obtained by using a Pd alloy film (for example, Pd-Ag) as a metal other than the Pd film 2.

As described above, according to the present embodiment, in the aqueous solution (electrolyte solution) containing the electrolyte, the P
The lead frame for a semiconductor device on which the d film 2 or the Pd alloy film is formed is used as a cathode, a potential difference is formed between the lead frame and the anode of the counter electrode, and a current having a predetermined applied current density is caused to flow for a predetermined processing time, thereby producing a semiconductor. Since the device lead frame is modified, an oxide formed by high-temperature thermal stress at the time of joining a semiconductor device (for example, a semiconductor chip) is reduced by hydrogen absorbed by the Pd film 2 or the Pd alloy film. Can be restored to metal, Pd
It is possible to prevent the solder wettability of the coating 2 or the Pd alloy coating from decreasing. Further, by interposing a metal other than the Pd composition or a metal other than the Pd alloy composition such as Ni as an intermediate film between the Pd film 2 or the Pd alloy film and the copper material 1, the material can be prevented from being oxidized, and the solder wettability can be improved. Can be prevented from decreasing.

[0044]

As described above, according to the method of manufacturing a lead frame for a semiconductor device of the present invention, an oxide formed by a high-temperature thermal stress at the time of joining a semiconductor device (for example, a semiconductor chip) is converted into a Pd film or a Pd alloy. It is considered that the metal is restored to the metal by the reduction action of hydrogen absorbed in the film,
Since it is possible to prevent the solder wettability of the Pd film or the Pd alloy film from being lowered, it is possible to realize a semiconductor device lead frame in which the solder wettability is prevented from being lowered due to high-temperature thermal stress at the time of joining the semiconductor device. An advantageous effect is obtained.

The electrolyte is A + -B- (A is Li, N
a, at least one group selected from Mg, K, and Ca, and B is at least one group selected from CN, OH, SO ₄ , NO ₃ , and CO ₃ ). The advantageous effect that the film or the Pd alloy film can be sufficiently modified can be obtained.

Further, the quantity of electricity, which is a value obtained by multiplying a predetermined processing time by a predetermined applied current density, is 0.1 to 1.0 AM / dm.
By setting ² (A is amperage and M is minute), an appropriate reduction action by hydrogen can be performed, and the advantageous effect that the Pd film or the Pd alloy film can be sufficiently modified can be obtained. Can be

Further, in an aqueous solution containing an electrolyte, a lead frame for a semiconductor device in which a Pd film or a Pd alloy film is formed on a plate-like material via a base film as a cathode,
By reforming the semiconductor device lead frame by hydrogen generated by forming a potential difference between the counter electrode and a current having a predetermined applied current density for a predetermined processing time,
It is considered that the oxide formed by the high temperature thermal stress at the time of joining the semiconductor device is restored to the metal by the reducing action of the hydrogen absorbed in the Pd film or the Pd alloy film.
Since it is possible to prevent a decrease in the solder wettability of the d film or the Pd alloy film, it is possible to realize a lead frame for a semiconductor device in which a decrease in the solder wettability due to high-temperature thermal stress at the time of joining the semiconductor device is prevented. An advantageous effect is obtained.

Further, when the electrolyte is A + -B- (A is Li, N
a, at least one group selected from Mg, K, and Ca, and B is at least one group selected from CN, OH, SO ₄ , NO ₃ , and CO ₃ ). The advantageous effect that the film or the Pd alloy film can be sufficiently modified can be obtained.

Further, the quantity of electricity, which is a value obtained by multiplying a predetermined processing time by a predetermined applied current density, is 0.1 to 1.0 AM / dm.
By setting ² (A is amperage and M is minute), an appropriate reduction action by hydrogen can be performed, and the advantageous effect that the Pd film or the Pd alloy film can be sufficiently modified can be obtained. Can be

Further, since the base film is made of Ni, there is obtained an advantageous effect that a lead frame for a semiconductor device in which the solder wettability of the Pd film or the Pd alloy film is prevented from being lowered due to the effect of preventing oxidation of the material can be obtained. Can be

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a semiconductor device lead frame for describing a method of manufacturing a semiconductor device lead frame according to a first embodiment of the present invention;

FIG. 2 is a schematic cross-sectional view showing a modified example of the semiconductor device lead frame of FIG. 1;

FIG. 3 is a plan view showing a general semiconductor device lead frame on which semiconductor devices such as transistors and ICs are mounted.

FIG. 4 is a mounting state diagram showing a state in which the semiconductor device is mounted.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Copper material (plate-shaped material) 2 Pd film 3 Ni film (base film) 4 Pad part 5 Inner lead part 6 Outer lead part 7 Tie bar part 8 Semiconductor chip (semiconductor device) 9 Adhesive 10 Electrode pad 11 Wire 12 Sealing resin

Claims (7)

[Claims] In an aqueous solution containing an electrolyte, a lead frame for a semiconductor device having a Pd film or a Pd alloy film formed on a plate-like material is used as a cathode, and a potential difference is formed between the lead frame and an anode of a counter electrode. A method for manufacturing a lead frame for a semiconductor device, comprising reforming the lead frame for a semiconductor device with hydrogen generated by flowing a current having a predetermined applied current density for a time. 2. The method according to claim 1, wherein the electrolyte is A + -B- (A is Li, Na,
At least one group selected from Mg, K and Ca, B
2. The method according to claim 1, wherein the compound is a compound represented by at least one group selected from CN, OH, SO ₄ , NO ₃ , and CO ₃ ). 3. 3. An electric quantity, which is a value obtained by multiplying the predetermined processing time by the predetermined applied current density, is 0.1 to 1.0 AM / dm.
^{3. The method according} to claim 1, wherein A is ampere and M is minute. 4. A lead frame for a semiconductor device in which a Pd film or a Pd alloy film is formed on a plate-like material via a base film in an aqueous solution containing an electrolyte is used as a cathode, and a potential difference between the lead frame and an anode of a counter electrode is determined. A method of manufacturing a lead frame for a semiconductor device, comprising reforming the lead frame for a semiconductor device with hydrogen generated by flowing a current having a predetermined applied current density for a predetermined processing time. 5. The method according to claim 1, wherein the electrolyte is A + -B- (A is Li, Na,
At least one group selected from Mg, K and Ca, B
5. The method according to claim 4, wherein the compound is a compound represented by at least one group selected from CN, OH, SO ₄ , NO ₃ , and CO ₃ ). 6. 6. An electric quantity, which is a value obtained by multiplying said predetermined processing time by said predetermined applied current density, is 0.1 to 1.0 AM / dm.
² (A ampere, M is minute) A method of manufacturing a semiconductor device lead frame according to claim 4 or 5, characterized in that a. 7. The method for manufacturing a lead frame for a semiconductor device according to claim 4, wherein said undercoat is made of Ni.