JPH10243559A - Method of adjusting filter of device having higher harmonic wave suppressive function - Google Patents

Abstract

PROBLEM TO BE SOLVED: To adjust the cut off frequency of a high-pass filter for setting of higher harmonic waves compensating current so that it may be a minimum current distortion factor at all times. SOLUTION: The distribution of higher harmonic waves is obtained by extracting the components of higher harmonic waves of the system (load) current by the high-pass filter 43 of the same operation formula as the higher harmonic wave detecting high-pass filter 32 and 35 of active filters and Fourier-analyzing it with an FFT circuit 47, and the general compensation factor of high frequency is obtained with an arithmetic circuit 48, and the cut off frequency of a filter 43 is decided with a circuit 49 so that the general compensation factor may be maximum, and when the cut off frequency is decided finally, each cut off frequency of the filters 32 and 35 is adjusted to the decided cut off frequency. This adjustment is performed, for example, in every ten minutes so that it may come to the minimum current distortion factor at all times.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter adjustment method for minimizing current distortion by changing the cutoff frequency of a high-pass filter of a device having a harmonic suppression function such as an active filter or a flicker compensator at regular intervals. About.

[0002]

2. Description of the Related Art Active filters (harmonic suppression devices)
The flicker compensator detects the load current, detects a harmonic component in the load current with a high-pass filter, and sets the harmonic compensation current as a set value. Therefore, it is important to set the cutoff frequency of the high-pass filter in these devices having the harmonic suppression function. The current cutoff frequency is 30
In many cases, the frequency is fixedly set to any one of 200 Hz to 200 Hz.

[0003]

If the cut-off frequency of the high-pass filter of the active filter is set low, a certain amount of low-order harmonics such as an ineffective component and a negative-phase component will also pass, so that the apparatus will be purely harmonic. Without compensating only for the current, low-order harmonic currents such as a certain amount, an ineffective component, and a negative component are compensated.

[0004] On the other hand, the load current of general consumers includes 5,
Very often, low-order even-order harmonic components such as second and fourth-order harmonics are included in addition to odd-order harmonics such as 7, 11,.

From the viewpoint of removing current waveform distortion, it is ideal to remove all distortions other than the fundamental wave. On the other hand, in a conventional place where the cutoff frequency is set to a low value and there are many high-order harmonic components, the capacity of the active filter is also used for compensating for the ineffective component of the fundamental wave. The harmonic compensation capacity decreases.

Conversely, in the case of a load current having a high cut frequency and a high content of low-order harmonics, these low-order harmonics are not compensated for, and the effect of improving waveform distortion is reduced.

The same can be said for a high-pass filter for detecting a harmonic current of a flicker compensator for compensating for a flicker voltage by suppressing a reactive current, a harmonic current, a negative-phase current and the like.

The present invention has been made in view of such conventional problems, and has as its object to provide a harmonic current suppressing function capable of always minimizing current distortion or voltage distortion. An object of the present invention is to provide a method for adjusting a filter of a device.

[0009]

According to the present invention, a load (detection) is provided.
In an active filter, a flicker compensator, or the like, which detects only a harmonic component from a current with a high-pass filter and sets a harmonic compensation current to suppress the harmonic current, the same arithmetic expression as the high-pass filter for detecting the harmonic current is used. A high-pass filter is used to detect the harmonic current component of the load current at regular intervals, Fourier-analyze the harmonics to find the harmonic distribution, find the total harmonic compensation ratio, and maximize this. Is calculated, and the cutoff frequency of the high-pass filter for setting the harmonic compensation current is adjusted so as to always have the minimum current distortion rate.

[0010]

FIG. 1 shows an active filter (A).
5 shows an operation block F). In the figure, 1 is a power supply angular frequency detection circuit for detecting the angular frequency ω of the power supply voltage, 2 is a DC voltage control unit for controlling the DC voltage (capacitor voltage) of the AF main circuit, 3 is a harmonic suppression control loop, 5 is An output current limiter for limiting the current command value from the harmonic suppression control loop 3 to limit the output current; 6, a subtractor for detecting a deviation between the current command value from the limiter 5 and the AF output current (detection) value;
Is a PWM control circuit that compares the deviation current with the triangular wave from the carrier generation circuit 7 and controls the gate of the switch element of the AF main circuit using the PWM signal.

The power supply angular frequency detection circuit 1 has a power supply voltage value V
_The digital filter 11 removes distortion of the power supply voltage from _{u to WW,} and the PLL circuit 12 detects the angular frequency ω from the distortion-free power supply voltage and outputs the angular frequency ω to the phase conversion circuits 31 and 39 of the high frequency suppression control loop 3. It is configured.

The DC voltage control unit 2 includes a PI voltage controller 21 for performing PI calculation of a deviation between a command value Vcset of the capacitor voltage and a detection value Vcdet, and a limiter 2 for limiting the output of the PI voltage controller 21.
The signal from the limiter 22 is output to the subtractor 37 of the high-pass filter 35 of the harmonic suppression control loop 3.

The harmonic suppression control loop 3 includes a three-phase / two-phase conversion circuit 31 for converting system current (load current) values I _{U to} I _W into two-phase currents Id and Iq on the dq axes, and a low-frequency component of the current Id. And a high-pass filter 32 comprising a subtractor 34 for subtracting the output from the current Id.
a high-pass filter 35 comprising a low-pass filter 36 and the output from the subtracter 37 and the adder 38 subtracted from the current Iq for determining the fundamental wave component of q, harmonic content from the AC component Id ^~ and the high-pass filter 35 from the high-pass filter 32 limiter a compensation current command value I _CU ~I _CW signal is converted into a 3-phase signal Iq ^~ the applied from the DC voltage controller 2 to 5
, And a two-phase / three-phase conversion circuit 39 for outputting to
(There is no difference from the conventional AF).

Reference numeral 4 denotes a cutoff frequency calculator for determining the cutoff frequencies of the high-pass filters 32 and 35 of the harmonic suppression control loop 3, a sample-and-hold circuit 41 for sampling the load current values I _{U to} I _W , A high-pass filter having the same arithmetic expression as the high-pass filters 32 and 35 including a time-series data set circuit 42 for reading data, a low-pass filter 44 for obtaining a fundamental wave of the load current from the data, and a subtractor 45 for subtracting the output from the load current. A filter 43, a time-series data set circuit 46 for reading data of harmonics detected by the filter, and an FFT circuit 4 for obtaining a harmonic distribution by Fourier-analyzing the harmonics.
7, a compensation rate calculating circuit 48 for calculating the total compensation rate of each harmonic, and a cutoff frequency for maximizing the total compensation rate to determine the cutoff frequency of the high-pass filter 43. And a frequency decision circuit 49 for changing the cutoff frequency of the high-pass filters 32 and 35 of the harmonic suppression control loop 3 composed of:

Next, the cutoff frequency calculation flow will be described with reference to FIG. At 101, the load current data is read, at 102, the cut-off frequency f of the high-pass filter 43 is initially set to 10, the initial counter value and the initial compensation value are input at 103 and 104, and at 105, the load current data is stored in a file. The input, the filter output is read at 106, FFT analysis is performed at 107, and the compensation rate H = √ at 108.
_{^{(I 2 2 + I 3 2}} ... I n 2) / I 1 of the performed operation (I _1: fundamental current effective value, I ₂ ² ... second harmonic current effective value, I _n ² ... n th
Next, the compensation rate H> Hn is determined at 109, and if no, the counter value is changed to X = X + 1, and 1
At 13, X> 200 is determined. If no, the cutoff frequency of the high-pass filter 43 is changed to f = f + 10, and the processing is repeated from 105.

_If the determination result of H> Hn of 109 is "yes", the cutoff frequency f and the compensation ratio H at that time are stored in 110 and 111, and the counter value is changed to X = X in 112.
When the determination result of 113>X> 200 is no, the cutoff frequency of the high-pass filter 43 is changed to f = f + 10 at 114, and the set value of Hn at 109 is changed to the compensation rate value stored at 111. Then, the processing is repeated from 105, and the best cutoff frequency f and the compensation rate H are stored at 110 and 111.

The judgment of 109 is repeated 200 times, and 11
If the determination result of X> 200 of 3 is yes, the cutoff frequency fm of the high-pass filters 32 and 35 is set to the best cutoff frequency stored in 110, and the process ends at 115.

After ending at 115, it is confirmed that 10 minutes have elapsed at 116, and the above processing is restarted from the beginning.
Adjust the cut-off frequency f _m of the high-pass filter 43 for each frequency, setting a cut-off frequency f _m of the high-pass filter 32 and 35.

As described above, the load current is changed to F every predetermined time.
The FT analysis is performed to determine the harmonic distribution, the overall compensation rate is determined, and the cutoff frequency that maximizes this is automatically calculated and set, so the active filter is controlled to always have the minimum current distortion rate. it can.

[0020] The low-order harmonics upon compensation laden load current in Figure 3, the cut-off frequency f _m is 30Hz and 200H
The result example in the case of z is shown. According to FIG. 3, f _m = 200
It can be seen that low order harmonics are not removed at Hz and waveform distortion is large.

Although the active filter has been described above, since the flicker compensator includes the same block as the active filter, it can be used for optimizing flicker compensation.

[0022]

Since the present invention is configured as described above, the following effects can be obtained.

(1) The cutoff frequency of the harmonic suppression function can be changed at regular intervals so as to always minimize the current distortion factor.

(2) As a result, even if the distribution of the harmonic content changes due to a load change or the like, the minimum distortion rate can be controlled.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of an active filter operation control unit according to an embodiment.

FIG. 2 is a flowchart for calculating a cutoff frequency of a high-pass filter.

FIG. 3 is a current waveform diagram showing experimental results when cutoff frequencies are 30 Hz and 200 Hz.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Power supply angular frequency detection circuit 2 ... DC voltage control part 3 ... Harmonic suppression control loop 4 ... Cut-off frequency calculation part 8 ... PWM control circuit 32, 35, 43 ... High-pass filter 41 ... Sample hold circuit 42, 46 ... Sequence data set circuit 47: Fourier analysis circuit (FFT circuit) 48: Compensation ratio calculation circuit 49: Cutoff frequency determination circuit

Claims (1)

[Claims] 1. A filter adjustment method for a device having a harmonic suppression function, wherein a high-pass filter detects only a harmonic current component from a load current signal and suppresses the harmonic as a set value of a harmonic compensation current. Using a high-pass filter having the same arithmetic expression as the high-pass filter, a harmonic current component of the load current is detected at regular intervals, and a total compensation ratio of the harmonic is obtained. And setting this as a cutoff frequency of a high-pass filter for setting the harmonic compensation current.