JPH10242277A - Manufacture of semiconductor device, and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To get an interlayer insulating film which is favorable in flatness and film quality. SOLUTION: A gate insulating film 2, a gate electrode 3, and source and drain regions 4 are formed on an Si substrate 1 so as to achieve a MOS transistor. Then, a silicon oxide film 5 is made all over the surface of the device, and thereon an organic SOG film 6 is made, and then boric ions are implanted into this SOG film 6 under such condition that they reach a base silicon oxide film 5. By doing it this way, the adhesive strength between a reformed SOG film and the silicon oxide film 5 increases, and the reformed SOG film becomes hard to peel off.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device, and more particularly to a technique for forming an interlayer insulating film on a device.

[0002]

2. Description of the Related Art In recent years, in order to further increase the degree of integration of semiconductor integrated circuits, it has been required to advance wiring miniaturization and multilayering. In order to multi-layer the wiring, an interlayer insulating film is provided between each wiring, but if the surface of the interlayer insulating film is not flat, a step is generated in the wiring formed on the upper part of the interlayer insulating film and a failure such as disconnection may occur. Is caused.

Therefore, the surface of the interlayer insulating film (that is, the surface of the device) must be as flat as possible. As described above, a technique for planarizing the surface of a device is called a planarization technique, and has become more and more important with miniaturization and multilayering of wiring. In the planarization technology, there is an SOG film as an interlayer insulating film that is frequently used. In particular, active study has been made on a planarization technology using a flow characteristic of an interlayer insulating film material.

[0004] SOG is a general term for a solution in which a silicon compound is dissolved in an organic solvent, and a film mainly composed of silicon dioxide formed from the solution. To form an SOG film, first, a solution in which a silicon compound is dissolved in an organic solvent is dropped on a substrate, and the substrate is rotated. Then, the film of the solution is formed thicker in the concave portion and thinner in the convex portion, so as to relieve the step on the substrate formed by the wiring. As a result, the surface of the coating of the solution is planarized.

[0005] Next, when heat treatment is performed, the organic solvent evaporates and the polymerization reaction proceeds to form an SOG film having a flat surface. As shown in the general formula (1), the SOG film has an inorganic S containing no organic component in the silicon compound.
There are an OG film and an organic SOG film containing an organic component in a silicon compound as represented by the general formula (2).

[SiO ₂ ] _n ... (1) [R _X SiO _Y ] _n ... (2) (n, X, Y: integers, R: alkyl group or aryl group) In addition to containing a large amount of hydroxyl groups, it is more fragile than a silicon oxide film formed by a CVD (Chemical Vapor Deposition) method, and when the film thickness is 0.5 μm or more, cracks tend to occur during heat treatment. is there.

On the other hand, in the organic SOG film, the occurrence of cracks in the heat treatment is suppressed, and the film thickness can be reduced to about 0.5 to 1 μm. Therefore, if an organic SOG film is used,
An interlayer insulating film having a large thickness can be obtained, and sufficient flattening can be performed even on a large step on the substrate. As described above, the inorganic SOG film and the organic SOG film have extremely excellent flatness. However, as described above, the inorganic SOG film contains a large amount of moisture and hydroxyl groups, and thus has an adverse effect on metal wiring and the like. May cause problems such as deterioration of electrical characteristics and corrosion.

[0008] Although the organic SOG film is less than the inorganic SOG film, the organic SOG film also has the same problem because it contains moisture and hydroxyl groups. Therefore, usually, when an SOG film is used as an interlayer insulating film, a silicon film formed by, for example, a plasma CVD method has a high insulating property and a high mechanical strength in addition to a property of relatively blocking moisture and a hydroxyl group. An insulating film such as an oxide film is interposed in the upper or lower layer of the SOG film (for example, see Japanese Patent Application Laid-Open No. 5-226334 (H01L21 / 3205)).

[0009]

However, the silicon oxide film and the SOG film have poor adhesion, and they are separated after manufacturing or during the manufacturing process, thereby deteriorating the insulating characteristics. There is a damaging problem.
The present invention relates to a method for manufacturing a semiconductor device, and aims to obtain an interlayer insulating film having good flatness and film quality, and to enhance the reliability of the semiconductor device.

[0010]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: adding an impurity to an upper insulating film in an insulating film having at least a two-layer structure; It is introduced under the condition that it is reached. The method of manufacturing a semiconductor device according to claim 2 includes a step of forming a first insulating film on the semiconductor substrate, a step of forming a second insulating film on the first insulating film, Second
Introducing an impurity into the insulating film under the condition that the impurity reaches at least an interface with the first insulating film.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a first insulating film on a semiconductor substrate;
Forming a second insulating film on the first insulating film, and introducing an impurity into the second insulating film under a condition that the impurity reaches at least an interface with the first insulating film. And forming a third insulating film on the second insulating film.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device, an insulating film having at least a two-layer structure is formed on a metal wiring member formed on a semiconductor substrate, and impurities are added to the upper insulating film. The impurity is introduced under the condition that it passes through the interface with the lower insulating film and reaches at least the metal wiring member. The method of manufacturing a semiconductor device according to claim 5 includes a step of forming a metal wiring member on the semiconductor substrate, and a step of forming a first insulating film on the metal wiring member.
Forming a second insulating film on the first insulating film; and removing impurities from the second insulating film by passing the impurities through an interface with the first insulating film. And introducing the same under conditions that reach the wiring member.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a metal wiring member on a semiconductor substrate; and forming a first insulating film on the metal wiring member.
Forming a second insulating film on the first insulating film; and removing impurities from the second insulating film by passing the impurities through an interface with the first insulating film. The method includes a step of introducing under conditions that reach the wiring member, and a step of forming a third insulating film on the second insulating film.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device, the metal wiring member has a laminated structure in which a titanium film is formed on a main wiring member. Claim 8
In the method of manufacturing a semiconductor device, the metal wiring member has a laminated structure in which a titanium film and a titanium nitride film are sequentially formed on a main wiring member. In a method of manufacturing a semiconductor device according to a ninth aspect, the main wiring member is made of aluminum alone or an aluminum alloy.

According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor device, the impurity is introduced under such a condition that the number of impurities passing through the interface per unit area is 2 × 10 ¹³ atoms / cm ² or more. Things. In the method of manufacturing a semiconductor device according to the present invention, the impurity is introduced under such a condition that the number of impurities passing through the interface per unit area is 2 × 10 ¹⁸ atoms / cm ² or less. .

In a twelfth aspect of the present invention, in the method of manufacturing a semiconductor device, a silicon oxide material containing 1% or more of carbon atoms is used as the upper insulating film or the second insulating film. According to a thirteenth aspect of the present invention, in the method of manufacturing a semiconductor device, an inorganic SOG is used as the upper insulating film or the second insulating film. According to a fourteenth aspect of the present invention, the lower insulating film or the first insulating film is formed of a film having lower hygroscopicity than the upper insulating film or the second insulating film.

In the method of manufacturing a semiconductor device according to a fifteenth aspect, the step of introducing the impurity imparts kinetic energy to the impurity and introduces the impurity into the film, as in an ion implantation method. A method of manufacturing a semiconductor device according to claim 16 uses boron ions as the impurity.

A semiconductor device according to claim 17 includes a first insulating film formed on a semiconductor substrate, and a second insulating film formed on the first insulating film. An impurity is introduced into the first insulating film and the second insulating film, and the profile of the impurity is continuous between the first insulating film and the second insulating film. The number of impurities introduced into one insulating film is 2 × 10 ¹³ atoms / cm ² or more.

Further, in the semiconductor device according to the present invention, the second insulating film is made of a silicon oxide material containing 1% or more of carbon atoms. The semiconductor device according to claim 19 uses inorganic SOG as the second insulating film. Further, in the semiconductor device according to claim 20, the first insulating film is formed in a state where the impurity is not introduced.
It is made of a film having a lower hygroscopicity than the insulating film.

That is, by introducing impurities into the upper insulating film or the second insulating film by a technique such as ion implantation, the film is modified, so that moisture and hydroxyl groups contained in the film are reduced and the film is reduced. Is less likely to absorb moisture, but in addition, the adhesion strength with the lower insulating film, the first insulating film, the third insulating film, or the like in contact with the upper insulating film or the second insulating film is increased. Note that the upper insulating film and the second insulating film are preferably made of a silicon oxide material containing 1% or more of carbon atoms.

In particular, in the lower insulating film (first insulating film) and the upper insulating film (second insulating film), impurities are extremely introduced by introducing them at least at the interface between them. High adhesion strength can be obtained.
The number of impurities per unit area passing through the interface is 2 × 1
It is most effective to introduce impurities under the condition of 0 ¹³ atoms / cm ² or more.

Further, by introducing an impurity such as boron into a wiring member such as titanium under the insulating film, the wiring resistance is reduced, and as a result, the film thickness of the wiring member can be reduced. . In addition, since boron ions have a relatively small mass, when implanted with the same implantation energy, boron ions can be implanted thicker (deeper) than heavy ion species, and the effect of modifying the insulating film is extremely high. Are better.

Further, according to the semiconductor device of the present invention, the profile of the impurity is continuous between the first insulating film and the second insulating film, and the number of impurities introduced into the first insulating film is two. By setting it to at least × 10 ¹³ atoms / cm ² , the first
The adhesion strength between the insulating film and the second insulating film is increased. Note that the second insulating film is preferably a silicon oxide material containing 1% or more of carbon atoms.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) A manufacturing method according to a first embodiment of the present invention will be described with reference to FIGS. Step 1 (see FIG. 1A): A gate oxide film 2 (film thickness: 10) is formed on a (100) p-type (or n-type) single crystal silicon substrate 1.
nm) and a gate electrode 3 (thickness: 200 nm). Then, an n-type (or p-type) is formed on the substrate 1 by ion implantation using the gate oxide film 2 and the gate electrode 3 as a mask.
By doping the impurities, the source / drain regions 4 are formed in a self-aligned manner to complete the MOS transistor.

Further, after a silicon oxide film 21 is formed on the entire surface of the device by the CVD method, a contact hole 22 is formed in the silicon oxide film 21 on the source / drain region 4. Thereafter, an aluminum alloy film (Al-S) is formed on the entire surface of the device including the inside of the contact hole 22 by using a sputtering method.
i (1%)-Cu (0.5%)), and anisotropic etching is performed so that the aluminum alloy film has a desired pattern to form a source / drain electrode (source / drain wiring) 10. Form.

Step 2 (see FIG. 1B): A silicon oxide film 5 (film thickness:
(500 nm). The gases used in this plasma CVD method are monosilane and nitrous oxide (SiH ₄ + N _2).
O), monosilane and oxygen (SiH ₄ + O ₂ ), TEOS
(Tetra-ethoxy-silane) and oxygen (TEOS + O ₂ ), and the film formation temperature is 300 to 900 ° C.

Step 3 (see FIG. 1C): silicon oxide film 5
An organic SOG film 6 is formed on the substrate. The composition of the organic SOG film 6 is [CH ₃ Si (OH) ₃ ], and its thickness is 600 nm.
It is. First, an alcohol-based solution of a silicon compound having the above composition (for example, IPA + acetone)
Is dropped on the substrate 1 to rotate the substrate at a rotational speed of 2300 rpm.
For 20 seconds to form a coating of this solution on the substrate 1. At this time, the film of the alcohol-based solution is formed so as to be thicker in the concave portion and thinner in the convex portion than the step on the substrate 1 so as to reduce the step. As a result, the surface of the film of the alcohol-based solution is flattened. The organic SOG film 6 formed in this manner contains 1% of carbon atoms.
A silicon oxide material including the above.

Next, in a nitrogen atmosphere, 100 ° C. for 1 minute, 200 ° C. for 1 minute, 300 ° C. for 1 minute, 22 ° C.
For 1 minute and then at 300 ° C for 30 minutes.
As the alcohol system evaporates, the polymerization reaction proceeds and an organic SOG film having a flat surface and a thickness of 300 nm is formed. The organic SOG film 6 having a thickness of 600 nm is obtained by repeating this film formation-heat treatment operation once more.

Then, boron ions (B ⁺ ) are accelerated by ion implantation at an acceleration energy of 140 KeV and a dose of:
The organic SOG film 6 is doped under the condition of 1 × 10 ¹⁵ atoms / cm ² . The conditions are as follows: the organic SOG film 6 and the silicon oxide film 5
Is set so that the number of boron ions per unit area passing through the interface with the substrate is 2 × 10 ¹³ atoms / cm ² or more.

As described above, by implanting ions into the organic SOG film 6, the organic components in the film are decomposed, and the moisture and hydroxyl groups contained in the film are reduced. Further, the adhesion strength with the insulating film such as the silicon oxide film 5 which is in contact with the film is increased. As a result, the organic SOG film 6 is changed to an SOG film (hereinafter, referred to as a modified SOG film) 7 containing no organic components, containing only a small amount of moisture and hydroxyl groups, and having high adhesion strength to the insulating film.

Step 4 (see FIG. 2A): A silicon oxide film 8 (thickness: 200 nm) is formed on the modified SOG film 7 by using a plasma CVD method. The conditions for forming the silicon oxide film 8 are the same as those for the silicon oxide film 5. Step 5 (see FIG. 2B): Anisotropic etching using a mixed gas of carbon tetrafluoride and hydrogen as an etching gas to form via holes 9 in each of the films 5, 7, 8 on the source / drain regions 4. I do.

Step 7 (see FIG. 2C): After cleaning the inside of the via hole 9 by sputter etching using an inert gas (for example, Ar), the inside of the via hole 9 and the silicon oxide film 8 are removed by magnetron sputtering.
An Al alloy film (Al-Si (1%)-Cu (0.
5%)) (500 nm thick), Ti film (50 nm thick)
And a TiN film (film thickness: 20 nm) are sequentially formed from below.

Then, the aluminum alloy film, the Ti film and the TiN film are patterned into a predetermined shape by applying a resist (not shown), exposing, and etching by a usual lithography technique and a dry etching technique (RIE method or the like). Then, the upper metal wiring 23 is formed. As described above, in the present embodiment, the interlayer insulating film 11 having a three-layer structure including the silicon oxide film 5, the modified SOG film 7, and the silicon oxide film 8 is formed on the MOS transistor. Accordingly, the thickness of the interlayer insulating film 11 can be increased, and sufficient flatness can be achieved even with a large step on the substrate 1.

Incidentally, the modified SOG is formed by each of the silicon oxide films 5 and 8.
The sandwich structure in which the film 7 is interposed is employed to further increase the insulating property and the mechanical strength of the interlayer insulating film 11 as a whole. In the present embodiment, when ions are implanted into the organic SOG film 6, impurities having a predetermined surface density (number per unit area) or more pass through the interface with the silicon oxide film 5 as described above. As a result, the modified SOG film 7 is hardly peeled off from the silicon oxide film 5.

Table 1 shows a tensile strength test apparatus for measuring the adhesion strength between the SOG film and the silicon oxide film 5 using a test device (1) in which an SOG film (600 nm in thickness) was formed on the silicon oxide film 5. It shows the results of evaluation using the above.

[0036]

[Table 1]

The condition column in Table 1 shows the condition used as the SOG film. What is low pressure oxygen plasma treatment?
The G film was exposed to oxygen plasma. The modified SOG film is formed under the same conditions as in the present embodiment. As described above, in the case where the modified SOG film is used as the SOG film, the adhesion strength to the underlying silicon oxide film 5 is increased, and the film does not peel.

FIG. 3 shows a test device (1) similar to that shown in Table 1.
In this example, the adhesion strength when boron (B ⁺ ) ions were implanted into the SOG film under different conditions was measured. The dose was fixed at 1 × 10 ¹⁵ atoms / cm ² and the acceleration energy was changed to 20, 60, 100 and 140 KeV, respectively. In the figure, "Unimplanted" indicates an ion-implanted one, that is, an organic SOG film.

As described above, those without ion implantation are S
Although the adhesion strength between the OG film and the silicon oxide film 5 is low and easily peeled off, the ion-implanted one increases the adhesion strength as the acceleration energy becomes higher.
Above KeV, an adhesive strength exceeding 700 kgf / cm ² can be obtained. It is considered that this improvement in the adhesion strength was caused by ions reaching the interface between the SOG film and the silicon oxide film 5 and mixing and recombination of elements at the interface.

FIG. 4 shows an SOG film and an underlying plasma TEOS.
FIG. 4 is a diagram showing an impurity profile of boron (B) in an oxide film (silicon oxide film 5). Referring to FIG. 4, it can be seen that the boron impurity concentration distribution in the SOG film and the boron impurity concentration distribution in the plasma TEOS oxide film (PE-TEOS) are continuous. This is because impurities are ion-implanted into the SOG film so that boron passes through the interface between the SOG film and the underlying plasma TEOS oxide film. As in the case of implanting boron, Ar
When impurity ions are implanted, an impurity profile is continuously formed between the SOG film and the underlying plasma TEOS oxide film as shown in FIG.

FIG. 6 shows the result of measuring the relationship between the number of boron ions per unit area passing through the interface between the SOG film and the silicon oxide film 5 per unit area and the adhesion strength.
When the number of boron ions per unit area passing through the interface between the G film and the silicon oxide film 5 is set to 2 × 10 ¹³ atoms / cm ² or more, the boron ion passing through the interface between the SOG film and the silicon oxide film 5 It can be seen that the adhesion strength sharply increases, and the rate at which film peeling occurs decreases extremely.

If the number of boron ions per unit area passing through the interface is more than 2 × 10 ¹⁸ atoms / cm ² , the effect of sputtering becomes too large and the surface is shaved. The number of ions per unit area is desirably 2 × 10 ¹⁸ atoms / cm ² or less. In the test device, the number of boron ions per unit area passing through the interface is 2 × 10 ¹³ atoms.
/ Cm ² or more, the dose amount should be 1 × 10
^The acceleration energy needs to be 60 KeV or more at ¹⁵ atoms / cm ² .

FIG. 7 shows the relationship between the applied energy and the adhesion strength when the implantation energy of boron, the dose amount of boron, the film thickness of SOG at the time of boron implantation, and the dose amount of argon are respectively changed. Here, the applied energy means the energy per unit area given to the region of the implantation depth by the implanted ions.

As is apparent from FIG. 7, when the applied energy is 10 ³ eV / nm ³ or more, the adhesion strength between the SOG film and the silicon oxide film 5 sharply increases, and the rate at which film peeling occurs becomes extremely high. It can be seen that it decreases. Therefore, in order to effectively prevent the SOG film from peeling off from the silicon oxide film 5, it is desirable to set the applied energy to 10 ³ eV / nm ³ . Further, as shown in FIG. 7, it can be seen that even when argon (Ar) is used as the implanted ions, the adhesion strength can be improved as in the case of boron (B).

Table 2 shows that the SOG film (600 nm thick)
2 shows results of evaluation of the adhesion strength between the silicon oxide film 8 and the SOG film using a test device (2) having the silicon oxide film 8 formed thereon over a tensile strength test apparatus.

[0046]

[Table 2]

The condition column in Table 2 shows the condition used as the SOG film. What is low pressure oxygen plasma treatment?
The G film was exposed to oxygen plasma. The ion implantation was performed before forming the silicon oxide film 8. As described above, in the case where the modified SOG film is used as the SOG film, the adhesion strength with the upper silicon oxide film 8 is increased, and the film does not peel.

FIG. 8 shows the result of the same experiment as in FIG. 3 performed by using the test device (2). Those without ion implantation have an adhesion strength of 200 to
Although it is as low as 500 kgf / cm ² and easily peeled off at the interface, it can be seen that the ion-implanted one can obtain an adhesion strength of 700 kgf / cm ² or more regardless of the acceleration energy. This improvement in the adhesion strength is considered to be due to the fact that the organic components of the entire SOG film or the surface layer were decomposed and made inorganic, so that the adhesion to the silicon oxide film 8 which is an inorganic substance was strengthened.

Also, in this embodiment, instead of implanting ions into the organic SOG film 6 after depositing the silicon oxide film 8, ions are implanted before depositing the modified SO
The G film 7 is formed. In general, a silicon oxide film formed by a plasma CVD method itself has low hygroscopicity and excellent water resistance as compared with an organic SOG film. However, when ions are implanted into this silicon oxide film, the silicon oxide film slightly absorbs moisture. Properties (still much lower than organic SOG films). Although the moisture absorption of the silicon oxide film 5 is slightly increased, the modified SOG film 7 having low moisture absorption and excellent water resistance is present in the upper layer, so this is not a problem. Since the higher the property, the lower metal wiring 23 is adversely affected, the silicon oxide film 8 preferably has as low a hygroscopic property as possible. Therefore, in the present embodiment, by forming the silicon oxide film 8 after ion implantation into the organic SOG film 6,
This prevents the hygroscopicity of the silicon oxide film 8 from increasing.

Since the modified SOG film 7 does not contain an organic component, the etching for forming the via hole 9 can be performed in an atmosphere of a mixed gas of carbon tetrafluoride and hydrogen. Therefore, in this etching, even when a photoresist is used as an etching mask, the photoresist is not affected, and the modified SOG film 7 masked by the photoresist is not etched. Therefore, fine via holes 9 can be accurately formed.

Further, since the modified SOG film 7 does not contain an organic component, the etching rate of the modified SOG film 7 is the same as that of each of the silicon oxide films 5 and 8, and the photo-etching mask used as an etching mask is used. The modified SOG film 7 does not shrink during the ashing process for removing the resist.
Therefore, cracks do not occur in the modified SOG film 7, and no recess occurs when the via holes 9 are formed. Therefore, the upper metal wiring 23 can be sufficiently buried in the via hole 9.

The modified SOG film 7 has excellent oxygen plasma resistance. FIG. 9 shows an index for oxygen plasma resistance, which is evaluated by focusing on the decrease in the thickness of the modified SOG film 7.
This shows the change in film thickness when the modified SOG film 7 formed by implanting argon ions into the organic SOG film 6 is exposed to oxygen plasma. The conditions of the ion implantation are as follows: acceleration energy: 140 KeV, dose: 1 × 10 ¹⁵ atoms
/ cm ² .

When the organic SOG film 6 is exposed to oxygen plasma (O ₂ plasma), the original organic SOG film 6 (No treatment)
When the modified SOG film 7 was exposed to oxygen plasma while the film thickness was reduced by 16% compared to the film thickness of O ₂ plasma (O ₂ plasma aft
er Ar ⁺ impla.) And the thickness of the modified SOG film 7 (Ar ⁺ impla.) Were found to be hardly reduced as compared with the initial thickness. However, the thickness of the modified SOG film 7 is 25% smaller than the thickness of the organic SOG film 6.

From the above results, it was found that the modified SOG film 7 was a film having excellent oxygen plasma resistance. Also,
It is considered that the film density is higher when the ion implantation is performed, since the film thickness is smaller when the ion implantation is performed than when the substrate is exposed to the oxygen plasma. Thus, the modified SO
Since the G film 7 is excellent in oxygen plasma resistance, for example, an oxygen-based gas can be contained as an etching gas for forming the via hole 9. When ashing the photoresist used as the mask, an oxygen-based gas with high ashing efficiency can be used.

FIG. 10 shows an organic SOG film 6 (untreated: unimpla
nted) and modified SOG film 7 (ion implantation process: Ar ⁺ -implan
ted) were subjected to a heat treatment for 30 minutes in a nitrogen atmosphere, and the results of evaluation using TDS (Thermal Desorption Spectroscopy) are shown. The ion implantation conditions were as follows: acceleration energy: 140 KeV, dose: 1 × 10
¹⁵ atoms / cm ² .

This figure shows the amount of desorption with respect to H ₂ O (m / e = 18).
It can be seen that the modified SOG film 7 has little desorption with respect to H ₂ O (m / e = 18). This is achieved by implanting ions into the organic SOG 6 to form the modified SOG film 7.
This shows that the water and hydroxyl groups contained in the organic SOG film 6 decrease.

FIG. 11 shows the organic SOG film 6 (no treatm) for the purpose of examining the hygroscopicity of the organic SOG film 6 and the modified SOG film 7.
ent), the organic SOG film 6 exposed to oxygen plasma (O ₂
3 shows the results of evaluating the moisture in the films (plasma) and the modified SOG film 7 (Ar ⁺ ) in the air in a clean room. The amount of water in the film was determined by the FT-IR method (Fourier Transform
Using Infrared Spectroscopy), the area intensity of the absorption (around 3500 cm ⁻¹ ) of the O—H group in the infrared absorption spectrum was used as an index. The ion implantation conditions are acceleration energy: 140 KeV and dose: 1 × 10 ¹⁵ atoms / cm ² .

It can be seen that, when exposed to oxygen plasma, not only the water content before and after the treatment was increased, but also after one day. On the other hand, not only does the modified SOG film 7 not increase after the ion implantation, but the increase in moisture is small compared to the organic SOG film 6 even when left in the air in a clean room. That is, it is understood that the modified SOG film 7 has lower hygroscopicity than the organic SOG film 6.

FIG. 12 shows a pressure cooker test (PCT) (humidification test) for examining the moisture permeability of the modified SOG film 7 and the organic SOG film 6. In this embodiment, the condition is 120 ° C. 2 was performed in a saturated water vapor atmosphere at 2 atm). Using the FT-IR method, the absorption peak (3
The area intensity (around 500 cm ^-1 ) was determined, and the relationship with the PCT time was plotted.

A sample (Ar ⁺ 20 KeV) having only the surface modified by ion implantation was prepared, and a sample having the entire film modified (Ar ⁺ 140 KeV) or a sample not modified (organic SOG) was prepared.
(Film 6: Untreatment), the following was found. (1) When the unmodified organic SOG film 6 is subjected to PCT, the absorption intensity around 3500 cm ^-1 (related to the OH group) shows a dramatic increase.

(2) In the modified SOG film 7, 3500 cm ^-1
The increase in absorption intensity around (with respect to the OH group) is small.
A sample in which only the film surface was modified is comparable to a sample in which the entire film has been modified. From the above results, it can be seen that a layer that suppresses moisture permeability can be formed by implanting ions.

FIGS. 13 to 17 show a silicon oxide film 8 on the NMOS transistor as shown in FIG.
Test device (3) having an interlayer insulating film composed of / organic SOG film 6 (modified SOG film 7) / silicon oxide film 5
Shows the results of various experiments performed using the test device (the test device (3) forms a modified SOG film 7 by injecting argon ions into the organic SOG film 6).

FIG. 13 shows the drain voltage dependency of the hot carrier lifetime (the time required for the Gm (transconductance) to degrade by a certain ratio, one of the parameters indicating the lifetime of the transistor) of the NMOS transistor. It can be seen that the hot carrier lifetime of the one using the modified SOG film 7 (especially, the one with the acceleration energy of 140 KeV) is extended by about two orders of magnitude compared to the one using the organic SOG film without ion implantation. .

FIGS. 14 and 15 show the threshold values Vt before and after the acceleration test (test in which a voltage of 5 V is continuously applied to the transistor of the test device under the temperature condition of 200 ° C. for 2 hours). 14 shows the threshold value Vt before the acceleration test, and FIG. 15 shows the change amount of the threshold value Vt before and after the acceleration test. As shown in FIG. 14, before the acceleration test, the threshold value of the organic SOG film without ion implantation and that of the modified SOG film 7 hardly change.

However, as shown in FIG. 15, in the case of using an organic SOG film without ion implantation, the threshold value Vt greatly changes before and after the test, whereas the modified SOG film
The one using the film 7 (especially, the acceleration energy is 140 KeV
), There is almost no change in the threshold value Vt regardless of the gate length. This result indicates that the threshold characteristics of the MOS transistor are stable for a long time.

FIG. 16 shows the amount of change in Gm of the transistor before and after the acceleration test as in FIG. In the case of using an organic SOG film without ion implantation, the Gm greatly changed before and after the test, whereas the case in which the modified SOG film 7 was used (especially, the acceleration energy was 14
(At 0 KeV), there is almost no change in Gm regardless of the gate length. This result indicates that Gm of the MOS transistor is stable for a long time.

13 to 16, the modified SOG
The improvement effect of the film 7 formed under the condition of the acceleration energy of 20 KeV is smaller than that of the film 7 formed under the condition of the acceleration energy of 140 KeV. This is shown in FIG.
As shown in 7, the acceleration energy (injection energy) is
There is a substantially positive correlation with the modification depth of the OG film, and it is considered that when the acceleration energy is 20 KeV, only the surface layer (about 50 nm) of the organic SOG film 6 has been modified.

As described above, in the present embodiment, the organic SOG
By introducing impurities into the film 6 by ion implantation, the film is modified, whereby the moisture and hydroxyl groups contained in the film are reduced and the film is less likely to absorb moisture.
Silicon oxide film 5 and silicon oxide film 8 in contact with G film 7
The adhesion strength with the substrate is increased, and a highly reliable interlayer insulating film can be obtained. (Second Embodiment) A second embodiment of the present invention will be described with reference to the drawings. However, the second embodiment is different from the first embodiment.
The only difference from the embodiment is the structure of the source / drain electrode (source / drain wiring) 10. Therefore, only the relevant portions will be described here.

The source / drain electrodes 50 according to the second embodiment are formed of a TiN / Ti laminated film as a so-called barrier metal under an aluminum alloy film and a TiN film as an anti-reflection film (cap metal) on the aluminum alloy film. / Ti laminated film. That is, when forming the source / drain electrodes in the above step 1, as shown in FIG. 18, a Ti film 51 (50 nm thick) is formed by magnetron sputtering.
m), TiN film 52 (film thickness 100 nm), aluminum alloy film (Al-Si (1%)-Cu (0.5%)) 53 (film thickness 600 nm), Ti film 54 (film thickness 20 nm), TiN film 55 (film thickness 100 nm) are laminated in this order.

Then, as shown in FIG. 19, these laminated films are processed into a desired pattern by anisotropic etching to form source / drain electrodes 50. Note that FIG.
19, the gate oxide film 2, the gate electrode 3, the source / drain region 4, the silicon oxide film 2 in FIG.
1 and the contact hole 22 are omitted. And
Similarly to the above step 3, the silicon oxide film 5 and the organic SOG
After forming the film 6, boron ions are added to the organic SOG film 6,
Acceleration energy: 140 KeV, dose amount: 1 × 10 ¹⁵ ato
Inject under the condition of ms / cm ² .

When implanted under these conditions, boron ions become
It reaches not only the silicon oxide film 5 but also the Ti film 54. Then, by introducing boron ions into the Ti film 54, a TiB ₂ compound phase is formed in the film, and the wiring resistance is reduced. Table 3 shows the measured specific resistance of various Ti-based metals, and it can be seen that TiB ₂ has an extremely low specific resistance as compared with other metals.

[0072]

[Table 3]

As described above, in the second embodiment,
In addition to the function and effect of the first embodiment, by adding impurities (boron: B) to the Ti film 54 by ion implantation, the wiring resistance is reduced. Therefore, the thickness of the Ti film 54 itself can be reduced. As a result, the thickness of the source / drain electrodes 50 can be reduced as a whole. In addition, the contact resistance and the electromigration resistance can maintain the same characteristics as those of a Ti film not implanted with ions.

Accordingly, not only the miniaturization and high integration of the semiconductor device can be realized, but also the parasitic capacitance between the wirings is reduced because the thickness of the wiring is small, which contributes to the high speed operation of the device. Can be. Next, data further supporting the effects of the first and second embodiments are shown in FIG.
0 to FIG.

FIG. 20 shows that ions (B or A) are added to the organic SOG film.
r) Increase rate of film density when implanted (ΔDENSITY) and total deposition energy by ion implantation (DEPOSITED ENERGY)
The rate of increase in the density of the film increases proportionally with the total deposition energy, and saturates when the total deposition energy becomes 1 × 10 ⁴ eV / nm ³ or more. I understand. This relationship hardly changes even if the acceleration energy or the ion species is different.

FIG. 21 shows that various ions (B,
Of the amount of decomposition of the CH group in the film when As, Ar or F) is implanted (ΔC-H) and the total deposition energy by ion implantation, the energy deposited by ionization process (related to electron stopping power) (DEPOSITED ENERGY) FOR IONIZATION)
It can be seen that the amount of decomposition of the CH group increases proportionally with an increase in deposition energy, and saturates when the deposition energy becomes 1 × 10 ³ eV / nm ³ or more. This relationship hardly changes even if the ion species is different.

FIG. 22 shows the relationship between the cumulative frequency (LN (-LN (1-P)) of the measurement points and the hardness of the film (DYNAMIC HARDNESS) when boron ions are implanted into the organic SOG film. The ion-implanted (implanted SOG: solid line in the figure) is compared with the one without ion implantation (unimplanted SOG: dotted line in the figure)
Is a silicon oxide film (PETEO) formed by plasma CVD.
(S: dashed line in the figure) shows that the hardness increases to the same extent.

FIG. 23 shows the dielectric constant (DIELECTRIC CONSTANT) and the dose when boron ions are implanted into the organic SOG film.
(DOSE), and the organic SOG film used in the above embodiment (Type B: dotted line in the figure) and the one whose composition is [CH ₃ SiO _3/4 ] (Type B) A: Solid line in the figure)
And were used. From this figure, Type It is understood that A can control the dielectric constant to be lower.

FIG. 24 shows an organic S layer according to the second embodiment.
As an index for judging the electromigration resistance of the Ti film when boron ions are implanted into the Ti film through the OG film, the cumulative failure rate of the Ti film (CUMULATIVE FAIL
URE) and the time until the disconnection (FAILURE TIME) is shown.
It can be seen that the same characteristics as in d) can be maintained.

The present invention is not limited to the above embodiment, and the same operation and effect can be obtained even if the present invention is implemented as follows. 1) Instead of the organic SOG film 6, polyimide or siloxane-knitted polyimide is used. 2) Each of the silicon oxide films 5 and 8 is formed by a method other than the plasma CVD method (normal pressure CVD method, low pressure CVD method, ECR plasma C).
VD method, photo-excited CVD method, TEOS-CVD method, PVD
Method, etc.).
In this case, gases used in the normal pressure CVD method are monosilane and oxygen (SiH ₄ + O ₂ ), and the film formation temperature is 400 ° C. or less. The gas used in the low pressure CVD method is monosilane and nitrous oxide (SiH ₄ + N ₂ O), and the film formation temperature is 900 ° C. or less.

3) Each of the silicon oxide films 5 and 8 is replaced with another insulating film (such as a silicon nitride film or a silicate glass film) having a property of mechanical strength in addition to a property of blocking moisture and a hydroxyl group. The insulating film may be formed by any method such as a CVD method and a PVD method. 4) The source / drain electrode 10, the wiring 23 and the aluminum alloy film 53 are formed of a conductive material other than aluminum (copper, gold, silver, silicide, high melting point metal, doped polysilicon, titanium nitride (TiN), tungsten titanium (TiW)). ) And their laminated structures.

5) The modified SOG film 7 is subjected to a heat treatment. In this case, dangling bonds in the modified SOG film 7 are reduced. Hygroscopicity is further reduced, and permeation of moisture is further reduced. 6) The composition of the organic SOG film 6 is replaced with the composition represented by the general formula (2). 7) The composition of the organic SOG film 6 is replaced with an inorganic SOG film represented by the general formula (1), and ions are implanted into the inorganic SOG film. In this case, moisture and hydroxyl groups contained in the inorganic SOG film can be reduced.

8) The modified SOG film 7 is also used as a passivation film. In this case, an excellent passivation film that can reliably protect the device mechanically and chemically can be obtained. 9) In the above embodiment, boron (boron) ions are used as ions to be implanted into the organic SOG film 6, but as a result, any ions that modify the organic SOG film 6 may be used.

Specifically, ions having a relatively small mass such as argon ion, boron ion and nitrogen ion are suitable, and among them, boron ion is most suitable.
In addition to these, the following ions can be expected to have a sufficient effect. Inert gas ions other than argon (helium ion, neon ion, krypton ion, xenon ion, radon ion). Since the inert gas does not react with the organic SOG film 6, there is no possibility that an adverse effect is caused by the ion implantation.

IIIb, IVb, Vb, VI other than boron and nitrogen
b, VIIb Elemental simple ions of each group and their compound ions. In particular, oxygen, aluminum, sulfur, chlorine, gallium,
Elemental ions of germanium, arsenic, selenium, bromine, antimony, iodine, indium, tin, tellurium, lead, bismuth and their compound ions. Among them, with respect to metal element ions, the dielectric constant of the organic SOG film 6 after the ion implantation can be suppressed low.

Group IVa and Va element simple ions and their compound ions. In particular, titanium, vanadium, niobium,
Elemental ions of hafnium and tantalum and their compound ions. Since the oxides of the IVa and Va group elements have a high dielectric constant, the dielectric constant of the organic SOG film 6 after ion implantation is also high. However, it is practically used except when an interlayer insulating film having a particularly low dielectric constant is required. No problem.

Each ion is used in combination of a plurality of types.
In this case, a more excellent effect can be obtained by the synergistic action of each ion. 10) In the above embodiment, ions are implanted into the organic SOG film 6. However, the ions are not limited to ions, but may be atoms, molecules, or particles (in the present invention, these are collectively referred to as impurities).

11) As a sputtering method, other than magnetron sputtering, diode sputtering, high frequency sputtering, quadrupole sputtering, or the like may be used. 12) As a method of sputter etching, besides using an inert gas, a reactive ion beam etching (RIBE, also called reactive ion milling) using a reactive gas (for example, CCl ₄ , SF ₆ ) may be used. .

13) The silicon oxide film 8 is omitted.

[0090]

According to the present invention, the moisture and hydroxyl groups contained in the insulating film are reduced and the film is less likely to absorb moisture, and the adhesion strength with the insulating film in contact with this film is increased to improve the both. Since the film is hardly peeled off, an interlayer insulating film having good flatness and film quality can be obtained, and the reliability as a semiconductor device can be improved.

In particular, in the invention of claims 4 to 9,
By introducing impurities such as boron into the wiring member such as titanium existing under the insulating film, the wiring resistance is reduced, and as a result, the thickness of the wiring member can be reduced,
It can greatly contribute to miniaturization and high integration as a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a semiconductor device according to a first embodiment of the invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of the semiconductor device according to the first embodiment of the present invention;

FIG. 3 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 4 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 5 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 6 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 7 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 8 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 9 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 10 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 11 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 12 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 13 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 14 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 15 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 16 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 17 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 18 is a sectional view illustrating a manufacturing process of the semiconductor device according to the second embodiment which embodies the present invention;

FIG. 19 is a sectional view illustrating a manufacturing process of the semiconductor device according to the second embodiment which embodies the present invention;

FIG. 20 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 21 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 22 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 23 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 24 is a characteristic diagram for explaining the embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 1 silicon substrate 5 silicon oxide film (lower insulating film, first insulating film) 6 organic SOG film (organic polymer, upper insulating film, second insulating film) 7 modified SOG film 8 silicon oxide film (first 3, 50 source / drain electrodes (metal wiring members) 54 Ti film 55 TiN film

Claims (20)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: introducing an impurity into an upper insulating film of an insulating film having at least a two-layer structure under a condition where the impurity reaches at least an interface with a lower insulating film. . A step of forming a first insulating film on the semiconductor substrate; a step of forming a second insulating film on the first insulating film; Introducing an impurity under a condition that the impurity reaches at least an interface with the first insulating film. Forming a first insulating film on the semiconductor substrate; forming a second insulating film on the first insulating film; forming a second insulating film on the first insulating film; A step of introducing an impurity under a condition that the impurity reaches at least an interface with the first insulating film; and a step of forming a third insulating film on the second insulating film. Of manufacturing a semiconductor device. 4. An insulating film having at least a two-layer structure is formed on a metal wiring member formed on a semiconductor substrate, and impurities are added to the upper insulating film, and the impurities are mixed with an interface with the lower insulating film. A method of manufacturing the semiconductor device, wherein the semiconductor device is introduced under a condition that the semiconductor device passes through at least the metal wiring member. 5. A step of forming a metal wiring member on a semiconductor substrate, a step of forming a first insulating film on the metal wiring member, and a second insulating film on the first insulating film And introducing an impurity into the second insulating film under a condition that the impurity passes through an interface with the first insulating film and reaches at least the metal wiring member. A method for manufacturing a semiconductor device, comprising: 6. A step of forming a metal wiring member on a semiconductor substrate, a step of forming a first insulating film on the metal wiring member, and a second insulating film on the first insulating film Forming an impurity in the second insulating film under the condition that the impurity passes through an interface with the first insulating film and reaches at least the metal wiring member; Forming a third insulating film on the insulating film according to (1). 7. The method of manufacturing a semiconductor device according to claim 4, wherein said metal wiring member has a laminated structure in which a titanium film is formed on a main wiring member. 8. The semiconductor according to claim 4, wherein the metal wiring member has a laminated structure in which a titanium film and a titanium nitride film are sequentially formed on a main wiring member. Device manufacturing method. 9. The semiconductor device according to claim 7, wherein said main wiring member is made of aluminum alone or an aluminum alloy.
Or a method for manufacturing a semiconductor device according to item 8. 10. The method according to claim 1, wherein the impurity is introduced under such a condition that the number of impurities per unit area passing through the interface is 2 × 10 ¹³ atoms / cm ² or more. A method for manufacturing a semiconductor device according to claim 1. 11. An impurity is introduced under such a condition that the number of impurities per unit area passing through the interface is 2 × 10 ¹⁸ atoms / cm ² or less.
13. The method for manufacturing a semiconductor device according to item 5. 12. The method according to claim 1, wherein a silicon oxide material containing 1% or more of carbon atoms is used as the upper insulating film or the second insulating film. A method for manufacturing a semiconductor device. 13. The method for manufacturing a semiconductor device according to claim 1, wherein an inorganic SOG is used as the upper insulating film or the second insulating film. 14. The method according to claim 1, wherein the lower insulating film or the first insulating film is formed of a film having a lower hygroscopicity than the upper insulating film or the second insulating film. 9. The method for manufacturing a semiconductor device according to claim 1. 15. The method according to claim 1, wherein the step of introducing the impurity is a step of giving kinetic energy to the impurity and introducing the impurity into a film, such as an ion implantation method. 13. The method for manufacturing a semiconductor device according to item 5. 16. The method of manufacturing a semiconductor device according to claim 1, wherein boron ions are used as said impurities. 17. A semiconductor device comprising: a first insulating film formed on a semiconductor substrate; and a second insulating film formed on the first insulating film. The impurity is introduced into the second insulating film, and the profile of the impurity is continuous between the first insulating film and the second insulating film, and is introduced into the first insulating film. A semiconductor device, wherein the number of impurities is 2 × 10 ¹³ atoms / cm ² or more. 18. The semiconductor device according to claim 18, wherein the second insulating film contains 1% of carbon atoms.
The semiconductor device according to claim 17, wherein the semiconductor device is a silicon oxide material including the above. 19. The semiconductor device according to claim 17, wherein said second insulating film is an inorganic SOG. 20. The semiconductor device according to claim 17, wherein said first insulating film is made of a film having a lower hygroscopicity than said second insulating film when no impurities are introduced. .