JPH10229211A - Photoelectric conversion device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the element area for improving the photoelectric conversion efficiency, by a method wherein the substrate part end of a photoelectric conversion element is covered with a passivation film made of a dielectric in contact with the end. SOLUTION: A first semiconductor layer 2 in the reverse conductivity type to that of a substrate 1 is formed on the substrate 1, and then a second semiconductor layers 3 in the same conductivity type as that of the substrate 1 are formed on the back of the substrate 1. Next, in order to take out exceeding one each of photoelectric conversion element chips, a photoelectric conversion element chip substrate 14 is separated by using a laser cutter, etc., along a separating surface 10 of a unit element region 12. Next, a passivation film 4 made of a dielectric film is formed on an exposed end 7 of the chip substrate 14 of the separated photoelectric conversion element chip so as to arrange a surface electrode 5 and a back electrode 6. Through these procedures, the element area can be decreased, thereby enabling the photoelectric conversion efficiency to be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a crystalline silicon photoelectric conversion device.

[0002]

2. Description of the Related Art In order to increase the output current of a photoelectric conversion element, it is necessary to efficiently guide minority carriers generated by incident light to a current collecting terminal. In particular, in a photoelectric conversion device that operates with self-bias such as a solar cell, or a photoelectric conversion device with a small chip size of a photoelectric conversion element and a large influence of the surface or end face, the minority carrier is recombined before reaching the current collection terminal. Must be avoided.

In particular, in a crystalline silicon photoelectric conversion device using a single-crystal silicon or polycrystalline silicon substrate, it is necessary to take measures to suppress minority carrier recombination loss at the end face of the cut-out photoelectric conversion element chip.

As shown in FIG. 2, in manufacturing a photoelectric conversion element, a unit element region 12 of a junction type photoelectric conversion element is formed on a crystalline silicon substrate 1 of one conductivity type by diffusing impurities into regions indicated by reference numerals 2 and 3. After the formation, the unnecessary low-resistance conductive portion 11 formed at the end portion is separated from the substrate by diffusion or the like by etching or dicing, or the unit element region 12 is separated to form at least one photoelectric conversion element. Chip into chips. Conventionally, after this chip-forming step, the end face of the chip is smoothed by mechanical or chemical treatment.

However, the recombination of minority carriers is large at such an end face. Regarding the effect of such an end face,
For example, "Progress in Photovoltaics",
As described in 1996, No. 4, pp. 335-336, it has been confirmed by experiment and computer analysis that the photoelectric conversion efficiency greatly depends on the structure of the end face. A method is described in which the influence of the end face is reduced by increasing the size of the element and moving the element end away from a substantial photoelectric conversion portion of the element.

[0006]

When the photoelectric conversion element is used alone, the influence of carrier recombination at the element end face can be reduced to some extent by using the method of increasing the chip size described in the above prior art. Can be suppressed. However, when configuring a module in which a plurality of photoelectric conversion elements are arranged in an array, it is difficult to secure an extra space on the element end surface. Also, when using the element alone, it is necessary to improve the photoelectric conversion efficiency and reduce the cost by reducing the element area as much as possible.

[0007]

An end face of a substrate portion of a photoelectric conversion element chip is covered with a passivation film made of a dielectric material in contact with the end face. This coating is performed, for example, by forming a passivation film so as to be in contact with at least the exposed end face of the substrate portion of the chip after the chip forming step.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG. First, the substrate 1 is diffused into the substrate 1 by a diffusion process.
A first semiconductor layer 2 having the opposite conductivity type to that of the substrate is formed, and then a second semiconductor layer 3 having the same conductivity type as the substrate is formed on the back surface (FIG. 1A). In order to take out one or more photoelectric conversion element chips from the substrate 1, the photoelectric conversion element chip substrate 14 is separated along the separation surface 10 of the unit element region 12 using a dicing saw or a laser cutter (FIG. b)). Next, a first dielectric film is formed on at least the exposed end face 7 of the substrate portion 14 of the separated photoelectric conversion element chip.
Is formed (FIG. 1 (c)). Next, a front surface electrode 5 and a back surface electrode 6 are formed (FIG. 1D).
As a result, compared to the case where the end face is exposed, the leakage current is remarkably reduced and the output current and the voltage of the photoelectric conversion element are both improved, so that the photoelectric conversion efficiency of the photoelectric conversion element can be improved.

The first passivation film 4 is 1 ×
By selecting the material and forming conditions so as to have an interface charge density of 10 ¹² / cm ² or more, the minority carrier density at the exposed end face 7 can be reduced, and the carrier recombination can be further reduced. However, in this case, when cut by a mechanical processing method such as a dicing saw or a laser cutter, an uneven surface or a cleavage surface is formed on the exposed end face 7, and a number of crystal defects are formed toward the inner surface of the substrate. For this reason, it is desirable to perform etching to a depth of several microns to several tens of microns by a chemical etching method before forming the first passivation film 4 on the exposed end face 7.

As shown in FIG. 3, when an unnecessary low-resistance conductive layer 11 having an electric conductivity of 10 times or more that of the substrate 1 is formed at the end of the substrate 1, the low-resistance conductive layer 11 is used. Since the leakage current between the first semiconductor layer 2 and the second semiconductor layer 3 increases, which leads to a decrease in photoelectric conversion efficiency, the low-resistance conductive layer 11 must be removed in a chip forming step. Also in this case, the low resistance conductive layer 11 is removed along the separation surface 10 by the same method as described above, and the exposed end face 7 formed by this is replaced with the first passivation film 4.
By covering with, carrier recombination at the end face 7 can be suppressed and the photoelectric conversion efficiency can be improved.

The passivated structure is such that the first passivation film 4 is formed on all of the front, back and end faces of the photoelectric conversion element chip as shown in FIG. In addition to the passivated structure, there are the following. That is, as shown in FIG.
Before chip formation, a silicon oxide film or the like is formed in advance by a thermal oxidation method, a thermal CVD method, or a plasma CVD method, etc., so that passivation 8 and 9 are performed on the front and back surfaces of the chip. Structure (c) in the same figure, passivated with a passivation film
As shown in FIG. 1, a silicon oxide film or a titanium nitride film which also serves as an anti-reflection film by a thermal oxidation method, a thermal CVD method, or a plasma CVD method before forming the chip on the front and back surfaces of the photoelectric conversion element chip. By forming a single-layer or multi-layer third passivation film 8 and a fourth passivation film 9 such as a silicon nitride film and a magnesium fluoride film, passivation is performed on the front and back surfaces of the chip-formed substrate, and the photoelectric conversion element is formed. A structure in which the end surface of the chip is passivated with a first passivation film after the chip formation step. As shown in FIG. 4D, a thermal oxidation method or a thermal CVD method is applied to the front and back surfaces of the photoelectric conversion element chip before chip formation. Silicon oxide film and silicon nitride film by plasma CVD method. Thus, there is a structure in which passivation 8 and 9 are performed on the front and back surfaces of the chip-formed substrate, and the front surface and the end surface are passivated with a first passivation film after the chip-forming process. Since the exposed end face 7 of the substrate portion 14 of the chip is passivated by the first passivation film 4, carrier recombination at the chip end face can be suppressed, and the photoelectric conversion efficiency can be improved.

When the interface state density at the interface between the first passivation film and the exposed end face 7 of the substrate portion 14 of the chip is large, fixing at the interface between the first passivation film and the exposed end face 7 is performed. The effect of preventing carrier recombination due to charges is not sufficiently exhibited. In this case, a second passivation film whose interface state density at the interface with the exposed end face 7 is smaller than that of the first passivation film is inserted between the first passivation film and the exposed end face 7. Thereby, the effect of preventing carrier recombination due to the fixed charges of the first passivation film is sufficiently exhibited, and the photoelectric conversion efficiency can be improved. In this case, the thickness of the second passivation film is 20 nm or less, preferably 10 n
m, and more desirably, the second
By setting the interface state density at the interface between the passivation film and the exposed end face 7 to 1 × 10 ¹² / cm ² or less, the passivation effect due to the fixed charges of the first passivation film can be more effectively exerted.

As shown in FIG. 4E, a thermal oxidation method or a thermal CVD method is applied to the front or back surface of the substrate 1 before chipping, as shown in FIG. Further, passivation 8 and 9 are performed on the front and back surfaces of the chip by forming a silicon oxide film or the like by a plasma CVD method or the like. After forming the chips into chips, a second passivation film 13 is formed on the end surface of the chip. 4A, a structure in which a first passivation film 4 is formed over the entire surface, as shown in FIG. 4F, after chip formation, a second passivation film 13 is formed over the entire surface of the chip, and over the entire surface. There is a structure in which these surfaces are passivated by forming the first passivation film 4.

Next, a structure having the first semiconductor layer 2 and the second semiconductor layer 3 only on the back surface of the photoelectric conversion element chip will be described. By forming the first passivation film 4 on the entire surface of the photoelectric conversion element chip as shown in FIG. 5A, in addition to a structure in which these surfaces are passivated, as shown in FIG. Passivation 8 and 9 are performed on the front and back surfaces of the conversion element chip by forming a silicon oxide film or the like in advance by a thermal oxidation method, a thermal CVD method, or a plasma CVD method before chipping, and further after the chipping step. FIG. 4C shows a structure in which the entire surface is passivated with a first passivation film 4.
As shown in the figure, a silicon oxide film, a titanium nitride film, and a silicon nitride film which also serve as an anti-reflection film by a thermal oxidation method, a thermal CVD method, and a plasma CVD method on the front and back surfaces of the photoelectric conversion element chip before chipping. Third layer of single layer or multilayer such as nitride film and magnesium fluoride film
(D) in which the passivation is performed by forming the passivation film 8 and the fourth passivation film 9 of FIG. 1 and the end face of the photoelectric conversion element chip is passivated with the first passivation film after the chip formation step.
As shown in the figure, passivation is performed by forming a silicon oxide film or a silicon nitride film on the front and back surfaces of the photoelectric conversion element chip by a thermal oxidation method, a thermal CVD method, or a plasma CVD method before chipping. 8 and 9, and the surface and the end face of which are passivated by the first passivation film 4 after the chip formation step, etc., the exposed end face 7 of the substrate portion 14 of the photoelectric conversion element chip is the first passivation film 4 , Carrier recombination at the chip end face can be suppressed and the photoelectric conversion efficiency can be improved.

FIG. 5 shows a structure in which the second passivation film 13 is inserted between the first passivation film 4 and the exposed end face 7 of the substrate portion 14 of the chip.
As shown in (e), a thermal oxidation method or a thermal CVD method is applied to the front and back surfaces of the photoelectric conversion element chip before chipping.
8 and 9 are formed by forming a silicon oxide film or the like by a plasma CVD method or the like, and after forming these into chips, a second passivation film 13 is formed on the end surface of the chip, and over the entire surface. First
The structure in which the passivation film 4 of FIG.
As shown in (2), after the chip is formed, a second passivation film 13 is formed on the entire surface of the chip of the photoelectric conversion element, and a first passivation film 4 is formed on the entire surface from above to passivate these surfaces. There is.

In the step of forming the first passivation film 4 and the second passivation film 13, a chip is formed on the exposed end face 7 so that an uneven surface or a cleavage surface is formed, from which crystal defects are formed toward the inside of the substrate. Many are formed, and it is difficult to completely remove the crystal defect layer even by performing chemical etching or the like. Therefore, it is desirable to form the first passivation film 4 and the second passivation film 13 at a low temperature. In a normal thermal oxidation method or a thermal CVD method, a film having high durability and a low interface state density is easily obtained, but the film formation temperature is 800 ° C. to 1 ° C.
High as 200 ° C. On the other hand, in plasma CVD, 60
Since the film can be formed at a relatively low temperature of 0 ° C. or less, even if these films are formed after chipping, the exposed end face 7
Thus, a photoelectric conversion element having high photoelectric conversion efficiency with almost no increase in crystal defects can be formed.

In FIGS. 4 and 5, the first semiconductor layer 2
And a typical structure as the shape of the second semiconductor layer 3 has been described, for example, when the second semiconductor layer 3 formed on the back surface in the structure of FIG. 4 is formed on the entire back surface, or as shown in FIG. The same effect can be obtained in a structure having the first semiconductor layer 2 formed on the front surface of the photoelectric conversion element chip and the first semiconductor layer 2 and the second semiconductor layer 3 formed on the back surface as shown in FIG. can get.

As a method of separating the substrate 1 into chips, it is needless to say that similar results can be obtained by a method such as chemical etching as well as a mechanical processing method such as dicing, laser cutting and cleavage.

Incidentally, Japanese Patent Application Laid-Open No. Hei 5-315628 discloses that
A description is given of a photoelectric conversion element in which the passivation film is formed on the end face of the element when the surface passivation film is formed. However, since this photoelectric conversion element has not undergone the chipping step in the manufacturing process, there is a diffusion layer on the end face, and a diffusion layer is interposed between the passivation film on the element end face and the element end face. ing. That is, the photoelectric conversion element described in JP-A-5-315628 does not have the exposed end face referred to in the present invention.

Embodiment 1 FIG. 6 shows a manufacturing process of a photoelectric conversion element according to Embodiment 1 of the present invention. First, as a substrate 1 shown in FIG.
Using a p-type silicon single crystal substrate, phosphorus is diffused by the method used in a normal semiconductor manufacturing process to form an n-type first semiconductor layer 2 and boron is diffused to form a p-type second semiconductor layer 3.
Was formed. Next, as shown in FIG. 1B, the unit element region 12 was cut along the separation surface 10 with a dicing saw into chips. Next, a first passivation film 4 made of a silicon nitride film was formed by a plasma CVD method so as to be in contact with the entire surface of the chip including the exposed end face 7 of the substrate portion 14 of the chip. The growth conditions were a vacuum of 0.3 Torr, a NH ₃ gas flow rate of 30 sccm, a SiH ₄ gas flow rate of 10 sccm, and a substrate temperature of 30 sccm.
0 ° C., plasma power 30 W. The interface charge density of this silicon nitride film was 4 × 10 ¹² / cm ² . Next, the first electrode 5 and the second
Was formed.

When the characteristics of this device were examined, the shunt resistance component was 2 × 10 ⁵ Ωcm ² to 5 × 10 ⁸ Ωc, as compared with the case where the first passivation film 4 was not formed.
m ² and the forward current at a terminal voltage of 0.2 V is 5 × 1
It was reduced from 0 ^-6 A / cm ² to 2 × 10 ^-7 A / cm ² , and the photoelectric conversion efficiency was improved by 10%.

By changing the gas flow ratio to increase the composition of nitrogen in the silicon nitride film,
When the composition of nitrogen is increased by 10%, 8 × 10 ¹² / cm
² , a 20% increase could provide a high interfacial charge density of 4 × 10 ¹³ / cm ² .

Similar results were obtained by simply using N ₂ in addition to NH ₃ gas as a nitrogen supply source.

The same effect can be obtained when a CVD silicon oxide film is used as the first passivation film 4. As described above, it is needless to say that the same effect can be obtained by using a film that induces a large amount of fixed charges at the interface or a film having a low interface state density at the substrate interface as the first passivation film 4.

Embodiment 2 FIG. 7 shows a manufacturing process of a photoelectric conversion element according to Embodiment 2 of the present invention. In this embodiment, the first semiconductor layer 2 and the second semiconductor layer 3 are formed on the substrate 1 in the same manner as in the first embodiment, and this substrate is heat-treated for 1 hour in an oxygen atmosphere at 1000 ° C. A structure in which a third passivation film 8 and a fourth passivation film 9 made of a thermal oxide film were formed on the front and back surfaces of the photoelectric conversion element shown in FIG. After that, the method shown in FIG.
Step (d) was performed.

In this method, the passivation of the front surface and the back surface of the substrate 1 is mainly performed by the third passivation film 8 and the fourth passivation film 9.
The first passivation film 4 mainly performs passivation of the end face 7.

In order to form a thermal oxide film having a high passivation characteristic and a high durability in this structure, a temperature of 600 ° C.
The above heat treatment is required. However, when heat of 600 ° C. or more is applied to the separated photoelectric conversion element, crystal defects due to defects or contamination generated at the end face 7 at the time of separation or a decrease in carrier lifetime are caused. Therefore, it is desirable to form the third passivation film 8 and the fourth passivation film 9 at a high temperature of 600 ° C. or more, and then to form the first passivation film 4 at a low temperature of less than 600 ° C. The first passivation film 4 was formed at a substrate temperature of 300 ° C.

Embodiment 3 FIG. 8 shows a manufacturing process of a photoelectric conversion element according to Embodiment 3 of the present invention. In this example, a structure in which the first semiconductor layer 2 and the second semiconductor layer 3 exist only on the back surface of the photoelectric conversion element was formed. First, in FIG. 1A, a first semiconductor layer 2 and a second semiconductor layer 3 were formed on the back surface of a substrate 1 via a diffusion mask.

In this embodiment, two types of photoelectric conversion elements having different structures of the passivation film were manufactured. The first type is a photoelectric conversion element obtained by the manufacturing steps of FIGS. (B1), (c1), and (d1). The second type is shown in FIG.
2), (b2), (c2) and (d2) are photoelectric conversion elements obtained in the manufacturing steps.

The first type of photoelectric conversion element was manufactured in the same process as in Example 1, in which the structure of the passivation film was a single-layer structure including only the first passivation film.

The second type of photoelectric conversion element has a two-layer structure in which the second passivation film 13 is formed before the formation of the first passivation film 4 as the structure of the passivation film, as shown in step (b2 '). As described above, the second passivation film 13 made of a 10 nm thick silicon oxide film
Was formed on the entire surface of the chip using a chemical oxidation method.
The interface state density at the interface between the second passivation film 13 and the exposed end face 7 of the substrate portion 14 of the chip is 2 × 10
¹² / cm ² .

This value corresponds to the first passivation film 4 and the substrate portion of the chip when the silicon nitride film formed by the plasma CVD method is used as the first passivation film as in the first type of photoelectric conversion element. 1
4 of the interface state density at the interface with the exposed end face 7 of 2 × 10 ¹³
/ Cm ² . Therefore, in the second type of photoelectric conversion element, the effect of reducing minority carrier recombination due to the fixed charge of the first passivation film 4 could be further enhanced.

Further, in order to sufficiently exhibit the effect of the second passivation film 13, the above-mentioned interface state density must be 1%.
It is preferably at most 10 ¹² / cm ² . As an example, as a second passivation film, plasma C
When a silicon oxide film formed by the VD method is used, the interface state density can be reduced by 2 × 10 ¹¹ / cm ^2, and the photoelectric conversion efficiency is further increased by 5 times as compared with the case of the chemical oxide film of this embodiment.
% Increased.

When the electrodes are formed after the chip forming step as in Examples 1 to 3, when the chip size is relatively small, there is a problem that the electrode forming step becomes complicated. In such a case, as shown in FIG. 9B, it is preferable to form electrodes before the chipping step. In this case, furthermore, since the electrodes are formed before the formation of the end face passivation film, there is also an advantage that steps such as formation of contact holes in the passivation film can be omitted and the steps can be simplified. However, in this case, the temperature of the end face passivation forming step is set to 500 ° C. or less, preferably 400 ° C.
It must be kept below ℃. This is because the electrode reacts with the substrate at a temperature higher than 500 ° C. In particular, when a material which easily reacts at a low temperature, such as Al, is selected as an electrode material, a reaction occurs at a temperature higher than 500 ° C. in a short time. Further, if the processing time is long, even a metal having low reactivity will react with the substrate at a temperature higher than 500 ° C. Further, when the diffusion depth of the first and second semiconductor layers is as shallow as 0.5 μm or less, the electrode material immediately penetrates to the diffusion depth even at a temperature lower than 500 ° C. It is preferable to hold.

In the first to third embodiments, the first passivation film 4 is formed by the plasma CV shown in FIG.
D apparatus was used. When forming the first passivation film 4, the temperature of the photoelectric conversion element chip 108 is set to 100 to 600 ° C.
When the temperature was changed within the range, there was a temperature at which the passivation characteristics became maximum depending on the composition of the first passivation film 4. In this case, usually the chip 108
Is heated by the heater 107 placed under the heater. However, in this method, the contact between the chip 108 and the heater 107 is insufficient, and the heat conduction is poor in a vacuum. Therefore, it is preferable to indirectly heat the chip 108 using the heat ray source 112 or the like. Further, both may be combined. The heat ray source 112 includes a halogen lamp and the like. It goes without saying that the same indirect heating is possible by laser or induction heating.

In order to efficiently form the first passivation film on the end face 109 of the chip 108, FIG.
The rotary shaft 1 eccentric from the first introduction pipe 104 as shown in FIG.
The first passivation film 4 having a desired thickness can be formed on the chip end face 109 in a short time by forming the first passivation film 4 while rotating the chip 108 about the center 11.

Further, when a first passivation film having the same thickness as the end face 109 is also formed on the surface 110 of the chip 108, as shown in FIG. The tip 108 may be rotated at an angle of less than 70 degrees from the tip 108. If the thickness of the first passivation film deposited on the chip surface 110 is to be smaller than the thickness deposited on the end face 109,
It is preferable to incline the rotation axis in a range from 70 degrees or more to 90 degrees.

When simultaneously depositing the first passivation film mainly only on the end face 109 of a plurality of chips,
As shown in FIG. 13, a plurality of chips 108 are stacked,
It is preferable that the first passivation film is deposited by rotating about the axis 111.

In these methods of rotating the photoelectric conversion element chips, in particular, the method of rotating a plurality of chips in an overlapping manner, indirect heating by a heat ray source was effective as a method of heating the chips 108.

In the above embodiment, the case where the photoelectric conversion device is constituted by a single photoelectric conversion element has been described.
As shown in (2), a plurality of photoelectric conversion elements 202 can be connected to each other by electric wiring and arranged in a module housing 201 to form a module.

[0041]

According to the present invention, the leak current component can be drastically reduced without increasing the element area, and the photoelectric conversion efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating one manufacturing step of a photoelectric conversion device of the present invention.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of a conventional photoelectric conversion device.

FIG. 3 is a cross-sectional view illustrating one manufacturing step of the photoelectric conversion device of the present invention.

FIG. 4 is a cross-sectional view of a structural example of the photoelectric conversion device of the present invention.

FIG. 5 is a cross-sectional view of a structural example of the photoelectric conversion device of the present invention.

FIG. 6 is a cross-sectional view illustrating a manufacturing process of the photoelectric conversion device according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view illustrating a manufacturing process of the photoelectric conversion device according to the second embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating a manufacturing process of the photoelectric conversion device according to the third embodiment of the present invention.

FIG. 9 is a flowchart of one manufacturing process of one photoelectric conversion device of the present invention.

FIG. 10 is a configuration diagram of a manufacturing apparatus used for manufacturing a photoelectric conversion device of the present invention.

FIG. 11 is an explanatory diagram of one manufacturing method of the photoelectric conversion device of the present invention.

FIG. 12 is an explanatory diagram of one manufacturing method of the photoelectric conversion device of the present invention.

FIG. 13 is an explanatory diagram of one manufacturing method of the photoelectric conversion device of the present invention.

FIG. 14 is a configuration diagram of a modularized example of the photoelectric conversion device of the present invention.

[Explanation of symbols]

1: substrate, 2: first semiconductor layer, 3: second semiconductor layer,
4: first passivation film, 5: first electrode, 6:
Second electrode, 7: exposed end face, 8: third passivation film, 9: fourth passivation film, 10: separation surface,
11: low-resistance conductive layer at the end, 12: unit element region, 1
3: second passivation film, 14: substrate portion of photoelectric conversion element chip, 15: truncated portion at chip formation, 10
1: vacuum container, 102: cavity, 103: oscillator,
104: first inlet pipe, 105: second inlet pipe, 10
6: exhaust pipe, 107: heater, 108: photoelectric conversion element chip, 109: chip end face, 110: chip surface, 1
11: rotation axis, 112: heat ray source, 113: tilt angle, 20
1: module housing :, 202: photoelectric conversion element, 20
3: a first terminal, 204: a second terminal

Continuing on the front page (72) Inventor Ken Tsutsui 1-280 Higashi Koikekubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd.

Claims (7)

[Claims] 1. A photoelectric conversion device having a photoelectric conversion element in which a junction-type photoelectric conversion region is formed in a one-conductivity-type crystalline silicon substrate, wherein a passivation film made of a dielectric is provided at an end surface of the one-conductivity-type substrate. A photoelectric conversion device, which is formed in contact with a substrate. 2. The photoelectric conversion device according to claim 1, wherein said dielectric constituting said passivation film is silicon nitride. 3. The passivation film according to claim 1, wherein said passivation film has a fixed charge density of 1 × 10 ¹² / cm ² or more.
The photoelectric conversion device as described in the above. 4. The second passivation film has a laminated structure in which a first passivation film is present on a side far from the substrate and a second passivation film is in contact with the substrate on a near side. The interface state density between the film and the substrate is smaller than the interface state density generated when a film of the constituent material of the first passivation film is formed in contact with the constituent material of the substrate. 2. The photoelectric conversion device according to 1. 5. A photoelectric conversion device, wherein a plurality of the photoelectric conversion elements according to claim 1 are modularized. 6. A step of forming a junction type photoelectric conversion region of a photoelectric conversion element in a crystalline silicon substrate of one conductivity type; a step of forming a chip into at least one of the photoelectric conversion elements;
In the method for manufacturing a photoelectric conversion device having a step of forming an electrode, a step of forming a passivation film made of a dielectric in contact with an exposed end face of a substrate portion of the photoelectric conversion element chip after the chipping step is provided. A method for manufacturing a photoelectric conversion device. 7. The method according to claim 6, wherein the electrode forming step is performed before the chip forming step.