JPH1022794A - Current control system ring oscillator and semiconductor integrated circuit device using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the current control system ring oscillator in which the characteristic of an oscillator of a phase locked loop(PLL) using a complementary metal oxide semiconductor(CMOS) device used for a digital signal processing function and a high speed operation microcomputer or the like is improved. SOLUTION: The oscillator is a ring oscillator configured by connecting a plurality of stages of delay circuits in cascade, each delay circuit is made up of a CMOS differential amplifier circuit, which comprising a differential amplifier circuit 1 consisting of a couple of MOS TRs, an active load circuit 2 consisting of a couple of MOS TRs, and current sources CS1-CS3 each consisting of a MOS TR, and output terminals OUT1, OUT2 are configured so that they change invertingly/noninvertingly with respect to a DC voltage change at an input terminal IN1 and they change noninvertingly/invertingly with respect to a DC voltage change at an input terminal IN2 and the oscillated frequency is controlled by controlling a current I1 of the current source CS1 and a current I2 of the current sources CS2, CS3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current controlled ring oscillator, and more particularly to a complementary metal-oxide semiconductor (CMOS).
l Oxide Semiconductor (PLL) Phase Lock
ed Loop) oscillator, for example, a PLL oscillator for generating a color sub-carrier, a PLL oscillator for generating a character display position control signal, and a character addition function required for a character addition function to a video signal and a multiplex addition (picture-in-picture) function of a video signal, and The present invention relates to a ring oscillator of a current control method suitable for a high-speed operation microcomputer, a clock generator PLL oscillator of a digital signal processor and the like, and a technique effective when applied to a semiconductor integrated circuit device using the same.

[0002]

2. Description of the Related Art For example, as a technique studied by the inventor, a ring oscillator of a current control method applied to a video signal processing, a microcomputer, and a PLL for generating a clock of a digital signal processor is disclosed, for example, in Japanese Patent Publication No. 60-25922. Bulletin, Tokuhei 4-79170
Inverter types described in Japanese Patent Publications, such as IEEE / ISSCC95, Digest of Technical Papers,
It is considered that the differential circuit type described in the literature such as TA6.5 is generally used.

The current controlled ring oscillator of the general inverter type is constituted by, for example, cascading inverter circuits as delay circuits of odd-numbered stages in a ring state. Each of the inverter circuits has an input terminal connected to the gates of two MOS transistors,
Using the drain of the S transistor as an output terminal, this MO
This is a so-called inverter type CMOS amplifier circuit in which the current of the S transistor is controlled by the other two MOS transistors. Then, by varying the current flowing through each of the two MOS transistors according to the voltage applied to the gates of the other two MOS transistors, the signal transmission delay time of each of the inverter circuits changes, and as a result, the oscillation frequency changes. Is possible.

On the other hand, a ring oscillator of a current control system of a general differential circuit type is constituted by, for example, cascading differential amplifier circuits as delay circuits of even-numbered stages in a ring state. In each of the differential amplifier circuits, a drain of a pair of active load MOS transistors is connected to a power supply, and a drain of a pair of differential MOS transistors is connected to the pair of active load MOS transistors. A transistor is connected to a current source of a MOS transistor whose source is grounded. Then, by connecting the two input terminals to the respective gates of the differential MOS transistors and using the connection point between the active load MOS transistor and the differential MOS transistor as an output terminal to control the current of the current source, The signal transmission delay time of the differential amplifier circuit changes, and as a result, the oscillation frequency can be changed.

[0005]

By the way, in the ring oscillator of the general current control system as described above, the ring oscillator of the current control system is used as a PLL for video signal processing and clock generation of a microcomputer or a digital signal processor. The following problems are conceivable when applied to the above oscillator.

(1) In the ring oscillator of the current control system of the inverter type, the oscillation frequency fluctuates in response to the voltage fluctuation of the power supply / GND, that is, jitter occurs even when the control current is kept constant.

(2) An inverter-type current-controlled ring oscillator has a large operating amplitude, and the oscillator itself becomes a noise source. Therefore, when applied to a video signal processing device on the same chip, an analog video signal is generated. Noise can be superimposed on the signal.

(3) In a current controlled ring oscillator of the differential circuit type, the oscillation frequency is unlikely to fluctuate in response to voltage fluctuations of the power supply / GND, and crosstalk noise is unlikely to occur due to a small operating amplitude. Although there is an advantage, when the current of the current source is increased, the output amplitude increases, so that the increase in the oscillation frequency is prevented, so that the upper limit operation frequency is suppressed.

(4) Although the clock of the video signal processing and the clock of the microcomputer or the digital signal processor tends to increase in speed, the current controlled ring oscillator is
As the oscillation frequency increases, the current needs to be increased to increase the slew rate, and the power consumption increases.

In view of the above problems, the current controlled ring oscillator used for the clock signal processing PLL used for the clock signal generation and the clock generation PLL of the microcomputer or the digital signal processor has a strong jitter against the voltage ripple of the power supply / GND. Therefore, a circuit which does not become a noise generation source, has a high oscillation frequency and low power consumption is required.

An object of the present invention is to improve a current controlled ring oscillator of the differential circuit type to solve the above-mentioned problems, and to improve the performance of a CMOS device PL.
An oscillator for L, for example, a PLL for generating a color subcarrier required for a function of adding a character to a video signal or a function of multiplexing and adding a video signal.
-Controlled ring oscillator capable of improving the characteristics of a PLL for generating a clock and a character display position control signal, a clock generating PLL for a high-speed microcomputer or a digital signal processor, and a semiconductor integrated circuit using the same It is to provide a circuit device.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0013]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the current controlled ring oscillator of the present invention is applied to a ring oscillator configured by cascading a plurality of stages of delay circuits, and this delay circuit is used as a CMOS differential amplifier circuit. An active load circuit, a differential circuit, and a first current source are respectively connected between the first power supply and the second power supply.
Connected to an input terminal, a connection point between the active load circuit and the differential circuit is connected to first and second output terminals, and a first and second output terminal for an input signal to the first and second input terminals And a second current source for controlling the current from the active load circuit between the connection point between the active load circuit and the differential circuit and the second power supply. A third current source is additionally connected.

Specifically, in order to provide a CMOS differential amplifier circuit of a type in which a current is extracted from an active load circuit of a CMOS amplifier circuit of a differential circuit type by a current source independent of each other,
The CMOS differential amplifier circuit includes a first input terminal, a first input terminal, a first output terminal that changes in the same phase as the opposite phase, and a first output terminal that changes in the same phase with respect to the DC change of the first and second input terminals. A second output terminal that changes in phase;
A pair of first and second MOS transistors having the same shape and having an input terminal connected to each gate and first and second output terminals connected to respective drains; and a pair of first and second MOS transistors, respectively. A pair of third and fourth MOS transistors having drains connected thereto and connected to the same power supply, and a pair of first and second MOS transistors controlled by a voltage supplied to a first control terminal;
A first current source for supplying current to the MOS transistor, and a second and third current controlled by a voltage supplied to the second control terminal and independently supplying the same current to the pair of third and fourth MOS transistors And the source.

When the CMOS differential amplifier circuit thus configured is cascaded in M stages, the K-th stage (K
= 2 to M) are connected to the first and second output terminals of the (K-1) -th stage CMOS differential amplifier circuit, and the first and second output terminals are connected to the first-stage CMOS differential amplifier circuit. Is connected to the first-stage first input terminal, and the other M-stage output terminal is connected to the first-stage first input terminal. Connected to the second input terminal, the first and second control terminals of all M-stage CMOS differential amplifier circuits are controlled in common, and the current of the first current source and the second and third
The oscillation frequency is changed by controlling the current of the current source independently.

In this case, the first current source and the second and third current sources
The current source is controlled in conjunction with the same voltage, and the ratio of the change of the current of the second and third current sources to the change of the current of the first current source is set to an arbitrary multiple. , A fifth and an eighth MOS transistor as a first cascode connection current source, and a second and a third current source as a sixth cascode connection current source.
And seventh MOS transistor and ninth and tenth MO transistors
The second and third cascode connection current sources constituted by S transistors may be used, or the second and third current sources may be replaced by a sixth MOS transistor and ninth and tenth MOS transistors.
And the transistors output from the ninth and tenth Mth MOS transistors.
The OS transistors are generated by dividing them by half.

Further, the CMOS differential amplifier circuit composed of M stages is selectively combined at an arbitrary ratio and divided, and the divided plural systems are controlled by different current sources, respectively, or are divided by M stages. When extracting a signal from one or more CMOS differential amplifier circuits among the CMOS differential amplifier circuits to be configured, the currents of a plurality of current sources of one or more CMOS differential amplifier circuits are fixed and the remaining Is operated with an amplitude larger than the operating amplitude of the CMOS differential amplifier circuit in which the current of the current source is varied.

Further, the semiconductor integrated circuit device of the present invention comprises, in addition to the ring oscillator, a video signal processing device including a digital signal processing circuit for video signals and the like and peripheral circuits.

Further, another semiconductor integrated circuit device of the present invention comprises a microcomputer or a digital signal processor including a central processing unit, a storage circuit, and peripheral circuits in addition to the ring oscillator. .

Therefore, according to the above-described current controlled ring oscillator and the semiconductor integrated circuit device using the same,
By using the differential circuit type CMOS differential amplifier circuit as the delay circuit of the current control type ring oscillator, the oscillation operation is particularly resistant to power supply / GND fluctuation, especially when compared with the inverter type current control type ring oscillator. As a result, the jitter is small and no noise is generated.

Even when compared with a current controlled ring oscillator of the differential circuit type, the current of the current source of the CMOS differential amplifier circuit is increased in order to reduce the delay time, while each of the current sources is independent of the active load circuit. By increasing the current value of the current source, it is possible to suppress an increase in operating amplitude in the active load circuit, so that an increase in the oscillation frequency is not hindered. As a result, a high-speed clock generation PLL can be realized, and a high-speed clock with reduced clock skew can be generated or the power consumption of the clock generation circuit can be reduced.

Thus, an oscillator for a PLL of a CMOS device, for example, a PLL for generating a color subcarrier and a PLL for generating a character display position control signal required for a function of adding a character to a video signal or a function of multiplexing a video signal, In addition, the characteristics of the oscillator of the clock generating PLL of the high-speed operation microcomputer or digital signal processor can be improved. As a result, in a semiconductor integrated circuit device using this oscillator, high speed and low power consumption can be achieved.

[0024]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a circuit diagram showing a current-controlled ring oscillator according to Embodiment 1 of the present invention.
FIGS. 2 and 3 are circuit diagrams showing a ring oscillator of a current control type using a general inverter type and a differential circuit type as a comparative example with respect to the first embodiment, and FIG. 4 is a current control type of the first embodiment. 1 is a functional block diagram showing a semiconductor integrated circuit device including a video signal processing device using a ring oscillator of FIG.

First, the configuration of the current controlled ring oscillator according to the first embodiment will be described with reference to FIG.

The ring oscillator of the current control system according to the first embodiment is constituted by, for example, cascading a plurality of stages (M stages) of delay circuits having differential input / output terminals and connecting them in a ring state. And the delay circuit is CMO
The CMOS differential amplifier circuit includes a differential circuit 1 including a pair of MOS transistors.
And an active load circuit 2 comprising a pair of MOS transistors
And a current source C by one MOS transistor each
S1 to CS3, and the differential circuit 1 has an input terminal I
N1, IN2, the active load circuit 2 and the differential circuit 1
Is connected to the output terminals OUT1 and OUT2,
The output terminals OUT1 and OUT2 are configured to change in the opposite phase and in phase with respect to the DC voltage change of the input terminal IN1, respectively, while changing in the same phase and the opposite phase with respect to the DC voltage change of the input terminal IN2. I have.

In this ring oscillator, the K-th stage (K
= 2 to M) of the input terminals IN1, IN1 of the CMOS differential amplifier circuit
IN2 is connected to the output terminals OUT1 and OUT2 of the (K-1) th stage CMOS differential amplifier circuit, and the Mth stage output terminal OUT1 operates in phase with the first stage input terminal IN1; Output terminal OU of the M-th stage CMOS differential amplifier circuit
T1 and OUT2 are respectively connected to the input terminals IN2 and IN1 of the first stage CMOS differential amplifier circuit, and the control terminals T1 and T2 of all the M stage CMOS differential amplifier circuits are commonly controlled, and the current source CS1 Current and current sources CS2 and CS3
The current can be controlled independently to change the oscillation frequency.

Although FIG. 1 shows the case where the ring oscillator is constituted by even-numbered stages, for example, when the ring oscillator is constituted by odd-numbered stages, the ring oscillator is constituted by one stage from the (M + 1) or (M-1) stage. The connection to the eye is not a cross, and the output terminal O of the (M + 1) or (M-1) -th stage CMOS differential amplifier circuit
UT1 and OUT2 are connected to input terminals IN1 and IN2 of the first stage CMOS differential amplifier circuit, respectively.

The differential circuit 1 includes, for example, a pair of NMOS transistors MN1 and MN2 having the same shape.
The respective gates of the MOS transistors MN1 and MN2 are connected to the positive and negative input terminals IN1 and IN2, the respective drains are connected to the output terminals OUT1 and OUT2 and the active load circuit 2, and the sources are commonly connected. And connected to the current source CS1.

The active load circuit 2 includes, for example, a pair of NMO
This NMOS is composed of S transistors MN3 and MN4.
The gates of the transistors MN3 and MN4 are commonly connected to the drain and connected to the power supply Vcc, and the sources are connected to the drains of the NMOS transistors MN1 and MN2 forming the differential circuit 1.

The current source CS1 is, for example, one NMOS
The NMOS transistor MN5 has a gate connected to the variable bias voltage source V1 via the control terminal T1, and a drain connected to a commonly connected source of the NMOS transistors MN1 and MN2 constituting the differential circuit 1. And the source is connected to ground GND.

The current source CS2 is, for example, one NMOS
A gate of the NMOS transistor MN6 is connected to the variable bias voltage source V2 via the control terminal T2, and a drain is connected to a drain of the NMOS transistor MN1 forming the differential circuit 1;
Further, the source is connected to the ground GND.

The current source CS3 is, for example, one NMOS
The transistor MN7 has a gate connected to the control terminal T2 similarly to the current source CS2.
, The drain is connected to the drain of the NMOS transistor MN2 constituting the differential circuit 1, and the source is connected to the ground GND.

Next, with respect to the operation of the first embodiment, the operation of the current controlled ring oscillator will be described.

In the current controlled ring oscillator, the NMOS transistors MN1 and MN2 of the differential circuit 1
Operates with the current I1 supplied by the current source CS1, outputs a set of currents corresponding to the signals input to the input terminals IN1 and IN2, and outputs the NMOS transistor MN of the active load circuit 2.
3, supply to MN4. At the same time, the NMOS transistors MN3 and MN4 have current sources CS2 and CS, respectively.
3 supplies the current I2. The current I1 of this current source CS1
And the current I2 of the current sources CS2 and CS3 are independently controlled to change the oscillation frequency.

That is, by supplying the current I2 to the active load circuit 2, for example, the NMOS transistor MN1 of the differential circuit 1 is turned on and the NMOS transistor MN1 is turned on.
Even when N2 is off, the NMOS transistor MN4
Is not turned off, and the change in the amplitude of the oscillation state output appearing at the output terminals OUT1 and OUT2 is smaller than when the current I2 is not supplied by the current sources CS2 and CS3.

Accordingly, the amplitude of the output terminals OUT1 and OUT2 can be controlled to be small, and the oscillation frequency depends only on the rise / fall time of the output by controlling the current I1 of the current source CS1. As a result, the oscillation frequency of the ring oscillator can be increased.

Therefore, according to the ring oscillator of the current control method of the first embodiment, the delay circuit is a CMO comprising the differential circuit 1, the active load circuit 2, and the current sources CS1 to CS3.
Owing to the circuit configuration of the S differential amplifier circuit, the oscillation operation is performed by the power supply / GND as compared with, for example, a general inverter type current control type ring oscillator shown in FIG. 2 as a comparative example of the present embodiment. As a result, the jitter is small and the amplitude can be suppressed as a noise source.

In the ring oscillator of the current control system of the inverter type shown in FIG. 2, an inverter circuit as an odd-numbered stage delay circuit is cascaded in a ring state, and each of the inverter circuits has an input terminal in of two. MO
The MOS transistors mp1 and mn1 are connected to the gates of the S transistors mp1 and mn1 and the drains of the MOS transistors mp1 and mn1 are used as output terminals out.
This is an inverter type CMOS amplifier circuit in which the current of 1 is controlled by other MOS transistors mp2 and mn2.

In this inverter type, the currents i1 and i2 flowing through the MOS transistors mp2 and mn2 are varied by variable bias voltage sources v1 and v2 applied to the gates of the MOS transistors mp2 and mn2. Is changed, and as a result, the oscillation frequency can be changed.

The ring oscillator of the current control system of the first embodiment has a smaller delay time than the ring oscillator of the current control system of the general differential circuit type shown in FIG. Current source CS1 of CMOS differential amplifier circuit
The current I1 of the active load circuit 2 is increased while the value of the current I2 of the current sources CS2 and CS3 for the active load circuit 2 is also increased. Is not disturbed.

The current controlled ring oscillator of the differential circuit type shown in FIG. 3 has a differential amplifier circuit as a delay circuit of a plurality of stages cascaded in a ring state as in the first embodiment. This differential amplifier circuit includes a pair of NMOS transistors MN1 and MN2 as a differential circuit 1 and a pair of NMOS transistors MN3 and MN3 as an active load circuit 2.
MN4 and only one current source CS1 constituted by NMOS transistor MN5.

In this differential circuit type, the current sources CS1 of all the differential amplifier circuits are commonly controlled by a variable bias voltage source V1, and by controlling the current of this current source CS1, all the differential amplifier circuits are controlled. The configuration is such that the signal transmission delay time of the circuit changes, and as a result, the oscillation frequency can be changed.

The ring oscillator of the current control system of the first embodiment configured as described above is, for example, a semiconductor integrated circuit device comprising a video signal processing device for compressing and expanding a video signal as shown in FIG. The video signal processing device 3 is implemented by, for example, a well-known semiconductor manufacturing technique.
It is formed on one semiconductor substrate and commercialized as a semiconductor integrated circuit device such as an LSI.

As shown in FIG. 4, the video signal processing device 3 includes a phase comparator 4, a low-pass filter 5, a voltage-current conversion circuit 6, a current-controlled ring oscillator 7 according to the first embodiment, and It comprises a PLL 9 by a frequency dividing circuit 8, a digital signal processing circuit 10, a memory 11, an A / D converter 12, a D / A converter 13, a synchronization separating circuit 14, a frequency dividing circuit 15, and the like. It is configured to be capable of inputting a signal, and capable of outputting an analog video signal and a digital video signal.

In the operation of generating a clock in the video signal processing device 3, first, a horizontal synchronizing signal is separated and taken out from the input video signal through a synchronizing separation circuit 14. The separated signal fs is input to the phase comparator 4 of the PLL 9 to detect a phase difference from the signal fd from the frequency dividing circuit 8 of the PLL 9, and the current difference is detected via the low-pass filter 5 and the voltage-current converting circuit 6. The oscillation frequency of the ring oscillator 7 of the control method is controlled.

Then, the phase comparator 4, the low-pass filter 5,
Voltage-current conversion circuit 6, current controlled ring oscillator 7
The control by the PLL 9 of the frequency dividing circuit 8 is repeated, and finally the oscillation frequency is completely matched with the frequency and phase of the signal fs, and the output signal is tuned to the input signal fs. A digital signal processing clock, an A / D conversion clock, and a D / A conversion clock are generated from the output signal of the PLL 9 through the frequency dividing circuit 15, and the digital signal processing circuit 10, the memory 11, and the A
The / D converter 12 and the D / A converter 13 can be operated in synchronization.

For example, when performing compression processing of a video signal, the input video signal is converted into a digital signal by an A / D converter 12, and a signal processing for compression is performed via a digital signal processing circuit 10. And output directly as a digital video signal. When the compressed video signal is expanded, the input digital video signal is directly converted to a digital signal processing circuit 10.
Performs signal processing for decompression via the D / A converter 1
3 and output as a video signal after being converted into an analog signal.

Therefore, according to the semiconductor integrated circuit device including the video signal processing device 3 using the current-controlled ring oscillator 7 of the first embodiment, the ring oscillator 7 is not prevented from increasing the oscillation frequency. As a result, a high-speed clock generation PLL 9 can be realized, and a high-speed clock with reduced clock skew can be generated or the power consumption of the clock generation circuit can be reduced. As a result, the speed and power consumption of the semiconductor integrated circuit device can be reduced. Can be planned.

(Embodiment 2) FIG. 5 is a circuit diagram showing a current-controlled ring oscillator according to Embodiment 2 of the present invention.
FIG. 6 shows the control current ratio, the oscillation frequency, and the control current ratio between the current-controlled ring oscillator of the second embodiment and a current-controlled ring oscillator of a general differential circuit type as a comparative example of the second embodiment. FIG. 7 is a functional block diagram showing a semiconductor integrated circuit device including a microcomputer using a current-controlled ring oscillator according to the second embodiment.

In the ring oscillator of the current control system according to the second embodiment, as in the first embodiment, a delay circuit composed of a CMOS differential amplifier circuit having differential input / output terminals is cascade-connected in a plurality of stages. And a ring oscillator connected in a ring state. The difference from the first embodiment is that the current source for the differential circuit and the current source for the active load circuit are operated in conjunction with each other. is there.

That is, in the ring oscillator of the current control system of the first embodiment, the oscillation frequency is controlled by two power supplies with respect to the oscillation frequency. In the second embodiment, as shown in FIG. In addition, the control terminals T1 and T2 are controlled by the same power supply by the variable bias voltage source V1, and the current sources CS
1 and respective currents I generated by the current sources CS2 and CS3.
1 and I2 are configured to variably control the oscillation frequency by proportionally controlling the rate of change of the current I2 of the current sources CS2 and CS3 with respect to the change of the current I1 of the current source CS1 by an arbitrary multiple. .

For example, the relationship between the control current ratio and the oscillation frequency in the ring oscillator of the current control method according to the second embodiment is shown in FIG. 6 as a result of a simulation of the same process using a six-stage CMOS differential amplifier circuit. When compared with the ring oscillator of the current control method using the general differential circuit shown in FIG. 3 in the first embodiment, the oscillation frequency is about 1.5 times higher than the same control current ratio. Can be oscillated.

Accordingly, the ring oscillator of the current control method according to the second embodiment has a small jitter with respect to power supply fluctuation, reduces the amount of noise generation, has a high operable oscillation frequency, and has a high power consumption, similarly to the first embodiment. In addition to the effect that the power can be reduced, the current I1 of the current source CS1 can be changed by operating the current source CS1 and the current sources CS2 and CS3 in cooperation with the same power supply by the variable bias voltage source V1. Current sources CS2 and CS
The oscillation frequency can be varied by proportionally controlling the rate of change of the current I2 of No. 3 to an arbitrary multiple.

The current-controlled ring oscillator of the second embodiment configured as described above is used, for example, in a semiconductor integrated circuit device including a microcomputer as shown in FIG. For example, it is formed on one semiconductor substrate by a well-known semiconductor manufacturing technique, and is commercialized as a semiconductor integrated circuit device such as an LSI.

As shown in FIG. 7, the microcomputer 16 includes a phase comparator 4a, a low-pass filter 5a, and a voltage comparator similar to those of the video signal processing apparatus shown in the first embodiment.
PLL 9a by current conversion circuit 6a, current controlled ring oscillator 7a and frequency divider 8a of the second embodiment.
, A CPU 17, a ROM 18, a RAM 19, an input / output circuit 20, and the like. An external input clock or a clock obtained from an oscillation circuit is input to the input / output circuit 20 so that signals can be input and output from the input / output circuit 20. .

The microcomputer 16 generates a clock by inputting an external input clock or a clock signal fs obtained from an oscillation circuit to the phase comparator 4a of the PLL 9a.
The phase difference between the signal Ld and the signal fd from the frequency dividing circuit 8a is detected, and the control by the PLL 9a is repeated. Finally, the oscillation frequency is completely matched with the frequency and phase of the signal fs, and the output signal is input to the signal fs. Synchronize with. And
The system clock is extracted from the frequency dividing circuit 8a of the PLL 9a, and the CPU 17 and the ROM
18, the RAM 19, and the input / output circuit 20 can be operated in synchronization.

For example, in the case of the operation of writing data to the RAM 19, the data input from the input / output circuit 20 can be stored in the data area of the RAM 19 at the designated address under the control of the CPU 17. In the case of reading data from the ROM 18 or the RAM 19, an arbitrary address of the ROM 18 or the RAM 19 is designated, and data stored in the data area of the designated address is output from the input / output circuit 20. Can be. Further, other operations such as erasing data can be performed in synchronization with the system clock.

Therefore, according to the semiconductor integrated circuit device including the microcomputer 16 using the ring oscillator 7a of the current control system according to the second embodiment, the ring oscillator 7a
In this case, the increase in the oscillation frequency is not hindered, so that a high-speed clock generation PLL 9a can be realized, and a high-speed clock with reduced clock skew can be generated or the power consumption of the clock generation circuit can be reduced. Higher speed and lower power consumption of the circuit device can be achieved.

(Embodiment 3) FIG. 8 is a circuit diagram showing a current-controlled ring oscillator according to Embodiment 3 of the present invention.

As in the first and second embodiments, the current-controlled ring oscillator according to the third embodiment includes a plurality of delay circuits each including a CMOS differential amplifier circuit having differential input / output terminals. The ring oscillator is configured so as to be connected and connected in a ring state, and is different from the first and second embodiments in that the current source is configured by a cascode connection MOS circuit.

That is, in the ring oscillator of the current control system according to the third embodiment, the three current sources CS1 to CS3 of the CMOS differential amplifier circuit are cascode-connected.
S transistor, and as shown in FIG.
S1 is an NMOS transistor MN cascode-connected to an NMOS transistor MN5 whose source is grounded.
8 and the current sources CS2 and CS3 are also connected to the source-grounded NMOS transistor MN in the same manner as the current source CS1.
6, NM cascode-connected to MN7
This is a current source circuit composed of OS transistors MN9 and MN10.

Then, in the current source CS1, the NMO
Control terminal T to which the gate of S transistor MN5 is connected
1 is controlled by a variable bias voltage source V1, while an NMOS
Control terminal T3 to which the gate of transistor MN8 is connected
Is controlled by the variable bias voltage source V3, and the current source CS
2, CS3, the NMOS transistors MN6,
A control terminal T2 to which each gate of MN7 is connected is controlled by a variable bias voltage source V2, while a control terminal T4 to which gates of NMOS transistors MN9 and MN10 are connected is controlled by a variable bias voltage source V4. Have been.

Therefore, the current source CS1 supplies the drain current of the NMOS transistor MN5 to the input terminals IN1 and IN2.
To operate without being affected by DC voltage fluctuation of
The constant current source is less affected by the input operation voltage, and plays a role of obtaining a stable oscillation frequency. In addition, the current source CS
2 and CS3, like the current source CS1, are constant current sources that are less affected by the input operation voltage, and play a role of obtaining a stable oscillation frequency.

Therefore, the ring oscillator of the current control method according to the third embodiment has a small jitter with respect to the power supply fluctuation, reduces the amount of noise generation, has a high operable oscillation frequency, and has the same characteristics as the first and second embodiments. In addition to the effect that power consumption can be reduced, the current sources CS1 to CS3 are not affected by the DC voltage fluctuations of the input terminals IN1 and IN2, particularly by using current source circuits configured in a cascode connection. In this manner, the constant current source is less affected by the input operation voltage, and a stable oscillation frequency can be obtained.

(Embodiment 4) FIG. 9 is a circuit diagram showing a current controlled ring oscillator according to Embodiment 4 of the present invention.

In the ring oscillator of the current control method according to the fourth embodiment, a delay circuit composed of a CMOS differential amplifier circuit having differential input / output terminals is cascaded by a plurality of stages, as in the first to third embodiments. The ring oscillator is configured to be connected and connected in a ring state. The difference from the first to third embodiments is that the current source is a modified cascode connection, and in particular, the active load circuit is compared with the third embodiment. This is a point in that the circuit configuration is such that the current source is divided into two at the cascode connection part.

That is, FIG. 8 shown in the third embodiment.
In the fourth embodiment, as shown in FIG. 9, two NMOS transistors MN9 and MN10 cascode-connected to a grounded source NMOS transistor MN6 in the fourth embodiment.
, The current output from the drain of the NMOS transistor MN6 is
N9 and MN10 respectively divide the frequency by 1/2, generate a current I2, and control the oscillation frequency.

Accordingly, the ring oscillator of the current control method according to the fourth embodiment has a small jitter with respect to the power supply fluctuation, reduces the amount of noise generation, has a high operable oscillation frequency, and has a high frequency characteristic, similarly to the first to third embodiments. In addition to the effect that power consumption can be reduced, the current I2 of the two NMOS transistors MN9 and MN10 can be controlled by only the NMOS transistor MN6 to ground the source in the current sources CS2 and CS3.
The shape can be reduced by reducing the number of S transistors.

(Embodiment 5) FIG. 10 is a circuit diagram showing a current-controlled ring oscillator according to Embodiment 5 of the present invention.

In the ring oscillator of the current control system according to the fifth embodiment, similarly to the first to fourth embodiments, a delay circuit comprising a CMOS differential amplifier circuit having differential input / output terminals is cascaded in a plurality of stages. The ring oscillator is configured to be connected and connected in a ring state, and is different from the first to fourth embodiments in that a plurality of systems of current control are performed by selectively combining CMOS differential amplifier circuits. That is the point.

That is, the current-controlled ring oscillator according to the fifth embodiment has, as an example, as shown in FIG. 10, for example, an M-stage CMOS differential amplifier circuit from the first stage to the L-th stage. Control terminal T of each current source CS1 to CS3
1 and T2 are common variable bias voltage sources V1 and V
2 and the control terminals T1a and T2a of the other current sources CS1 to CS3 from the (L + 1) th stage to the Mth stage are connected to common variable bias voltage sources V5 and V6, respectively. It is configured to control.

Therefore, the current I flowing through the NMOS transistors MN5 to MN7 of the current sources CS1 to CS3 connected to the control terminals T1 and T2 of the first to Lth stages, respectively.
1, I2 and N of current sources CS1 to CS3 connected to control terminals T1a and T2a of (L + 1) th to Mth stages.
Current I flowing through MOS transistors MN5a to MN7a
1a, I2a and the respective currents I1, I2, I2
The oscillation frequency is controlled by varying 1a and I2a. In addition,
In this case, the NMOS transistors of the differential circuit from the (L + 1) th stage to the Mth stage and the active load circuit are respectively M
N1a to MN4a.

For example, the CMO from the first stage to the L-th stage
In the S differential amplifying circuit, the oscillation frequency is controlled so as to reduce the amplitude. On the other hand, in the (L + 1) th to Mth CMOS differential amplifying circuits, the amplitude is increased to increase the gain. The oscillation frequency can be controlled as described above. In addition to such division, a CMOS differential amplifier circuit composed of M stages is selectively combined at an arbitrary ratio according to the purpose, for example, divided into odd stages and plural stages. The plurality of divided systems can be controlled by different current sources.

Therefore, the ring oscillator of the current control method according to the fifth embodiment has a small jitter with respect to power supply fluctuation, a reduced amount of noise generation, a high operable oscillation frequency, And the power consumption can be reduced.
By selectively combining and dividing the OS differential amplifier circuit at an arbitrary ratio, a plurality of systems can be controlled by different current sources CS1 to CS3, respectively, so that the oscillation frequency can be controlled according to the purpose. Become.

(Embodiment 6) FIG. 11 is a circuit diagram showing a current controlled ring oscillator according to Embodiment 6 of the present invention.

In the ring oscillator of the current control system according to the sixth embodiment, similarly to the first to fifth embodiments, a delay circuit comprising a CMOS differential amplifier circuit having differential input / output terminals is cascaded in a plurality of stages. A ring oscillator configured to be connected and connected in a ring state is different from the first to fifth embodiments in that one or a plurality of CMOS differential amplifier circuits of the M-stage CMOS differential amplifier circuits are provided. The point is that the current of the current source is fixed.

That is, the current controlled ring oscillators of the first to fifth embodiments obtain a higher oscillation frequency than the differential circuit type ring oscillator by reducing the output amplitude. In some cases, an output buffer circuit that can amplify the signal without lowering the oscillation frequency of the ring oscillator is required.
In FIG. 11, as shown in FIG. 11, the currents of the current sources CS1 to CS3 of the M-th stage CMOS differential amplifier circuit are fixed by fixed bias voltage sources V7 and V8, and the currents by the other variable bias voltage sources V1 and V2. The operation is performed with an amplitude larger than the operation amplitude of the variable CMOS differential amplifier circuit.

For this purpose, the NMOS transistors MN of the current sources CS1 to CS3 connected to the control terminals T1 and T2
Currents I1 and I2 flowing through MN7 to MN7 and the CMO
NMOS transistors MN5b of current sources CS1 to CS3 connected to control terminals T1b and T2b of the S differential amplifier circuit
ＭMN7b are separated from currents I1b and I2b, and the currents I1 and I2 are varied to control the oscillation frequency. In this case, the NMOS transistors of the M-th differential circuit and the active load circuit are MN1b to MN1 respectively.
4b.

Therefore, in the ring oscillator of the current control system according to the sixth embodiment, the output amplitude is increased by fixing the current only in the M-th stage, or the M-th stage to be extracted as the output phase is selectively fixed current. By converting to a specific stage, C
Only the MOS differential amplifier circuit can achieve stable output operation without current control as a fixed current. It should be noted that the current is not limited to the M-th stage, but the output amplitude may be increased, another stage to be extracted as an output phase may be fixed, or a plurality of stages may be fixed. It is possible.

Therefore, the ring oscillator of the current control system according to the sixth embodiment has a small jitter with respect to power supply fluctuation, a reduced amount of noise generation, a high operable oscillation frequency, In addition to the effect that power consumption can be reduced, one or more CMOs in an M-stage CMOS differential amplifier circuit can be realized.
By fixing the currents of the current sources CS1 to CS3 of the S differential amplifying circuit, the output amplitude can be increased or the output of the CMOS differential amplifying circuit of a specific stage which is desired to be taken out as the output phase is not current controlled, and the output can be stably operated. Can be achieved.

Although the invention made by the present inventor has been specifically described based on the first to sixth embodiments of the present invention, the present invention is not limited to the above embodiment and does not depart from the gist of the invention. It goes without saying that various changes can be made within the range.

For example, in the current controlled ring oscillators of the first to sixth embodiments, a case has been described in which the CMOS differential amplifier circuits are all constituted by NMOS transistors. However, the present invention is not limited to this. Not
For example, the MOS transistor of the active load circuit is PMOS
It can be composed of transistors or all MO
The present invention is also applicable to a case where the S transistor is configured by a PMOS transistor.

As the second embodiment, a single power supply system is shown in FIG. 5 as a system for variably controlling the oscillation frequency by proportionally controlling the currents I1 and I2.
By giving a specific relationship to the variable bias voltage sources V1 and V2 shown in (1), a specific coefficient can be given to a change in the current I2 with respect to the current I1 to control the oscillation frequency.

In the above description, mainly the case where the invention made by the present inventor is applied to a video signal processing device and a current controlled ring oscillator used in a microcomputer, which are technical fields to which the invention belongs, has been described.
However, the present invention is not limited to this. Oscillator for PLL of other CMOS devices, for example, PLL for generating a color subcarrier required for a function of adding a character to a video signal or a multiplexing addition function of a video signal, and generation of a character display position control signal PLL oscillator for
In addition, the present invention can be widely applied to various semiconductor integrated circuit devices using a high-speed operation microcomputer or a clock generator PLL oscillator for a digital signal processor.

[0087]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1) When the present invention is used for a PLL oscillator of a CMOS device, it is not an inverter type, but
Since it is a ring oscillator of a current control method using a CMOS differential amplifier circuit of a differential circuit type, it is strong against power supply and GND fluctuations, so that a clock with small jitter can be supplied.

(2) A differential-circuit type CMOS differential amplifier circuit, a current-controlled ring oscillator in which the operating amplitude is limited, and the amplitude generated by the oscillator itself is reduced. When applied to a video signal processing device or the like, the amount of noise crosstalk to a signal to be processed such as a video signal can be reduced.

(3) By making it possible to control the operation output amplitude of the active load circuit in the CMOS differential amplifier circuit as a delay circuit, the upper limit frequency of oscillation can be expanded, so that a high oscillation frequency can be obtained. .

(4) Since the upper limit of the operable oscillation frequency can be increased, power consumption at a required oscillation frequency can be reduced.

(5) Since the characteristics of the oscillator for the PLL of the CMOS device can be improved by the above (1) to (4), for example, the function of adding a character to a video signal and the function of multiplexing a video signal are improved. Oscillation of necessary color sub-carrier generation PLL and character display position control signal generation PLL, and various semiconductor integrated circuit devices using high-speed operation microcomputer and digital signal processor clock generation PLL oscillator. Low power consumption can be achieved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a current controlled ring oscillator according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a current-controlled ring oscillator of a general inverter type as a comparative example with respect to the first embodiment of the present invention.

FIG. 3 is a circuit diagram showing a current-controlled ring oscillator of a general differential circuit type as a comparative example with respect to the first embodiment of the present invention;

FIG. 4 is a functional block diagram illustrating a semiconductor integrated circuit device including a video signal processing device using a current-controlled ring oscillator according to the first embodiment of the present invention.

FIG. 5 is a circuit diagram showing a current controlled ring oscillator according to a second embodiment of the present invention.

FIG. 6 shows a control current ratio between a current-controlled ring oscillator according to the second embodiment of the present invention and a current-controlled ring oscillator using a general differential circuit as a comparative example with respect to the second embodiment; FIG. 4 is a characteristic diagram illustrating a relationship with an oscillation frequency.

FIG. 7 is a functional block diagram illustrating a semiconductor integrated circuit device including a microcomputer using a current-controlled ring oscillator according to a second embodiment of the present invention;

FIG. 8 is a circuit diagram showing a current controlled ring oscillator according to a third embodiment of the present invention.

FIG. 9 is a circuit diagram showing a current controlled ring oscillator according to a fourth embodiment of the present invention.

FIG. 10 is a circuit diagram showing a current controlled ring oscillator according to a fifth embodiment of the present invention.

FIG. 11 is a circuit diagram illustrating a current controlled ring oscillator according to a sixth embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Differential circuit 2 Active load circuit 3 Video signal processor 4, 4a Phase comparator 5, 5a Low-pass filter 6, 6a Voltage-current conversion circuit 7, 7a Current controlled ring oscillator 8, 8a Dividing circuit 9, 9a PLL 10 Digital signal processing circuit 11 Memory 12 A / D converter 13 D / A converter 14 Synchronization separation circuit 15 Divider circuit 16 Microcomputer 17 CPU 18 ROM 19 RAM 20 Input / output circuit CS1-CS3 Current sources MN1-MN10 NMOS transistors MN1a to MN7a, MN1b to MN7b NMOS transistors V1 to V6 Variable bias voltage sources V7, V8 Fixed bias voltage sources IN1, IN2 Input terminals OUT1, OUT2 Output terminals T1 to T4 Control terminals T1a, T2a, T1b, T2b Control terminals Vcc Power supply GND connection Ground I1 to I4 Current I1a, I2a, I1b, I2b Current mp1, mn1, mp2, mn2 MOS transistor v1, v2 Variable bias voltage source in Input terminal out Output terminal i1, i2 Current

Claims (9)

[Claims] 1. A ring oscillator comprising a plurality of stages of cascaded delay circuits, wherein the plurality of stages of delay circuits are respectively connected between a first power supply and a second power supply. It comprises an active load circuit composed of MOS transistors, a differential circuit composed of a pair of MOS transistors, and a first current source composed of MOS transistors.
A connection point between the active load circuit and two drains of the differential circuit is connected to an input terminal and a second input terminal;
The output signals of the first output terminal and the second output terminal are connected to an output terminal and a second output terminal, and output signals of the first output terminal and the second output terminal change in different phases with respect to input signals to the first input terminal and the second input terminal. A second current source and a third current between a second connection point between the active load circuit and the differential circuit and the second power supply, the current source controlling a current flowing through the active load circuit; A current controlled ring oscillator characterized by being connected to a source. 2. The current controlled ring oscillator according to claim 1, wherein the differential circuit has a gate connected to the first input terminal and the second input terminal, and a drain connected to the first input terminal and the second input terminal. The active load circuit comprises a pair of first MOS transistor and second MOS transistor having the same shape connected to the first output terminal and the second output terminal, and the active load circuit is connected to respective drains of the first MOS transistor and the second MOS transistor. A pair of third M connected to the first power source
An OS transistor and a fourth MOS transistor; the first current source is controlled by a voltage supplied to a first control terminal, and includes a fifth MOS transistor that supplies a current to the first MOS transistor and the second MOS transistor; The second current source and the third current source are controlled by a voltage supplied to a second control terminal, and further include a sixth MOS transistor and a sixth MOS transistor that independently supply the same current to the third MOS transistor and the fourth MOS transistor. 7
A MOS transistor, wherein the first output terminal changes in phase with the opposite phase with respect to each DC change of the first input terminal and the second input terminal, and the second output terminal changes in phase with the opposite phase. In the case where the CMOS differential amplifier circuit has M (M = an integer of 2 or more) stages, the two input terminals of the K-th stage (K = 2 to M) are set to (K -1) The M-th output terminal connected to the two output terminals of the first stage and operating in the opposite phase to the DC change of the first input terminal of the first stage is the first input terminal of the first stage , And the other output terminal side of the M-th stage is connected to the second stage of the first stage.
Connected to an input terminal, wherein the first control terminal and the second control terminal of all the M-stage CMOS differential amplifier circuits are commonly controlled, and the current of the first current source, the second current source, A current controlled ring oscillator, wherein the oscillation frequency is changed by controlling the current of the third current source independently. 3. The current controlled ring oscillator according to claim 2, wherein the first current source, the second current source, and the third current source are controlled in association with each other at the same voltage. A current controlled ring oscillator, wherein the rate of change of the currents of the second and third current sources with respect to the change of the current of the first current source is an arbitrary multiple. 4. The current controlled ring oscillator according to claim 2, wherein the first current source is connected to the fifth MOS transistor whose gate is connected to the first control terminal and whose source is grounded. Cascode connected to the fifth MOS transistor, and an eighth MOS transistor having a gate connected to a third control terminal, the first cascode connected current source, and the second current source and the third current source. The sixth MOS transistor and the seventh MOS transistor whose gates are connected to the second control terminal and whose source is grounded;
A ninth MOS transistor and a ninth MOS transistor each having a cascode connection to the S transistor and the seventh MOS transistor and a gate connected to the fourth control terminal.
A current-controlled ring oscillator comprising a second cascode-connected current source and a third cascode-connected current source each including an OS transistor. 5. The current controlled ring oscillator according to claim 4, wherein the second current source and the third current source have a gate connected to the second control terminal and a source grounded. A sixth MOS transistor;
A ninth MOS transistor and a tenth MOS transistor, each of which is cascode-connected to the OS transistor and whose gate is connected to the fourth control terminal, are configured to output a current output from the drain of the sixth MOS transistor to the ninth MOS transistor. A ring oscillator of a current control system, wherein the ring oscillators are generated by being divided in half by the tenth MOS transistors. 6. The current controlled ring oscillator according to claim 2, 3, 4 or 5, wherein said CMOS differential amplifier circuit composed of M stages is selectively combined at an arbitrary ratio and divided. A current controlled ring oscillator, wherein the plurality of divided systems are controlled by different current sources. 7. The current controlled ring oscillator according to claim 2, wherein at least one of said CMOS differential amplifier circuits of said CMOS differential amplifier circuit composed of M stages. When extracting a signal from the dynamic amplifier circuit, the currents of the plurality of current sources of the one or more CMOS differential amplifier circuits are fixed, and the currents of the remaining current sources are varied. A current controlled ring oscillator characterized by operating at an amplitude greater than the operating amplitude. 8. The method of claim 1, 2, 3, 4, 5, 6, or 7.
A semiconductor integrated circuit device using the current controlled ring oscillator according to the description, at least, the ring oscillator,
A semiconductor integrated circuit device comprising a video signal processing device including a digital signal processing circuit for a video signal or the like and a peripheral circuit thereof. 9. The method of claim 1, 2, 3, 4, 5, 6, or 7.
A semiconductor integrated circuit device using the current controlled ring oscillator according to the description, at least, the ring oscillator,
A semiconductor integrated circuit device comprising a microcomputer or a digital signal processor including a central processing unit, a storage circuit, and peripheral circuits.