JPH10223925A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH10223925A
JPH10223925A JP1903097A JP1903097A JPH10223925A JP H10223925 A JPH10223925 A JP H10223925A JP 1903097 A JP1903097 A JP 1903097A JP 1903097 A JP1903097 A JP 1903097A JP H10223925 A JPH10223925 A JP H10223925A
Authority
JP
Japan
Prior art keywords
substrate
light receiving
receiving element
porous silicon
crystal silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1903097A
Other languages
Japanese (ja)
Inventor
Masahiko Suzumura
正彦 鈴村
Yoshimichi Takano
仁路 高野
Takashi Kishida
貴司 岸田
Yoshifumi Shirai
良史 白井
Yoshiki Hayazaki
嘉城 早崎
Yuji Suzuki
裕二 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP1903097A priority Critical patent/JPH10223925A/en
Publication of JPH10223925A publication Critical patent/JPH10223925A/en
Pending legal-status Critical Current

Links

Landscapes

  • Led Devices (AREA)
  • Light Receiving Elements (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To enable a light receiving element to receive incident light without lowering its photovoltaic force by forming porous silicon on a single-crystal silicon substrate with an insulating film in between and respectively forming the light receiving element and a light emitting element on the substrate and porous silicon so that the elements may be faced oppositely to each other. SOLUTION: Porous silicon 3 is formed on one main surface of a single- crystal silicon substrate 1 with a silicon oxide film 2 formed as an insulating film in between and a light receiving element 4 and a light emitting element 5 are respectively formed on the substrate 1 and porous silicon 3. In order to obtain the optical coupling between the elements 4 and 5, the porous silicon 3 is formed by anodically oxidizing one single-crystal silicon substrate of an SOI substrate and the elements 4 and 5 are respectively formed on the other single-crystal silicon substrate of the SOI substrate and the porous silicon 3 so that the elements 4 and 5 may be faced oppositely to each other. Therefore, the chip area of a semiconductor device can be reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置に関す
るものであり、特にSOI構造型の受発光素子に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a light emitting / receiving element having an SOI structure.

【0002】[0002]

【従来の技術】図2は、従来例に係るSOI構造型受発
光集積化素子を示す略断面図である。従来の受発光集積
化素子は、単結晶シリコン基板1の一主表面上ににシリ
コン酸化膜2を介して単結晶シリコンから成るシリコン
島6a,6bが形成されている。ここで、単結晶シリコ
ン基板1,シリコン酸化膜2及び単結晶シリコンにより
SOI(Silicon On Insulator)基板を構成してお
り、シリコン島6a,6bはそれぞれ絶縁分離されてい
る。
2. Description of the Related Art FIG. 2 is a schematic sectional view showing an SOI structure type light receiving / emitting integrated device according to a conventional example. In the conventional light receiving and emitting integrated device, silicon islands 6a and 6b made of single crystal silicon are formed on one main surface of a single crystal silicon substrate 1 with a silicon oxide film 2 interposed therebetween. Here, an SOI (Silicon On Insulator) substrate is constituted by the single crystal silicon substrate 1, the silicon oxide film 2 and the single crystal silicon, and the silicon islands 6a and 6b are insulated from each other.

【0003】また、シリコン島6a及び6bにはぞれぞ
れ発光素子及び受光素子が形成され、発光素子はPNP
トランジスタで構成され、受光素子はPN接合ダイオー
ドで構成されている。
A light emitting element and a light receiving element are formed on the silicon islands 6a and 6b, respectively.
It is composed of a transistor, and the light receiving element is composed of a PN junction diode.

【0004】そして、PNPトランジスタのベース・コ
レクタ接合からの発光を、受光素子により受光する。な
お、詳細については、特開平6−69489号公報に記
載されている。
Light emitted from the base-collector junction of the PNP transistor is received by a light receiving element. The details are described in JP-A-6-69489.

【0005】[0005]

【発明が解決しようとする課題】ところが、上述のよう
な構成の受発光集積化素子では、SOI基板の同一表面
上に発光素子と受光素子とが形成されていることから、
特に複数の光結合対を集積する際にチップサイズの増大
を招く結果となり、好ましくない。
However, in the light receiving / emitting integrated device having the above structure, the light emitting device and the light receiving device are formed on the same surface of the SOI substrate.
Particularly, when a plurality of optical coupling pairs are integrated, a chip size is increased, which is not preferable.

【0006】また、例えば発光素子と受光素子とを光結
合し、受光素子からの光起電力をパワーMOSやIGB
T等の絶縁ゲート型パワー素子のゲート電極に印加する
ことでパワー素子の導通/遮断状態の駆動を行う半導体
素子を用いた、いわゆる半導体型リレーでは、絶縁ゲー
トに印加するゲート電圧は少なくとも数V以上を必要と
し、そのため受光素子を電気的に直列に接続する必要が
ある。
Also, for example, a light emitting element and a light receiving element are optically coupled, and the photoelectromotive force from the light receiving element is converted into a power MOS or IGB.
In a so-called semiconductor type relay using a semiconductor element which drives the power element in a conductive / interrupted state by applying a voltage to the gate electrode of an insulated gate type power element such as T, the gate voltage applied to the insulated gate is at least several volts. The above is required, and therefore, it is necessary to electrically connect the light receiving elements in series.

【0007】この場合、受光素子の素子面積は広くな
り、この広い受光素子の面積で光起電力を低下させずに
入射光を受光するためには、図2に示す構造では複数の
発光素子が必要であり、さらにチップ面積の増大を招く
結果となる。
In this case, the element area of the light receiving element becomes large, and in order to receive the incident light without reducing the photovoltaic power in this large light receiving element area, a plurality of light emitting elements are required in the structure shown in FIG. This is necessary and further results in an increase in chip area.

【0008】本発明は、上記の点に鑑みて成されたもの
であり、その目的とするところは、チップ面積の増大を
招くことなく、光起電力を低下させずに入射光を受光す
ることのできる半導体装置を提供することにある。
The present invention has been made in view of the above points, and an object of the present invention is to receive incident light without reducing the photovoltaic power without increasing the chip area. It is to provide a semiconductor device which can be realized.

【0009】[0009]

【課題を解決するための手段】請求項1記載の発明は、
受光素子が形成されて成る単結晶シリコン基板と、発光
素子が形成され、該半導体基板の一主表面上に絶縁膜を
介して形成された多孔質シリコンとを有し、前記発光素
子と前記受光素子とが前記絶縁膜を介して対向配置され
て成ることを特徴とするものである。
According to the first aspect of the present invention,
A single-crystal silicon substrate on which a light-receiving element is formed, and porous silicon formed with a light-emitting element formed on one main surface of the semiconductor substrate via an insulating film; The device is characterized in that the device and the device are opposed to each other with the insulating film interposed therebetween.

【0010】請求項2記載の発明は、請求項1記載の半
導体装置において、前記多孔質シリコンを、単結晶シリ
コン基板を陽極酸化することにより変質させて形成する
ようにしたことを特徴とするものである。
According to a second aspect of the present invention, in the semiconductor device of the first aspect, the porous silicon is formed by altering a single crystal silicon substrate by anodic oxidation. It is.

【0011】[0011]

【発明の実施の形態】以下、本発明の一実施形態につい
て図面に基づき説明する。図1は、本発明の一実施形態
に係る受発光集積化素子を示す略断面図である。本実施
形態に係る受発光集積化素子は、単結晶シリコン基板1
の一主表面上に絶縁膜としてのシリコン酸化膜2を介し
て多孔質シリコン3が形成されており、単結晶シリコン
基板1には受光素子4が形成され、多孔質シリコン3に
は発光素子5が形成されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic sectional view showing a light emitting and receiving integrated device according to an embodiment of the present invention. The integrated light receiving / emitting element according to this embodiment is a single crystal silicon substrate 1
A porous silicon 3 is formed on one main surface of the substrate through a silicon oxide film 2 as an insulating film, a light receiving element 4 is formed on the single crystal silicon substrate 1, and a light emitting element 5 is formed on the porous silicon 3. Are formed.

【0012】一般に、単結晶シリコン基板には受光素子
の形成は可能であるが、発光素子の形成は困難である。
そこで、本実施形態においては、発光素子5形成のため
に、多孔質シリコン3を用いている。
In general, a light receiving element can be formed on a single crystal silicon substrate, but it is difficult to form a light emitting element.
Therefore, in the present embodiment, the porous silicon 3 is used for forming the light emitting element 5.

【0013】ここで、本実施形態においては、単結晶シ
リコン基板1と、単結晶シリコン基板1の一主表面上に
シリコン酸化膜2を介して形成された単結晶シリコン基
板(図示せず)から成るSOI(Silicon On Insulat
or)基板の前記単結晶シリコン基板を陽極酸化すること
により変質させて多孔質シリコン3を形成するようにし
ている。
In this embodiment, a single-crystal silicon substrate 1 and a single-crystal silicon substrate (not shown) formed on one main surface of the single-crystal silicon substrate 1 with a silicon oxide film 2 interposed therebetween are used. SOI (Silicon On Insulat)
or) The single-crystal silicon substrate is anodized to be transformed to form porous silicon 3.

【0014】従って、従来は実装技術により行っていた
受光素子と発光素子との光結合を、本実施形態において
はSOI基板を用いてSOI基板の内の一方の単結晶シ
リコン基板を陽極酸化することにより多孔質シリコン3
を形成し、他方の単結晶シリコン基板1に受光素子4を
形成し、多孔質シリコン3に発光素子5を形成して受光
素子4と発光素子5とを対向配置するようにしたので、
チップ面積を小型化することができる。
Therefore, in the present embodiment, the optical coupling between the light receiving element and the light emitting element, which has been conventionally performed by the mounting technology, is performed by using the SOI substrate to anodize one of the single crystal silicon substrates of the SOI substrate. With porous silicon 3
Is formed, the light receiving element 4 is formed on the other single crystal silicon substrate 1, the light emitting element 5 is formed on the porous silicon 3, and the light receiving element 4 and the light emitting element 5 are arranged to face each other.
The chip area can be reduced.

【0015】また、受光素子4に対向する箇所にシリコ
ン酸化膜2を介して発光素子5を形成するようにしたの
で、受光素子4への受光効率を高めることができる。
Further, since the light emitting element 5 is formed at the position facing the light receiving element 4 with the silicon oxide film 2 interposed therebetween, the light receiving efficiency to the light receiving element 4 can be improved.

【0016】[0016]

【発明の効果】請求項1または請求項2記載の発明は、
単結晶シリコン基板上に絶縁膜を介して多孔質シリコン
を形成し、単結晶シリコン基板に受光素子を形成し、多
孔質シリコンに発光素子を形成して、発光素子と受光素
子とが対向配置して成るので、受光素子への受光効率を
高めることができ、チップ面積の増大を招くことなく、
光起電力を低下させずに入射光を受光することのできる
半導体装置を提供することができた。
According to the first or second aspect of the present invention,
Porous silicon is formed on a single crystal silicon substrate via an insulating film, a light receiving element is formed on the single crystal silicon substrate, a light emitting element is formed on the porous silicon, and the light emitting element and the light receiving element are arranged facing each other. Therefore, it is possible to increase the light receiving efficiency to the light receiving element, without increasing the chip area,
A semiconductor device capable of receiving incident light without reducing the photovoltaic power can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態に係る受発光集積化素子を
示す略断面図である。
FIG. 1 is a schematic sectional view showing a light emitting and receiving integrated device according to an embodiment of the present invention.

【図2】従来例に係る受発光集積化素子を示す略断面図
である。
FIG. 2 is a schematic cross-sectional view showing a light emitting and receiving integrated device according to a conventional example.

【符号の説明】[Explanation of symbols]

1 単結晶シリコン基板 2 シリコン酸化膜 3 多孔質シリコン 4 受光素子 5 発光素子 6a,6b シリコン島 DESCRIPTION OF SYMBOLS 1 Single crystal silicon substrate 2 Silicon oxide film 3 Porous silicon 4 Light receiving element 5 Light emitting element 6a, 6b Silicon island

───────────────────────────────────────────────────── フロントページの続き (72)発明者 白井 良史 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 早崎 嘉城 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 鈴木 裕二 大阪府門真市大字門真1048番地松下電工株 式会社内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yoshifumi Shirai 1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works, Ltd. (72) Inventor Yuji Suzuki 1048 Kazuma Kadoma, Kadoma City, Osaka Inside Matsushita Electric Works, Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 受光素子が形成されて成る単結晶シリコ
ン基板と、発光素子が形成され、該半導体基板の一主表
面上に絶縁膜を介して形成された多孔質シリコンとを有
し、前記発光素子と前記受光素子とが前記絶縁膜を介し
て対向配置されて成ることを特徴とする半導体装置。
1. A semiconductor device comprising: a single-crystal silicon substrate on which a light-receiving element is formed; and porous silicon, on which a light-emitting element is formed, and which is formed on one main surface of the semiconductor substrate via an insulating film. A semiconductor device, wherein a light emitting element and the light receiving element are arranged to face each other with the insulating film interposed therebetween.
【請求項2】 前記多孔質シリコンを、単結晶シリコン
基板を陽極酸化することにより変質させて形成するよう
にしたことを特徴とする請求項1記載の半導体装置。
2. The semiconductor device according to claim 1, wherein said porous silicon is formed by altering a single crystal silicon substrate by anodic oxidation.
JP1903097A 1997-01-31 1997-01-31 Semiconductor device Pending JPH10223925A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1903097A JPH10223925A (en) 1997-01-31 1997-01-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1903097A JPH10223925A (en) 1997-01-31 1997-01-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH10223925A true JPH10223925A (en) 1998-08-21

Family

ID=11988065

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1903097A Pending JPH10223925A (en) 1997-01-31 1997-01-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH10223925A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001047034A3 (en) * 1999-12-22 2002-08-08 Micronas Gmbh Optical transmitting and receiving device and a production method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001047034A3 (en) * 1999-12-22 2002-08-08 Micronas Gmbh Optical transmitting and receiving device and a production method therefor
JP2004501502A (en) * 1999-12-22 2004-01-15 ミクロナス ゲーエムベーハー Method of manufacturing optical transmitting / receiving device, and optical transmitting / receiving device manufactured based on the method
US6916673B2 (en) 1999-12-22 2005-07-12 Micronas Gmbh Method for producing an optical transmitting and receiving device and a transmitting and receiving device produced according to said method

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