JPH10223829A - Integrated circuit device and its mounting substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent influence on a real circuit constitution part realizing an original function even if a crack occurs or a terminal breaks by arranging a test terminal which switches the validity and the invalidity of a signal by the switching of the validity/invalidity of the test terminal at the end part of an integrated circuit device package by means of making it adjacent to the other terminal. SOLUTION: A switch terminal 21 to which the switch signal is given is arranged adjacently to a power terminal 22. A short circuit 24 shorting an inverter circuit 23 inverting the level of the switch signal given to the switch terminal 21, the switch terminal 21 and the power terminal 22 is provided. The power terminal 22 and the switch terminal 21 are shorted outside the integrated circuit device package 1, and the test terminal can be set to be invalid by the switch signal fixed to an 'L'-level outputted from the inverter circuit 23. Thus, the real circuit constitution part realizing the original function is not affected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a real circuit component for realizing an original function, a function terminal for inputting / outputting a signal of the real circuit component, and a signal input / output for testing the real circuit component. More particularly, the present invention relates to an integrated circuit device suitable for use in an IC card, a mobile terminal, and the like, and a substrate for mounting the same.

[0002]

2. Description of the Related Art For example, in a conventional integrated circuit device used for a non-contact IC card, a device in which a communication function and a data processing function are integrated into one chip is often used. In such an integrated circuit device, a test terminal is provided for separately testing the communication function unit and the data processing unit. This test terminal is a terminal for testing whether or not a predetermined standard predetermined at a stage of manufacturing the integrated circuit device before being mounted on the mounting board is satisfied. This terminal is unnecessary for realizing the function as an IC card, and does not contribute to the operation for realizing the function as the original non-contact IC card.

[0003] Such an integrated circuit device has a non-contact I
Besides the C card, it is widely used in portable electronic devices such as PDAs and electronic organizers. In addition, the non-contact IC card has been introduced for FA tags (factory automation), ski lift tickets, building entry / exit management, etc.
It is going to be used widely. Such electronic devices are required to be reduced in weight and thickness in order to be carried by a person, and small and thin packages tend to be used for integrated circuit devices mounted on such electronic devices. The thickness of the terminal for soldering the integrated circuit device housed in such a small and thin package to the mounting board is configured to be thin and the width is configured to be small. In this way, a higher density is achieved in the technology for mounting the integrated circuit device on the mounting substrate.

[0004]

Since the conventional integrated circuit device and its mounting substrate are constructed as described above, for example, the solder between the integrated circuit device and its mounting substrate is caused by an impact caused by a fall accident during carrying. There has been a problem that cracks are easily generated in the connection portion.

The present invention has been made to solve the above-described problems, and effectively prevents the occurrence of cracks in the solder connection between a terminal of an integrated circuit device and a mounting board thereof due to an applied impact. And an integrated circuit device and a mounting board for mounting the same, which can prevent the cracks and the terminals from being broken, thereby preventing the actual circuit components realizing the original functions from being affected. The purpose is to gain.

[0006]

According to the first aspect of the present invention, there is provided an integrated circuit device in which a signal input / output from a test terminal is validated during a test and invalidated during a test other than the test. The test terminal has switching means, and the test terminal in which the signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged adjacent to another terminal at an end of an integrated circuit device package.

According to a second aspect of the present invention, there is provided an integrated circuit device in which a test terminal whose input / output signal is valid or invalid is switched by a test terminal valid / invalid switching means at another end of the integrated circuit device package. It is arranged adjacent to the test terminal.

According to a third aspect of the present invention, there is provided an integrated circuit device having a test terminal at which the validity / invalidity of input / output signals is switched by a test terminal valid / invalid switching means at an end of the integrated circuit device package. Are arranged next to each other.

According to a fourth aspect of the present invention, there is provided an integrated circuit device in which a signal input / output from a test terminal based on a switching signal is validated during a test and is invalidated during a period other than the test. This is provided with switching means.

According to a fifth aspect of the present invention, a signal input / output from the test terminal based on the switching signal is validated at the time of the test, invalidated at times other than the test, and the test terminal. And a test terminal valid / invalid switching means for switching between a signal input from the input terminal and a signal output from the test terminal by an input / output switching signal.

According to a sixth aspect of the present invention, a switching signal is supplied as a predetermined potential level from a switching terminal provided in an integrated circuit device package.

According to a seventh aspect of the present invention, there is provided an integrated circuit device including a switching terminal arranged and arranged adjacent to a power supply terminal of an actual circuit component.

An integrated circuit device according to an eighth aspect of the present invention is provided with a switching terminal disposed at the end of the integrated circuit device package.

According to a ninth aspect of the present invention, there is provided an integrated circuit device, comprising:
At least one of the test terminals whose invalidity is switched is arranged adjacent to another terminal at an end of the integrated circuit device package, and the other test terminal is alternately adjacent to a functional terminal at a side of the integrated circuit device package. It is arranged and configured.

According to a tenth aspect of the present invention, in the integrated circuit device mounting substrate, a land pattern electrically connected to a test terminal of the integrated circuit device to be mounted is formed as one land pattern. Things.

According to the eleventh aspect of the present invention, in the mounting substrate for an integrated circuit device, a land pattern electrically connected to a test terminal of the integrated circuit device to be mounted is configured as one land pattern. The test terminal is configured to have a width in the longitudinal direction of the test terminal rather than a land pattern electrically connected to the functional terminal.

According to a twelfth aspect of the present invention, there is provided a mounting board for an integrated circuit device, wherein a land pattern electrically connected to a test terminal and a functional terminal arranged and arranged alternately adjacent to a side of the integrated circuit device package. Are configured as one land pattern.

According to a thirteenth aspect of the present invention, there is provided a mounting board for an integrated circuit device, comprising a land pattern electrically connected to a power supply terminal and a switching terminal arranged adjacent to the integrated circuit device to be mounted. This is configured as one land pattern.

According to a fourteenth aspect of the present invention, in the mounting board for an integrated circuit device, a land pattern electrically connected to a test terminal of the integrated circuit device to be mounted is formed as one land pattern. A power supply terminal of the integrated circuit device to be mounted, which is configured to have a width in a longitudinal direction of the test terminal more than a land pattern electrically connected to a functional terminal, and further arranged and configured adjacent to each other. And a land pattern electrically connected to the switching terminal is configured as one land pattern.

According to a fifteenth aspect of the present invention, there is provided a mounting board for an integrated circuit device, wherein a land pattern electrically connected to a power supply terminal and a switching terminal arranged adjacent to the integrated circuit device to be mounted is provided. And one land pattern, and has a width in the longitudinal direction of the power supply terminal and the switching terminal more than a land pattern electrically connected to the functional terminal.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a plan view showing an integrated circuit device provided with a functional terminal and a test terminal according to a first embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. In the figure, reference numeral 1 denotes an integrated circuit device package, 2 denotes test terminals collected at both ends of an edge of the integrated circuit device package 1 to and from which a signal at the time of testing a real circuit component is input / output, and 3 denotes an original function. This is a functional terminal for inputting / outputting a signal of a real circuit component to be realized. Reference numeral 4 denotes a test terminal land pattern formed on a printed wiring board (mounting substrate) A on which the integrated circuit device is mounted, and is electrically connected to the test terminals 2 by soldering. The test terminal land pattern 4 is configured as a single land pattern to which a plurality of test terminals 2 collected at the edge of the side of the integrated circuit device package 1 are connected in common. Reference numeral 5 denotes a plurality of land patterns which are arranged near the center of the side of the integrated circuit device package 1 and are independently connected to the respective functional terminals 3 formed on the printed wiring board A.

A test as to whether or not the integrated circuit device satisfies electrical standards is performed in detail using the test terminals 2 before being mounted on the printed circuit board.
Since the test is not performed after being mounted on the printed wiring board as an actual product such as a non-contact IC card, the test terminal 2 becomes unnecessary. In order to invalidate the test terminal 2 when the test terminal 2 is an output terminal, the output of the test terminal 2 is set to high impedance. At this time, as shown in FIG. 1, the plurality of test terminals 2 collected at the edge of the side of the integrated circuit device package 1
Soldered to two common lands.

As described above, the test terminal land pattern 4
Is used as a common land, the amount of supplied solder can be increased as compared with the case where land patterns corresponding to individual terminals are provided. In other words, the land area is large, and the amount of solder can be increased without fear of short-circuit, so that the soldering strength with the test terminal 2 can be improved. Usually, it is the end pin that causes a solder crack or a broken lead due to a drop impact. However, in this integrated circuit device, the test terminal 2 is arranged at the end of the side of the integrated circuit device package 1 so that printing is performed. Even if solder cracks or lead breaks occur in the end pins while mounted on the wiring board A, no functional problem occurs.

FIG. 2 is a circuit diagram showing a configuration of the test terminal valid / invalid switching means for validating a signal input / output from the test terminal 2 during a test and invalidating the signal except during the test. The test terminal 2 shown in FIG. 2 is an input / output terminal for inputting / outputting a signal. When the test terminal 2 is an output terminal that outputs only a signal, only the block (test terminal valid / invalid switching means) 11 needs to be provided, and the test terminal 2 performs only signal input. In the case of an input terminal, only the block (test terminal valid / invalid switching means) 12 needs to be provided, and no input / output switching signal is required. In FIG. 2, 11a is an N-channel transistor, 11b is an inverter circuit,
1c is a P-channel transistor, 11d is a 3-input NOR circuit, and 11e is a 3-input NAND circuit. The block 12 includes a three-input NAND circuit 12a.

Next, the operation of the test terminal valid / invalid switching means will be described. In the test process of this integrated circuit device, the switching signal is set to the “H” level, and both the input signal and the output signal input / output from the test terminal 2 become valid. In the mounting stage on the printed wiring board A, the switching signal is set to the “L” level, the output of the test terminal 2 becomes high impedance, and the output of the three-input NAND circuit 12 a of the block 12 is fixed to the “H” level. The signal input from the test terminal 2 becomes invalid, and does not affect the actual circuit components that realize the original functions.

FIG. 3 is an explanatory diagram showing a circuit configuration when the switching signal is set by the potential level applied to the switching terminal. In the figure, reference numeral 21 denotes a switching terminal to which a switching signal is applied, which is arranged adjacent to the power supply terminal 22.
Reference numeral 23 denotes an inverter circuit for inverting the level of the switching signal given to the switching terminal 21. Reference numeral 24 denotes a short circuit that short-circuits the switching terminal 21 and the power supply terminal 22.

In the circuit configuration shown in FIG. 3, a switching terminal 21 is provided, and a power supply terminal 22 is provided outside the integrated circuit device package 1.
And the switching terminal 21 are short-circuited.
For example, the test terminal shown in FIG. 2 can be invalidated by the switching signal fixed to the “L” level output from the terminal 3. When the power terminal 22 is a ground terminal, the inverter circuit 23 is unnecessary. In addition, the setting can be performed using a fuse ROM, a programmable nonvolatile memory, or the like inside the integrated circuit device.

Embodiment 2 FIG. 4 is a plan view showing an integrated circuit device having a functional terminal and a test terminal according to Embodiment 2 of the present invention, and a land pattern of a mounting substrate for the integrated circuit device. 4, the same or corresponding parts as in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In FIG. 4, reference numeral 100 denotes an integrated circuit device package, and 31 denotes a test terminal formed in the longitudinal direction of the test terminal 2 so as to have a width larger than the functional terminal land pattern 5 electrically connected to the functional terminal 3. The test terminal land pattern 31 and the functional terminal land pattern 5 are formed on the printed wiring board A. The test terminal land pattern 31 includes a plurality of test terminals 2 collected on the edge of the side of the integrated circuit device package 100.
Are configured as one land pattern connected in common.

Also in this integrated circuit device, by using the test terminal land pattern 31 as a common land,
The amount of supplied solder can be increased as compared with the case where a land pattern corresponding to each test terminal is provided, and the width of the test terminal land pattern 31 in the longitudinal direction of the test terminal 2 is electrically different from that of the functional terminal 3. Since the width is larger than the width of the functional terminal land pattern 5 to be connected, the increase in the amount of solder supply is remarkable, and the amount of solder can be increased without fear of short-circuit. Can be improved. Usually, it is the end pin that generates a solder crack or a broken lead due to a drop impact. However, even in this integrated circuit device, the test terminal 2 is arranged at the end of the side of the integrated circuit device package 1 so that printing is performed. Even if solder cracks or lead breaks occur in the end pins while mounted on the wiring board A, no functional problem occurs.

Embodiment 3 FIG. 5 is a plan view showing an integrated circuit device having a functional terminal and a test terminal according to Embodiment 3 of the present invention, and a land pattern of a mounting substrate for the integrated circuit device. In FIG. 5, the same or corresponding parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In FIG. 5, reference numeral 200 denotes an integrated circuit device package. In this integrated circuit device, at least one of the test terminals 2 whose signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged at the end of the integrated circuit device package 200 so as to be adjacent to other terminals. The test terminals 2 are arranged side by side with the functional terminals 3 alternately on the sides of the integrated circuit device package 200. Reference numeral 41 denotes a land pattern formed on the printed wiring board A which is electrically connected in common with a pair of the test terminal 2 and the functional terminal 3 which are alternately arranged adjacent to the sides of the integrated circuit device package 200. is there.

Also in this integrated circuit device, by using the land pattern 41 as a common land for the test terminal 2 and the function terminal 3, a land pattern corresponding to each of the test terminal 2 and the function terminal 3 is provided. The amount of solder supplied to the solder joint of the test terminal 2 can be increased, and the amount of solder can be increased without fear of short-circuiting with another land pattern. Soldering strength can be improved.
Although it is the end pin that usually generates a solder crack and a broken lead due to a drop impact, since the test terminal 2 is arranged at the end of the side of the integrated circuit device package 200, it is mounted on the printed wiring board A. Even if solder cracks or lead breaks occur in the end pins in the state where they are set, there is no functional problem.

Embodiment 4 FIG. FIG. 6 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to Embodiment 4 of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. 6 and FIG.
The same or corresponding parts are denoted by the same reference numerals and description thereof is omitted. In FIG. 6, reference numeral 300 denotes an integrated circuit device package. In this integrated circuit device, a plurality of test terminals 2 are arranged at both ends of a side portion, and further, a functional terminal 3 is provided near a central portion of the side portion so as to be sandwiched by the test terminals 2 arranged at these both ends. And switching terminals 21a, 21
b and power supply terminals 22a and 22b are arranged and configured. The switching terminal 21a is, for example, a power supply terminal 22a on the high potential side.
The switching terminal 21b is arranged, for example, at a position adjacent to the power supply terminal 22b on the reference potential side.

The printed circuit board A on which this integrated circuit device is mounted is an integrated circuit device package 300 on which the printed circuit board A is mounted.
The terminal 2 is electrically connected to the test terminal 2 by soldering in the longitudinal direction of the test terminal 2 and has a width greater than that of the functional terminal land pattern 5 electrically connected to the functional terminal 3. A test terminal land pattern 31 is formed. Further, the power supply terminals 22 arranged adjacent to the integrated circuit device package 300 to be mounted are arranged.
and a land pattern electrically connected to the switching terminal 21a is configured as one land pattern 52, and a land pattern electrically connected to the power supply terminal 22b and the switching terminal 21b arranged and arranged adjacent to each other is It is configured as one land pattern 51. In addition, the land pattern 5 for functional terminals, the land pattern 5
Reference numerals 1 and 52 are formed on the printed wiring board A in the same manner as the test terminal land pattern 31.

Also in this integrated circuit device, the test terminal land pattern 31 is used as a common land,
The amount of supplied solder can be increased as compared with the case where a land pattern corresponding to each test terminal is provided, and the width of the test terminal land pattern 31 in the longitudinal direction of the test terminal 2 is electrically different from that of the functional terminal 3. Because the width is larger than the width of the functional terminal land pattern 5 to be connected, the increase in the amount of supplied solder is remarkable, and the amount of solder can be increased without fear of short-circuit. Soldering strength can be improved.
It is the end pins that usually cause solder cracks and lead breaks due to a drop impact. However, since the test terminals 2 are arranged at the ends of the sides of the integrated circuit device package 300, they are mounted on a printed wiring board. Even if solder cracks or lead breaks occur in the end pins in a state where they are in the state, no functional problem occurs.

Further, in this integrated circuit device, when the integrated circuit device package 300 is mounted on a printed wiring board, the power supply terminal 22a and the switching terminal 21a which are arranged adjacent to each other are electrically short-circuited. Because the terminal 22b and the switching terminal 21b are also electrically short-circuited, for example, the test terminal valid / invalid switching means shown in FIG. Has no effect on the actual circuit components that realize the above.

Embodiment 5 FIG. 7 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a fifth embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. In FIG. 7, FIG.
The same or corresponding parts are denoted by the same reference numerals and description thereof is omitted. In FIG. 7, reference numeral 400 denotes an integrated circuit device package. In this integrated circuit device, a plurality of test terminals 2 are arranged at one end of a side, and a plurality of switching terminals 21a or 21b are arranged at the other end of the side. The function terminal 3 and the power supply terminals 22a and 22 are located near the center of the side so as to be sandwiched between the test terminal 2 and the switching terminal 21a or the switching terminal 21b.
b is arranged and configured. In this case, for example, the power supply terminal 22a on the high potential side is arranged at a position adjacent to the switching terminal 21a, and the power supply terminal 22b on the reference potential side is arranged at a position adjacent to the switching terminal 21b.

The printed circuit board A on which the integrated circuit device is mounted is an integrated circuit device package 400 on which the integrated circuit device is mounted.
The terminal 2 is electrically connected to the test terminal 2 by soldering in the longitudinal direction of the test terminal 2 and has a width greater than that of the functional terminal land pattern 5 electrically connected to the functional terminal 3. A test terminal land pattern 31 is formed. Further, the power supply terminals 22 arranged adjacent to the integrated circuit device package 300 to be mounted are arranged.
and the land pattern electrically connected to the switching terminal 21a is configured as one land pattern 61, and the land pattern electrically connected to the power supply terminal 22b and the switching terminal 21b arranged adjacent to each other is It is configured as one land pattern 62. The land patterns 61 and 62 are connected to the power terminals 22a and 2a.
In the longitudinal direction of the switching terminals 2a and the switching terminals 21a, 21b, the width is larger than the function terminal land pattern 5 electrically connected to the function terminal 3. The test terminal land pattern 31, the functional terminal land pattern 5, and the land patterns 61 and 62 are formed on the printed wiring board A.

In this integrated circuit device, the test terminal land pattern 31 is used as a common land,
a and the land pattern 61 electrically connected to the switching terminal 21a and the land pattern 62 electrically connected to the power supply terminal 22b and the switching terminal 21b, respectively, are used as common lands. The amount of solder supplied to the solder joints of the test terminals and the switching terminals can be increased as compared with the case where land patterns corresponding to the test terminals and the switching terminals are individually provided. Since the width of the functional terminal land pattern 5 electrically connected to the terminal 3 is larger than the width, the amount of solder supply is remarkably increased, and the amount of solder can be increased without fear of short-circuit. The soldering strength of the switching terminals 21a and 21b can be improved.

Although it is normally the end pin that generates a solder crack or a broken lead due to a drop impact, this integrated circuit device also includes a test terminal 2 and switching terminals 21a and 21b.
Is arranged at the end of the side of the integrated circuit device package 1, so that no functional problem occurs even if a solder crack or a lead break occurs in the end pin in a state of being mounted on the printed wiring board.

Also in this integrated circuit device, when the integrated circuit device package 400 is mounted on a printed circuit board, the power supply terminals 22a and the switching terminals 21a arranged and adjacent to each other are electrically short-circuited. Since the terminal 22b and the switching terminal 21b are also electrically short-circuited, for example, the test terminal valid / invalid switching means shown in FIG. 2 functions and the signal input from the test terminal 2 becomes invalid, realizing the original function. This has no effect on the actual circuit components.

Embodiment 6 FIG. FIG. 8 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a sixth embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. In FIG.
The same or corresponding parts are denoted by the same reference numerals and description thereof is omitted. In FIG. 8, reference numeral 500 denotes an integrated circuit device package. In this integrated circuit device, at least one of the test terminals 2 whose signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged adjacent to the functional terminal 3 at the end of the integrated circuit device package 500. The other test terminals 2 are also arranged on the sides of the integrated circuit device package 500 alternately adjacent to the functional terminals 3. Further, the test terminal 2 and the functional terminal 3 which are arranged alternately adjacently in this manner.
The switching terminals 21a and 21b and the power supply terminals 22a and 22a are located near the center of the side of the integrated circuit device
22b is arranged and configured. In this case, the switching terminal 21
a and the power supply terminal 22a are arranged to be adjacent to each other, and the switching terminal 21b and the power supply terminal 22b are also arranged to be adjacent to each other.

In this integrated circuit device, the land pattern 41 formed on the printed wiring board A is used as a common land for the test terminal 2 and the function terminal 3, so that the land corresponding to each of the test terminal 2 and the function terminal 3 is provided. The amount of solder supplied to the solder joint of the test terminal 2 can be increased as compared with the case where a pattern is provided, and the amount of solder can be increased without fear of short-circuiting with other land patterns. And the land pattern 41 can be improved in soldering strength. Further, since it is the end pin that usually causes a solder crack and a lead break due to a drop impact, it is possible to prevent a solder crack or a lead break from occurring at a solder joint portion of the switching terminals 21a and 21b. Further, since the test terminals 2 are arranged at the ends of the sides of the integrated circuit device package 500, no functional problem occurs even if a solder crack or a broken lead occurs. Reference numeral 71 denotes a land pattern formed on the printed wiring board A for short-circuiting the power supply terminal 22a and the switching terminal 21a. Reference numeral 72 denotes a land pattern formed on the printed wiring board A for short-circuiting the power supply terminal 22b and the switching terminal 21b.

Also in this integrated circuit device, when the integrated circuit device package 500 is mounted on a printed wiring board, the power supply terminals 22a and the switching terminals 21a arranged adjacent to each other are electrically short-circuited by the land pattern 71. And a power supply terminal 22b and a switching terminal 21b.
Are also electrically short-circuited by the land pattern 72,
For example, the test terminal valid / invalid switching means shown in FIG. 2 functions, and the signal input from the test terminal 2 becomes invalid, so that it does not affect the actual circuit components realizing the original functions.

[0044]

As described above, according to the first aspect of the present invention, the test terminal valid / invalid switching means for validating the signal input / output from the test terminal during the test and invalidating the signal other than the test. Since the test terminal, which is switched between valid and invalid of the signal by the test terminal valid / invalid switching means, is arranged adjacent to another terminal at an end of an integrated circuit device package, the substrate An impact that may be applied while the integrated circuit device is mounted thereon causes cracks or breaks in the solder joints between the test terminals arranged at the ends of the integrated circuit device and the substrate or the test terminals. Occurs, the test terminal is a terminal whose input / output signal is invalidated by the test terminal valid / invalid switching means, and the crack or the test Even break terminal occurs, there is an effect of preventing the influence on the actual circuit components for realizing the original function.

According to the second aspect of the present invention, the signal input / output from the test terminal is made valid during the test,
A test terminal valid / invalid switching means for invalidating the signal other than at the time of testing; and a test terminal at which the signal is switched between valid and invalid by the test terminal valid / invalid switching means is provided at an end of the integrated circuit device package. Is arranged adjacent to the test terminals of the above, so that the test terminals arranged adjacent to each other are soldered on the same land pattern with a sufficient amount of solder supplied in a state where the integrated circuit device is mounted. It is possible to prevent a crack generated at a solder joint between the test terminal of the integrated circuit device and the substrate and a break generated at the test terminal due to an impact that may be applied while the integrated circuit device is mounted. There is an effect that can be done.

According to the third aspect of the present invention, the signal input / output from the test terminal is made valid during the test,
A test terminal valid / invalid switching means for invalidating the signal other than at the time of testing; and a test terminal at which the signal is switched between valid and invalid by the test terminal valid / invalid switching means. Is arranged so as to be adjacent to the functional terminal, so that soldering is performed with a sufficient amount of solder supplied on the same land pattern in a state where the test terminal and the functional terminal arranged adjacent to each other are mounted. It is possible to prevent a crack generated at a solder joint between the test terminal of the integrated circuit device and the substrate and a break generated at the test terminal due to an impact that may be applied while the integrated circuit device is mounted. effective.

According to the fourth aspect of the present invention, there is provided a test terminal valid / invalid switching means for validating a signal input / output from the test terminal based on the switching signal during a test and invalidating the signal other than the test. Since the integrated circuit device is configured to include the integrated circuit device mounted on the substrate, a crack may be generated in a solder joint between the test terminal disposed on the integrated circuit device and the substrate due to an impact that may be applied while the integrated circuit device is mounted on the substrate. Even if the test terminal is broken, the test terminal is a terminal whose input / output signal is invalidated by the switching signal, and even if the crack or the test terminal is broken, the original There is an effect that it is possible to prevent the effect on the actual circuit configuration part that realizes the function.

According to the fifth aspect of the present invention, a signal input / output from the test terminal based on the switching signal is validated during the test, invalidated at times other than the test, and also inputted from the test terminal. Is configured to include a test terminal valid / invalid switching unit that switches between a signal output from the test terminal and a signal output from the test terminal by an input / output switching signal, and thus may be added while the integrated circuit device is mounted on the substrate. Even if cracks occur in the solder joints between the test terminals arranged on the integrated circuit device and the substrate due to impact or the test terminals break, the test terminals are input / output by the switching signal during the test. The signal to be input / output is made valid and switched by the input / output switching signal, and the input / output signal is invalid except at the time of the test. A child, even if broken in the cracks and the test terminals, there is an effect of preventing the influence on the actual circuit components for realizing the original function.

According to the sixth aspect of the present invention, the switching signal is provided as a predetermined potential level from the switching terminal provided in the integrated circuit device package. By soldering to the land pattern at the potential level, there is an effect that the switching signal can be set simultaneously with mounting.

According to the seventh aspect of the present invention, the power supply terminal and the switching terminal of the actual circuit component are arranged adjacent to each other. By using one land pattern that is common to the land pattern connected to the power terminal, there is an effect that the switching signal can be set simultaneously with mounting.

According to the eighth aspect of the present invention, since the switching terminal is arranged at the end of the integrated circuit device package, the land pattern on the substrate to which the switching terminal is connected is replaced with the switching terminal. In this case, a sufficient amount of solder can be used for soldering the switching terminal to the land pattern by sharing the same with a land pattern fixed to a potential level given as a switching signal to the integrated circuit device. This has the effect of preventing cracks occurring at the solder joint between the switching terminal of the integrated circuit device and the land pattern and breakage occurring at the switching terminal due to an impact that may be applied in a state where the switching terminal is in the folded state.

According to the ninth aspect of the present invention, at least one of the test terminals whose signal is switched between valid and invalid by the test terminal valid / invalid switching means is adjacent to another terminal at the end of the integrated circuit device package. And the other test terminals are arranged alternately adjacent to the functional terminals on the sides of the integrated circuit device package, so that the test terminals and the substrate on which the integrated circuit device is mounted are disposed. A sufficient amount of solder can be used in the solder joint, and cracks or switching caused in the solder joint of the test terminal of the integrated circuit device due to an impact that may be applied while the integrated circuit device is mounted are obtained. Breakage occurring at the terminal can be prevented, and even if the crack occurs at the joint or the breakage occurs, the influence on the actual circuit component can be prevented. There is a result.

According to the tenth aspect of the present invention, the land pattern electrically connected to the test terminal of the integrated circuit device to be mounted is formed as one land pattern. It is possible to increase the mechanical strength at the time of mounting by soldering between adjacent terminals with a sufficient amount of solder on the same land pattern, and it is possible to increase the mechanical strength at the time of mounting the integrated circuit device. This has the effect of preventing cracks generated at the solder joints of the test terminals of the integrated circuit device due to a certain impact and breakage generated at the test terminals.

According to the eleventh aspect of the present invention, the land pattern electrically connected to the test terminal of the integrated circuit device to be mounted is formed as one land pattern, and is arranged in the longitudinal direction of the test terminal. Since it is configured to have a width greater than that of the land pattern electrically connected to the functional terminal, it is sufficient on the same land pattern between the adjacent terminals in a state where the integrated circuit device is mounted. It is possible to increase the mechanical strength at the time of mounting by soldering according to the amount of solder supplied, and the impact that may be applied while the integrated circuit device is mounted is generated at the solder joint of the test terminal of the integrated circuit device This has the effect of preventing cracks and breaks occurring in the test terminals.

According to the twelfth aspect of the present invention, the land pattern electrically connected to the test terminals and the functional terminals arranged alternately adjacent to the sides of the integrated circuit device package is formed as one land pattern. Therefore, when the integrated circuit device is mounted, the adjacent test terminals and the functional terminals are soldered on the same land pattern with a sufficient amount of solder supplied to increase the mechanical strength at the time of mounting. And cracks that occur at the solder joints of the test terminals and the functional terminals of the integrated circuit device and impacts that occur at the test terminals and the functional terminals due to an impact that may be applied while the integrated circuit device is mounted. This has the effect of preventing breakage.

According to the thirteenth aspect, the land pattern electrically connected to the power supply terminal and the switching terminal arranged adjacent to the integrated circuit device to be mounted is constituted as one land pattern. Therefore, in a state where the integrated circuit device is mounted, it is possible to increase the mechanical strength at the time of mounting by soldering the adjacent power supply terminal and switching terminal on the same land pattern with a sufficient amount of solder supplied, There is an effect that it is possible to prevent a crack generated at a solder joint between the power supply terminal and the switching terminal of the integrated circuit device and a breakage generated at the power supply terminal and the switching terminal due to an impact that may be applied while the integrated circuit device is mounted.

According to the fourteenth aspect of the present invention, the land pattern electrically connected to the test terminal of the integrated circuit device to be mounted is formed as one land pattern, and the longitudinal direction of the test terminal is formed. A land pattern electrically connected to the function terminal, and further configured to be electrically connected to a power supply terminal and a switching terminal arranged adjacent to the integrated circuit device to be mounted. Since the land pattern to be formed is formed as one land pattern, a sufficient amount of solder is supplied on the same land pattern between adjacent test terminals and between the power supply terminal and the switching terminal when the integrated circuit device is mounted. Can increase the mechanical strength at the time of mounting by soldering, and the impact that may be applied while the integrated circuit device is mounted There is an effect of preventing breakage caused more test terminals of the integrated circuit device, the crack or the test terminals occurring in the solder joint portion of the power supply terminals and the switching terminal.

According to the fifteenth aspect of the present invention, the land pattern electrically connected to the power supply terminal and the switching terminal arranged adjacent to the integrated circuit device to be mounted is constituted as one land pattern. In addition, since the power supply terminal and the switching terminal are configured to have a width in a longitudinal direction of the land pattern electrically connected to the function terminal, the power supply terminal adjacent to the power supply terminal mounted with the integrated circuit device is mounted. Further, it is possible to increase the mechanical strength at the time of mounting by soldering between the switching terminals on the same land pattern with a sufficient amount of solder supplied, and the impact that may be applied in a state where the integrated circuit device is mounted Accordingly, it is possible to prevent cracks generated at the solder joints of the power supply terminal and the switching terminal of the integrated circuit device and breakage generated at the test terminal. There is an effect.

[Brief description of the drawings]

FIG. 1 is a plan view showing an integrated circuit device provided with a functional terminal and a test terminal according to a first embodiment of the present invention, and a land pattern of a mounting substrate thereof.

FIG. 2 is a circuit diagram showing a configuration of a test terminal valid / invalid switching unit in the integrated circuit device according to the first embodiment of the present invention;

FIG. 3 is an explanatory diagram showing a circuit configuration when a switching signal is set by a potential level given to a switching terminal in the integrated circuit device according to the first embodiment of the present invention;

FIG. 4 is a plan view showing a land pattern of an integrated circuit device having a functional terminal and a test terminal according to a second embodiment of the present invention, and a substrate for mounting the integrated circuit device.

FIG. 5 is a plan view showing a land pattern of an integrated circuit device having a functional terminal and a test terminal according to a third embodiment of the present invention, and a substrate for mounting the integrated circuit device.

FIG. 6 is a plan view showing an integrated circuit device provided with a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a fourth embodiment of the present invention, and a land pattern of a mounting board thereof.

FIG. 7 is a plan view showing a land pattern of an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a fifth embodiment of the present invention, and a substrate for mounting the integrated circuit device.

FIG. 8 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a sixth embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device.

[Explanation of symbols]

1, 100, 200, 300, 400, 500 Integrated circuit device package, 2 test terminals, 3 function terminals, 1
1, 12 blocks (test terminal valid / invalid switching means), 21, 21a, 21b switching terminals, 22, 22
a, 22b power supply terminals, 41, 51, 52, 61, 6
2, 71, 72 Land pattern, A Printed wiring board (mounting board).

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[Procedure amendment]

[Submission date] April 11, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction contents]

[Document Name] Statement

Patent application title: Integrated circuit device and substrate for mounting the same

[Claims]

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a real circuit component for realizing an original function, a function terminal for inputting / outputting a signal of the real circuit component, and a signal input / output for testing the real circuit component. More particularly, the present invention relates to an integrated circuit device suitable for use in an IC card, a mobile terminal, and the like, and a substrate for mounting the same.

[0002]

2. Description of the Related Art For example, in a conventional integrated circuit device used for a non-contact IC card, a device in which a communication function and a data processing function are integrated into one chip is often used. In such an integrated circuit device, a test terminal is provided for separately testing the communication function unit and the data processing unit. This test terminal is a terminal for testing whether or not a predetermined standard predetermined at a stage of manufacturing the integrated circuit device before being mounted on the mounting board is satisfied. This terminal is unnecessary for realizing the function as an IC card, and does not contribute to the operation for realizing the function as the original non-contact IC card.

[0003] Such an integrated circuit device has a non-contact I
Besides the C card, it is widely used in portable electronic devices such as PDAs and electronic organizers. In addition, the non-contact IC card has been introduced for FA tags (factory automation), ski lift tickets, building entry / exit management, etc.
It is going to be used widely. Such electronic devices are required to be reduced in weight and thickness in order to be carried by a person, and small and thin packages tend to be used for integrated circuit devices mounted on such electronic devices. The thickness of the terminal for soldering the integrated circuit device housed in such a small and thin package to the mounting board is configured to be thin and the width is configured to be small. In this way, a higher density is achieved in the technology for mounting the integrated circuit device on the mounting substrate.

[0004]

Since the conventional integrated circuit device and its mounting substrate are constructed as described above, for example, the solder between the integrated circuit device and its mounting substrate is caused by an impact caused by a fall accident during carrying. There has been a problem that cracks are easily generated in the connection portion.

The present invention has been made to solve the above-described problems, and effectively prevents the occurrence of cracks in the solder connection between a terminal of an integrated circuit device and a mounting board thereof due to an applied impact. And an integrated circuit device and a mounting board for mounting the same, which can prevent the cracks and the terminals from being broken, thereby preventing the actual circuit components realizing the original functions from being affected. The purpose is to gain.

[0006]

According to the first aspect of the present invention, there is provided an integrated circuit device in which a signal input / output from a test terminal is validated during a test and invalidated during a test other than the test. The test terminal has switching means, and the test terminal in which the signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged adjacent to another terminal at an end of an integrated circuit device package.

According to a second aspect of the present invention, there is provided an integrated circuit device in which a test terminal whose input / output signal is valid or invalid is switched by a test terminal valid / invalid switching means at another end of the integrated circuit device package. It is arranged adjacent to the test terminal.

According to a third aspect of the present invention, there is provided an integrated circuit device having a test terminal at which the validity / invalidity of input / output signals is switched by a test terminal valid / invalid switching means at an end of the integrated circuit device package. Are arranged next to each other.

According to a fourth aspect of the present invention, there is provided an integrated circuit device in which a signal input / output from a test terminal based on a switching signal is validated during a test and is invalidated during a period other than the test. This is provided with switching means.

According to a fifth aspect of the present invention, a switching signal is supplied as a predetermined potential level from a switching terminal provided in an integrated circuit device package.

According to a sixth aspect of the present invention, there is provided an integrated circuit device having a switching terminal arranged and arranged adjacent to a power supply terminal of an actual circuit component.

According to a seventh aspect of the present invention, there is provided an integrated circuit device including a switching terminal disposed at an end of an integrated circuit device package.

[0013] integrated circuit according to the invention of claim 8 apparatus, the effective signal by testing terminals valid-invalid changeover means,
At least one of the test terminals whose invalidity is switched is arranged adjacent to another terminal at an end of the integrated circuit device package, and the other test terminal is alternately adjacent to a functional terminal at a side of the integrated circuit device package. It is arranged and configured.

[0014] mounting substrate of the integrated circuit device according to the invention of claim 9 wherein constitute a plurality of test terminals and the land pattern electrically connected to the integrated circuit device is implemented as a land pattern It is like that.

The mounting substrate of an integrated circuit device according to the invention of claim 10 wherein the plurality of Te scan <br/> preparative terminal and the land pattern electrically connected to the integrated circuit devices mounted one The test terminal is configured as one land pattern and has a width in the longitudinal direction of the test terminal as compared with a land pattern electrically connected to the functional terminal.

According to an eleventh aspect of the present invention, there is provided a mounting substrate for an integrated circuit device, wherein a land pattern electrically connected to a test terminal and a functional terminal arranged and arranged alternately adjacent to a side of the integrated circuit device package. Are configured as one land pattern.

According to a twelfth aspect of the present invention, there is provided a mounting substrate for an integrated circuit device, comprising a land pattern electrically connected to a power supply terminal and a switching terminal arranged adjacent to the integrated circuit device to be mounted. This is configured as one land pattern.

The mounting substrate of an integrated circuit device according to the invention of claim 13 wherein the plurality of Te scan <br/> preparative terminal and the land pattern electrically connected to the integrated circuit devices mounted one And the land pattern is configured to have a width longer than the land pattern electrically connected to the functional terminal in the longitudinal direction of the test terminal, and is further arranged adjacent to the mounted terminal pattern. And a land pattern electrically connected to a power supply terminal and a switching terminal of the integrated circuit device.

According to a fourteenth aspect of the present invention, there is provided a mounting board for an integrated circuit device, comprising a land pattern electrically connected to a power supply terminal and a switching terminal arranged adjacent to the integrated circuit device to be mounted. And one land pattern, and has a width in the longitudinal direction of the power supply terminal and the switching terminal more than a land pattern electrically connected to the functional terminal.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a plan view showing an integrated circuit device provided with a functional terminal and a test terminal according to a first embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. In the figure, reference numeral 1 denotes an integrated circuit device package, 2 denotes test terminals collected at both ends of an edge of the integrated circuit device package 1 to and from which a signal at the time of testing a real circuit component is input / output, and 3 denotes an original function. This is a functional terminal for inputting / outputting a signal of a real circuit component to be realized. Reference numeral 4 denotes a test terminal land pattern formed on a printed wiring board (mounting substrate) A on which the integrated circuit device is mounted, and is electrically connected to the test terminals 2 by soldering. The test terminal land pattern 4 is configured as a single land pattern to which a plurality of test terminals 2 collected at the edge of the side of the integrated circuit device package 1 are connected in common. Reference numeral 5 denotes a plurality of land patterns which are arranged near the center of the side of the integrated circuit device package 1 and are independently connected to the respective functional terminals 3 formed on the printed wiring board A.

The test of whether or not this integrated circuit device satisfies the electrical standard is performed in detail using the test terminals 2 before being mounted on the printed wiring board.
Since the test is not performed after being mounted on the printed wiring board as an actual product such as a non-contact IC card, the test terminal 2 becomes unnecessary. In order to invalidate the test terminal 2 when the test terminal 2 is an output terminal, the output of the test terminal 2 is set to high impedance. At this time, as shown in FIG. 1, the plurality of test terminals 2 collected at the edge of the side of the integrated circuit device package 1
Soldered to two common lands.

As described above, the test terminal land pattern 4
Is used as a common land, the amount of supplied solder can be increased as compared with the case where land patterns corresponding to individual terminals are provided. In other words, the land area is large, and the amount of solder can be increased without fear of short-circuit, so that the soldering strength with the test terminal 2 can be improved. Usually, it is the end pin that causes a solder crack or a broken lead due to a drop impact. However, in this integrated circuit device, the test terminal 2 is arranged at the end of the side of the integrated circuit device package 1 so that printing is performed. Even if solder cracks or lead breaks occur in the end pins while mounted on the wiring board A, no functional problem occurs.

FIG. 2 is a circuit diagram showing a configuration of the test terminal valid / invalid switching means for validating a signal input / output from the test terminal 2 during a test and invalidating the signal except during the test. The test terminal 2 shown in FIG. 2 is an input / output terminal for inputting / outputting a signal. When the test terminal 2 is an output terminal that outputs only a signal, only the block (test terminal valid / invalid switching means) 11 needs to be provided, and the test terminal 2 performs only signal input. In the case of an input terminal, only the block (test terminal valid / invalid switching means) 12 needs to be provided, and no input / output switching signal is required. In FIG. 2, 11a is an N-channel transistor, 11b is an inverter circuit,
1c is a P-channel transistor, 11d is a 3-input NOR circuit, and 11e is a 3-input NAND circuit. The block 12 includes a three-input NAND circuit 12a.

Next, the operation of the test terminal valid / invalid switching means will be described. In the test process of this integrated circuit device, the switching signal is set to the “H” level, and both the input signal and the output signal input / output from the test terminal 2 become valid. In the mounting stage on the printed wiring board A, the switching signal is set to the “L” level, the output of the test terminal 2 becomes high impedance, and the output of the three-input NAND circuit 12 a of the block 12 is fixed to the “H” level. The signal input from the test terminal 2 becomes invalid, and does not affect the actual circuit components that realize the original functions.

FIG. 3 is an explanatory diagram showing a circuit configuration when the switching signal is set by the potential level given to the switching terminal. In the figure, reference numeral 21 denotes a switching terminal to which a switching signal is applied, which is arranged adjacent to the power supply terminal 22.
Reference numeral 23 denotes an inverter circuit for inverting the level of the switching signal given to the switching terminal 21. Reference numeral 24 denotes a short circuit that short-circuits the switching terminal 21 and the power supply terminal 22.

In the circuit configuration shown in FIG. 3, a switching terminal 21 is provided, and a power supply terminal 22 is provided outside the integrated circuit device package 1.
And the switching terminal 21 are short-circuited.
For example, the test terminal shown in FIG. 2 can be invalidated by the switching signal fixed to the “L” level output from the terminal 3. When the power terminal 22 is a ground terminal, the inverter circuit 23 is unnecessary. In addition, the setting can be performed using a fuse ROM, a programmable nonvolatile memory, or the like inside the integrated circuit device.

Embodiment 2 FIG. FIG. 4 is a plan view showing an integrated circuit device having a functional terminal and a test terminal according to Embodiment 2 of the present invention, and a land pattern of a mounting substrate for the integrated circuit device. 4, the same or corresponding parts as in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In FIG. 4, reference numeral 100 denotes an integrated circuit device package, and 31 denotes a test terminal formed in the longitudinal direction of the test terminal 2 so as to have a width larger than the functional terminal land pattern 5 electrically connected to the functional terminal 3. The test terminal land pattern 31 and the functional terminal land pattern 5 are formed on the printed wiring board A. The test terminal land pattern 31 includes a plurality of test terminals 2 collected on the edge of the side of the integrated circuit device package 100.
Are configured as one land pattern connected in common.

Also in this integrated circuit device, by using the test terminal land pattern 31 as a common land,
The amount of supplied solder can be increased as compared with the case where a land pattern corresponding to each test terminal is provided, and the width of the test terminal land pattern 31 in the longitudinal direction of the test terminal 2 is electrically different from that of the functional terminal 3. Since the width is larger than the width of the functional terminal land pattern 5 to be connected, the increase in the amount of solder supply is remarkable, and the amount of solder can be increased without fear of short-circuit. Can be improved. Usually, it is the end pin that generates a solder crack or a broken lead due to a drop impact. However, even in this integrated circuit device, the test terminal 2 is arranged at the end of the side of the integrated circuit device package 1 so that printing is performed. Even if solder cracks or lead breaks occur in the end pins while mounted on the wiring board A, no functional problem occurs.

Embodiment 3 FIG. 5 is a plan view showing an integrated circuit device having a functional terminal and a test terminal according to Embodiment 3 of the present invention, and a land pattern of a mounting substrate for the integrated circuit device. In FIG. 5, the same or corresponding parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In FIG. 5, reference numeral 200 denotes an integrated circuit device package. In this integrated circuit device, at least one of the test terminals 2 whose signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged at the end of the integrated circuit device package 200 so as to be adjacent to other terminals. The test terminals 2 are arranged side by side with the functional terminals 3 alternately on the sides of the integrated circuit device package 200. Reference numeral 41 denotes a land pattern formed on the printed wiring board A which is electrically connected in common with a pair of the test terminal 2 and the functional terminal 3 which are alternately arranged adjacent to the sides of the integrated circuit device package 200. is there.

Also in this integrated circuit device, by using the land pattern 41 as a common land for the test terminal 2 and the function terminal 3, a land pattern corresponding to each of the test terminal 2 and the function terminal 3 is provided. The amount of solder supplied to the solder joint of the test terminal 2 can be increased, and the amount of solder can be increased without fear of short-circuiting with another land pattern. Soldering strength can be improved.
Although it is the end pin that usually generates a solder crack and a broken lead due to a drop impact, since the test terminal 2 is arranged at the end of the side of the integrated circuit device package 200, it is mounted on the printed wiring board A. Even if solder cracks or lead breaks occur in the end pins in the state where they are set, there is no functional problem.

Embodiment 4 FIG. FIG. 6 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to Embodiment 4 of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. 6 and FIG.
The same or corresponding parts are denoted by the same reference numerals and description thereof is omitted. In FIG. 6, reference numeral 300 denotes an integrated circuit device package. In this integrated circuit device, a plurality of test terminals 2 are arranged at both ends of a side portion, and further, a functional terminal 3 is provided near a central portion of the side portion so as to be sandwiched by the test terminals 2 arranged at these both ends. And switching terminals 21a, 21
b and power supply terminals 22a and 22b are arranged and configured. The switching terminal 21a is, for example, a power supply terminal 22a on the high potential side.
The switching terminal 21b is arranged, for example, at a position adjacent to the power supply terminal 22b on the reference potential side.

The printed wiring board A on which the integrated circuit device is mounted is an integrated circuit device package 300 to be mounted.
The terminal 2 is electrically connected to the test terminal 2 by soldering in the longitudinal direction of the test terminal 2 and has a width greater than that of the functional terminal land pattern 5 electrically connected to the functional terminal 3. A test terminal land pattern 31 is formed. Further, the power supply terminals 22 arranged adjacent to the integrated circuit device package 300 to be mounted are arranged.
and a land pattern electrically connected to the switching terminal 21a is configured as one land pattern 52, and a land pattern electrically connected to the power supply terminal 22b and the switching terminal 21b arranged and arranged adjacent to each other is It is configured as one land pattern 51. In addition, the land pattern 5 for functional terminals, the land pattern 5
Reference numerals 1 and 52 are formed on the printed wiring board A in the same manner as the test terminal land pattern 31.

Also in this integrated circuit device, the test terminal land pattern 31 is used as a common land,
The amount of supplied solder can be increased as compared with the case where a land pattern corresponding to each test terminal is provided, and the width of the test terminal land pattern 31 in the longitudinal direction of the test terminal 2 is electrically different from that of the functional terminal 3. Because the width is larger than the width of the functional terminal land pattern 5 to be connected, the increase in the amount of supplied solder is remarkable, and the amount of solder can be increased without fear of short-circuit. Soldering strength can be improved.
It is the end pins that usually cause solder cracks and lead breaks due to a drop impact. However, since the test terminals 2 are arranged at the ends of the sides of the integrated circuit device package 300, they are mounted on a printed wiring board. Even if solder cracks or lead breaks occur in the end pins in a state where they are in the state, no functional problem occurs.

Further, in this integrated circuit device, when the integrated circuit device package 300 is mounted on a printed wiring board, the power supply terminal 22a and the switching terminal 21a which are arranged adjacent to each other are electrically short-circuited. Because the terminal 22b and the switching terminal 21b are also electrically short-circuited, for example, the test terminal valid / invalid switching means shown in FIG. Has no effect on the actual circuit components that realize the above.

Embodiment 5 FIG. FIG. 7 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a fifth embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. In FIG. 7, FIG.
The same or corresponding parts are denoted by the same reference numerals and description thereof is omitted. In FIG. 7, reference numeral 400 denotes an integrated circuit device package. In this integrated circuit device, a plurality of test terminals 2 are arranged at one end of a side, and a plurality of switching terminals 21a or 21b are arranged at the other end of the side. The function terminal 3 and the power supply terminals 22a and 22 are located near the center of the side so as to be sandwiched between the test terminal 2 and the switching terminal 21a or the switching terminal 21b.
b is arranged and configured. In this case, for example, the power supply terminal 22a on the high potential side is arranged at a position adjacent to the switching terminal 21a, and the power supply terminal 22b on the reference potential side is arranged at a position adjacent to the switching terminal 21b.

The printed circuit board A on which the integrated circuit device is mounted is an integrated circuit device package 400 to be mounted.
The terminal 2 is electrically connected to the test terminal 2 by soldering in the longitudinal direction of the test terminal 2 and has a width greater than that of the functional terminal land pattern 5 electrically connected to the functional terminal 3. A test terminal land pattern 31 is formed. Further, the power supply terminals 22 arranged adjacent to the integrated circuit device package 300 to be mounted are arranged.
and the land pattern electrically connected to the switching terminal 21a is configured as one land pattern 61, and the land pattern electrically connected to the power supply terminal 22b and the switching terminal 21b arranged adjacent to each other is It is configured as one land pattern 62. The land patterns 61 and 62 are connected to the power terminals 22a and 2a.
In the longitudinal direction of the switching terminals 2a and the switching terminals 21a, 21b, the width is larger than the function terminal land pattern 5 electrically connected to the function terminal 3. The test terminal land pattern 31, the functional terminal land pattern 5, and the land patterns 61 and 62 are formed on the printed wiring board A.

In this integrated circuit device, the test terminal land pattern 31 is used as a common land,
a and the land pattern 61 electrically connected to the switching terminal 21a and the land pattern 62 electrically connected to the power supply terminal 22b and the switching terminal 21b, respectively, are used as common lands. The amount of solder supplied to the solder joints of the test terminals and the switching terminals can be increased as compared with the case where land patterns corresponding to the test terminals and the switching terminals are individually provided. Since the width of the functional terminal land pattern 5 electrically connected to the terminal 3 is larger than the width, the amount of solder supply is remarkably increased, and the amount of solder can be increased without fear of short-circuit. The soldering strength of the switching terminals 21a and 21b can be improved.

In general, it is the end pin that causes a solder crack or a broken lead due to a drop impact. However, in this integrated circuit device, the test terminal 2 and the switching terminals 21a and 21b are used.
Is arranged at the end of the side of the integrated circuit device package 1, so that no functional problem occurs even if a solder crack or a lead break occurs in the end pin in a state of being mounted on the printed wiring board.

Also in this integrated circuit device, when the integrated circuit device package 400 is mounted on a printed wiring board, the power supply terminal 22a and the switching terminal 21a arranged and arranged adjacently are electrically short-circuited, and Since the terminal 22b and the switching terminal 21b are also electrically short-circuited, for example, the test terminal valid / invalid switching means shown in FIG. 2 functions and the signal input from the test terminal 2 becomes invalid, realizing the original function. This has no effect on the actual circuit components.

Embodiment 6 FIG. FIG. 8 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a sixth embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device. In FIG.
The same or corresponding parts are denoted by the same reference numerals and description thereof is omitted. In FIG. 8, reference numeral 500 denotes an integrated circuit device package. In this integrated circuit device, at least one of the test terminals 2 whose signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged adjacent to the functional terminal 3 at the end of the integrated circuit device package 500. The other test terminals 2 are also arranged on the sides of the integrated circuit device package 500 alternately adjacent to the functional terminals 3. Further, the test terminal 2 and the functional terminal 3 which are arranged alternately adjacently in this manner.
The switching terminals 21a and 21b and the power supply terminals 22a and 22a are located near the center of the side of the integrated circuit device
22b is arranged and configured. In this case, the switching terminal 21
a and the power supply terminal 22a are arranged to be adjacent to each other, and the switching terminal 21b and the power supply terminal 22b are also arranged to be adjacent to each other.

In this integrated circuit device, the land pattern 41 formed on the printed wiring board A is used as a common land for the test terminal 2 and the function terminal 3, so that the land corresponding to each of the test terminal 2 and the function terminal 3 is provided. The amount of solder supplied to the solder joint of the test terminal 2 can be increased as compared with the case where a pattern is provided, and the amount of solder can be increased without fear of short-circuiting with other land patterns. And the land pattern 41 can be improved in soldering strength. Further, since it is the end pin that usually causes a solder crack and a lead break due to a drop impact, it is possible to prevent a solder crack or a lead break from occurring at a solder joint portion of the switching terminals 21a and 21b. Further, since the test terminals 2 are arranged at the ends of the sides of the integrated circuit device package 500, no functional problem occurs even if a solder crack or a broken lead occurs. Printed wiring land pattern formed on the substrate A for short-circuiting the power supply terminals 22a and changeover terminal 21a is 71, 72 formed on the printed wiring board A for short-circuiting the power supply terminal 22b and the switching terminal 21b lands It is a pattern.

Also in this integrated circuit device, when the integrated circuit device package 500 is mounted on a printed wiring board, the power supply terminals 22a and the switching terminals 21a arranged adjacent to each other are electrically short-circuited by the land pattern 71. And a power supply terminal 22b and a switching terminal 21b.
Are also electrically short-circuited by the land pattern 72,
For example, the test terminal valid / invalid switching means shown in FIG. 2 functions, and the signal input from the test terminal 2 becomes invalid, so that it does not affect the actual circuit components realizing the original functions.

[0043]

As described above, according to the first aspect of the present invention, the test terminal valid / invalid switching means for validating the signal input / output from the test terminal during the test and invalidating the signal other than the test. Since the test terminal, which is switched between valid and invalid of the signal by the test terminal valid / invalid switching means, is arranged adjacent to another terminal at an end of an integrated circuit device package, the substrate An impact that may be applied while the integrated circuit device is mounted thereon causes cracks or breaks in the solder joints between the test terminals arranged at the ends of the integrated circuit device and the substrate or the test terminals. Occurs, the test terminal is a terminal whose input / output signal is invalidated by the test terminal valid / invalid switching means, and the crack or the test Even break terminal occurs, there is an effect of preventing the influence on the actual circuit components for realizing the original function.

According to the second aspect of the present invention, the signal input / output from the test terminal is made valid during the test,
A test terminal valid / invalid switching means for invalidating the signal other than at the time of testing; and a test terminal at which the signal is switched between valid and invalid by the test terminal valid / invalid switching means. Is arranged adjacent to the test terminals of the above, so that the test terminals arranged adjacent to each other are soldered on the same land pattern with a sufficient amount of solder supplied in a state where the integrated circuit device is mounted. It is possible to prevent a crack generated at a solder joint between the test terminal of the integrated circuit device and the substrate and a break generated at the test terminal due to an impact that may be applied while the integrated circuit device is mounted. There is an effect that can be done.

According to the third aspect of the present invention, the signal input / output from the test terminal is made valid during the test,
A test terminal valid / invalid switching means for invalidating the signal other than at the time of testing; and a test terminal at which the signal is switched between valid and invalid by the test terminal valid / invalid switching means. Is arranged so as to be adjacent to the functional terminal, so that soldering is performed with a sufficient amount of solder supplied on the same land pattern in a state where the test terminal and the functional terminal arranged adjacent to each other are mounted. It is possible to prevent a crack generated at a solder joint between the test terminal of the integrated circuit device and the substrate and a break generated at the test terminal due to an impact that may be applied while the integrated circuit device is mounted. effective.

According to the fourth aspect of the present invention, there is provided a test terminal valid / invalid switching means for validating a signal input / output from the test terminal based on the switching signal during a test and invalidating the signal other than the test. Since the integrated circuit device is configured to include the integrated circuit device mounted on the substrate, a crack may be generated in a solder joint between the test terminal disposed on the integrated circuit device and the substrate due to an impact that may be applied while the integrated circuit device is mounted on the substrate. Even if the test terminal is broken, the test terminal is a terminal whose input / output signal is invalidated by the switching signal, and even if the crack or the test terminal is broken, the original There is an effect that it is possible to prevent the effect on the actual circuit configuration part that realizes the function.

According to the fifth aspect of the present invention, the switching signal is provided as a predetermined potential level from the switching terminal provided in the integrated circuit device package. By soldering to the land pattern at the potential level, there is an effect that the switching signal can be set simultaneously with mounting.

According to the sixth aspect of the present invention, since the power supply terminal and the switching terminal of the actual circuit component are arranged adjacent to each other, the land pattern to which the switching terminal of the integrated circuit device is connected can be By using one land pattern that is common to the land pattern connected to the power terminal, there is an effect that the switching signal can be set simultaneously with mounting.

[0049] According to the invention of claim 7, wherein providing at least one test terminal to the end of the integrated circuit device package and its neighbors or switch and power supply pins inside it is configured to be disposed, The switching terminal, the power supply terminal, and the test terminal are connected to a common land pattern on the substrate, and a power supply potential supplied to the power supply terminal is supplied to supply a power supply and a test terminal switching signal. . Here, it is assumed that the side (power supply potential or reference potential side) that can be shared with the switching signal is selected as the power supply terminal arranged next to the switching terminal. By forming a common land pattern, a sufficient amount of solder can be used for soldering the terminals to the land pattern, and the integrated circuit device is subjected to an impact that may be applied while the integrated circuit device is mounted. This has the effect of preventing cracks occurring at the solder joint between the switching terminal of the device and the land pattern and breakage occurring at the switching terminal.

[0050] According to the invention of claim 8, of the signal by the test pin valid-invalid changeover means effective, side by side with other terminals is at least one of the test terminal is switched invalid at an end of the integrated circuit device package And the other test terminals are arranged alternately adjacent to the functional terminals on the sides of the integrated circuit device package, so that the test terminals and the substrate on which the integrated circuit device is mounted are disposed. A sufficient amount of solder can be used in the solder joint, and cracks or switching caused in the solder joint of the test terminal of the integrated circuit device due to an impact that may be applied while the integrated circuit device is mounted are obtained. Breakage occurring at the terminal can be prevented, and even if the crack occurs at the joint or the breakage occurs, the influence on the actual circuit component can be prevented. There is a result.

[0051] According to the invention of claim 9, wherein, so to constitute a plurality of test terminals and the land pattern electrically connected to the integrated circuit device is implemented as a land pattern, mounting an integrated circuit device In this state, it is possible to increase the mechanical strength at the time of mounting by soldering between the other adjacent terminals on the same land pattern with a sufficient amount of solder supply, and to improve the mechanical strength at the time of mounting the integrated circuit device. This has the effect of preventing cracks occurring at the solder joints of the test terminals of the integrated circuit device and breakage occurring at the test terminals due to the impact that may be applied.

[0052] According to the invention of claim 10, wherein a plurality of test terminals and the land pattern electrically connected to the integrated circuit device is mounted, the test terminal while configured as a single land pattern In the longitudinal direction, it is configured to have a width greater than a land pattern electrically connected to the functional terminal. Therefore, in a state where the integrated circuit device is mounted, the space between the adjacent terminal and the other terminal is on the same land pattern. It is possible to increase the mechanical strength at the time of mounting by soldering with a sufficient amount of solder supplied, and to solder the test terminals of the integrated circuit device by an impact that may be applied while the integrated circuit device is mounted. This has the effect of preventing cracks occurring in the portions and breakage occurring in the test terminals.

According to the eleventh aspect of the present invention, the land pattern electrically connected to the test terminal and the functional terminal arranged alternately adjacent to the side of the integrated circuit device package is formed as one land pattern. Therefore, when the integrated circuit device is mounted, the adjacent test terminals and the functional terminals are soldered on the same land pattern with a sufficient amount of solder supplied to increase the mechanical strength at the time of mounting. And cracks that occur at the solder joints of the test terminals and the functional terminals of the integrated circuit device and impacts that occur at the test terminals and the functional terminals due to an impact that may be applied while the integrated circuit device is mounted. This has the effect of preventing breakage.

According to the twelfth aspect of the present invention, the land pattern electrically connected to the power supply terminal and the switching terminal arranged adjacent to the integrated circuit device to be mounted is constituted as one land pattern. Therefore, in a state where the integrated circuit device is mounted, it is possible to increase the mechanical strength at the time of mounting by soldering the adjacent power supply terminal and switching terminal on the same land pattern with a sufficient amount of solder supplied, There is an effect that it is possible to prevent a crack generated at a solder joint between the power supply terminal and the switching terminal of the integrated circuit device and a breakage generated at the power supply terminal and the switching terminal due to an impact that may be applied while the integrated circuit device is mounted.

[0055] According to the invention of claim 13 wherein, a plurality of test terminals electrically connected land pattern of the integrated circuit device is mounted, the test terminals as well as configured as a single land pattern In the longitudinal direction of the integrated circuit device, the power terminal and the switching terminal are arranged so as to have a width greater than a land pattern electrically connected to the functional terminal. Since the land patterns to be electrically connected are configured as one land pattern, it is possible to sufficiently connect the adjacent test terminals, the power supply terminal, and the switching terminal on the same land pattern when the integrated circuit device is mounted. It is possible to increase the mechanical strength at the time of mounting by soldering according to the amount of solder supplied, and it may be added while the integrated circuit device is mounted. There the test terminals of the integrated circuit device, breaking can be prevented that could occur cracks and the test terminal occurring in the solder joint portion of the power supply terminals and the switching terminal by the impact.

According to the fourteenth aspect of the present invention, the land pattern electrically connected to the power supply terminal and the switching terminal arranged adjacent to the integrated circuit device to be mounted is formed as one land pattern. In addition, since the power supply terminal and the switching terminal are configured to have a width in a longitudinal direction of the land pattern electrically connected to the function terminal, the power supply terminal adjacent to the power supply terminal mounted with the integrated circuit device is mounted. Further, it is possible to increase the mechanical strength at the time of mounting by soldering between the switching terminals on the same land pattern with a sufficient amount of solder supplied, and the impact that may be applied in a state where the integrated circuit device is mounted Accordingly, it is possible to prevent cracks generated at the solder joints of the power supply terminal and the switching terminal of the integrated circuit device and breakage generated at the test terminal. There is an effect. The same effect can be obtained even if a part of the test terminal of the present invention is a non-connection terminal (a terminal not connected to the integrated circuit chip).

[Brief description of the drawings]

FIG. 1 is a plan view showing an integrated circuit device provided with a functional terminal and a test terminal according to a first embodiment of the present invention, and a land pattern of a mounting substrate thereof.

FIG. 2 is a circuit diagram showing a configuration of a test terminal valid / invalid switching unit in the integrated circuit device according to the first embodiment of the present invention;

FIG. 3 is an explanatory diagram showing a circuit configuration when a switching signal is set by a potential level given to a switching terminal in the integrated circuit device according to the first embodiment of the present invention;

FIG. 4 is a plan view showing a land pattern of an integrated circuit device having a functional terminal and a test terminal according to a second embodiment of the present invention, and a substrate for mounting the integrated circuit device.

FIG. 5 is a plan view showing a land pattern of an integrated circuit device having a functional terminal and a test terminal according to a third embodiment of the present invention, and a substrate for mounting the integrated circuit device.

FIG. 6 is a plan view showing an integrated circuit device provided with a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a fourth embodiment of the present invention, and a land pattern of a mounting board thereof.

FIG. 7 is a plan view showing a land pattern of an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a fifth embodiment of the present invention, and a substrate for mounting the integrated circuit device.

FIG. 8 is a plan view showing an integrated circuit device having a functional terminal, a test terminal, a power supply terminal, and a switching terminal according to a sixth embodiment of the present invention, and a land pattern of a substrate for mounting the integrated circuit device.

[Description of Signs] 1,100,200,300,400,500 Integrated circuit device package, 2 test terminals, 3 function terminals, 1
1, 12 blocks (test terminal valid / invalid switching means), 21, 21a, 21b switching terminals, 22, 22
a, 22b power supply terminals, 41, 51, 52, 61, 6
2, 71, 72 Land pattern, A Printed wiring board (mounting board).

[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] Figure 3

[Correction method] Change

[Correction contents]

FIG. 3

[Procedure amendment 3]

[Document name to be amended] Drawing

[Correction target item name] Fig. 7

[Correction method] Change

[Correction contents]

FIG. 7

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 27/04 H01L 27/04 E 21/822 T

Claims (15)

[Claims] A real circuit configuration unit for realizing an original function;
In an integrated circuit device having a function terminal through which signals of the real circuit component are input / output and a test terminal through which a signal at the time of testing the real circuit component is input / output, A test terminal valid / invalid switching means for validating a signal to be applied during a test and invalidating the signal when the test is not performed, wherein the test terminal valid / invalid switching means switches between valid and invalid of the signal. An integrated circuit device is provided, which is arranged adjacent to another terminal at an end of an integrated circuit device package. 2. The integrated circuit device according to claim 1, wherein the other terminal is another test terminal. 3. The integrated circuit device according to claim 1, wherein the other terminal is a function terminal. 4. The test terminal valid / invalid switching means validates a signal input / output from the test terminal based on the switching signal during a test and invalidates the signal except during the test. The integrated circuit device according to any one of claims 1 to 3. 5. The test terminal valid / invalid switching means validates a signal input / output from the test terminal based on the switching signal during a test, invalidates the signal other than during the test, and inputs the signal from the test terminal. 5. The integrated circuit device according to claim 4, wherein a signal to be output and a signal output from a test terminal are switched by an input / output switching signal. 6. The integrated circuit device according to claim 4, wherein the switching signal is supplied as a predetermined potential level from a switching terminal provided in the integrated circuit device package. 7. The integrated circuit device according to claim 6, wherein the switching terminal is arranged adjacent to a power supply terminal of the real circuit component. 8. The integrated circuit device according to claim 7, wherein the switching terminal is arranged at an end of the integrated circuit device package. 9. At least one of test terminals whose signal is switched between valid and invalid by the test terminal valid / invalid switching means is arranged adjacent to other terminals at an end of the integrated circuit device package, and another test is performed. The integrated circuit device according to any one of claims 1 to 8, wherein the terminals for use are arranged alternately adjacent to the functional terminals on the sides of the integrated circuit device package. 10. A mounting board for an integrated circuit device on which the integrated circuit device according to claim 1 is mounted, wherein a test terminal of the integrated circuit device to be mounted is electrically connected to a test terminal of the integrated circuit device. A land pattern connected to the integrated circuit device is configured as one land pattern. 11. A land pattern electrically connected to a test terminal of an integrated circuit device to be mounted is formed as one land pattern, and is electrically connected to a functional terminal in a longitudinal direction of the test terminal. 11. The mounting substrate for an integrated circuit device according to claim 10, wherein the mounting substrate is configured to have a width larger than a land pattern to be connected. 12. A mounting board for an integrated circuit device on which the integrated circuit device according to claim 9 is mounted, wherein the test terminal and the functional terminal are arranged and arranged alternately adjacent to the side of the integrated circuit device package. A mounting substrate for an integrated circuit device, wherein a land pattern to be connected is configured as one land pattern. 13. A land pattern electrically connected to a power supply terminal and a switching terminal arranged adjacently to an integrated circuit device to be mounted is configured as one land pattern. Item 13. A mounting substrate for an integrated circuit device according to item 12. 14. A mounting board for an integrated circuit device on which the integrated circuit device according to claim 7 is mounted.
A land pattern electrically connected to a test terminal of the integrated circuit device to be mounted is configured as one land pattern, and is electrically connected to a functional terminal in a longitudinal direction of the test terminal. The land pattern is configured to have a width greater than the land pattern, and the land pattern electrically connected to the power supply terminal and the switching terminal arranged adjacent to the mounted integrated circuit device is configured as one land pattern. A mounting substrate for an integrated circuit device. 15. A land pattern electrically connected to a power supply terminal and a switching terminal arranged adjacently to an integrated circuit device to be mounted is configured as one land pattern, wherein the power supply terminal and the switching terminal are provided. 15. The mounting board for an integrated circuit device according to claim 14, wherein the mounting board is configured to have a width in a longitudinal direction of the land pattern larger than a land pattern electrically connected to the functional terminal.