JPH10222344A - Waveform processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a high compression rate by a simple processing while restricting the occurrence of damage and a distortion in a waveform. SOLUTION: One kind of data of a memory 1 is stored in a register 2 so as to be adopted as a first sample value, the first sample value and data which is stored in an address being separated by an N power-fold number of two by a sampling cycle in a register 3 so as to be adopted as the second sample value, a peak detecting circuit 8 presumes whether or not the existence of a peak is detected in waveform data between the two values or waveform data between the values by an interpolation processing in an interpolating circuit 5, an error comparing circuit 6 compares difference between the presumed data and original waveform data with an error restricting value, the max. N value is obtained by counting-up the N value of a counter 4 till the difference exceeds the error restricting value and the N value and the first sampling value are outputted from a data synthesizing circuit 7 as compression data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a waveform processing apparatus, and more particularly, to a waveform processing apparatus which compresses waveform data so that the waveform data can be represented by compressed data having a small data amount, and the waveform processing apparatus. The present invention relates to a waveform processing device that can expand compressed data obtained by a processing device to obtain original waveform data.

[0002]

2. Description of the Related Art A conventional waveform processing apparatus is disclosed in
No. 0999, the waveform data is divided into blocks of a fixed size, and the waveform data of the address before and after the waveform data of the address to be processed in the block is interpolated to obtain the difference data from the waveform data of the address to be processed. Is used to compress the waveform data. The conventional waveform processing apparatus also expresses the compressed data by floating-point conversion based on exponents and mantissas.

FIG. 10A is a block diagram showing a configuration of a conventional waveform processing apparatus. In the figure, the conventional waveform processing apparatus has 10 samples (this "10" is a hexadecimal number and 10
A blocking unit 12 that blocks each time (in the form of a hexadecimal number), a binary difference processing unit 14 that acquires difference data from the waveform data blocked by the blocking unit 12, and a common block in each block. Index determining means 16 for determining an index, re-difference processing means 18 for obtaining difference data based on the index determined by the index determining means 16, compressed data generation and transmission for generating and outputting compressed data based on the index and the difference data And a block final data storage unit for storing the quantized final data in the block and supplying the final data to the binary difference processing unit for the next processing.

In the above configuration, when waveform data to be compressed is input, the waveform data is blocked by the blocking means 12. That is, the waveform data is
Zero waveform samples are stored, and the waveform data is divided into blocks for every 10 samples, and 10 samples constitute a processing target of one block. Then, the data of the 10 samples that are divided into blocks are a (1) to a (10). When the blocking process is completed, the binary difference processing unit 14 performs a binary difference process. In the binary difference processing, the quantized final data of the block immediately before the block to be processed is a (0)
And use this. Then, from a (0) to a (10), b (1) to b (10) are determined by performing the following calculation. b (8) = a (8) b (10) = a (10) b (4) = a (4) − (a (0) + a (8)) / 2 b (c) = a (c) − (A (8) + a (10)) / 2 b (2) = a (2)-(a (0) + a (4)) / 2 b (6) = a (6)-(a (4) + a (8)) / 2 b (a) = a (a)-(a (8) + a (c)) / 2 b (e) = a (e)-(a (c) + a (10)) / 2 b (1) = a (1)-(a (0) + a (2)) / 2 b (3) = a (3)-(a (2) + a (4)) / 2 b (5) = a (5)-(a (4) + a (6)) / 2 b (7) = a (7)-(a (6) + a (8)) / 2 b (9) = a (9)-(a (8) + a (a)) / 2 b (b) = a (b)-(a (a) + a (c)) / 2 b (d) = a (d)-(a (c) + a (e) )) / 2 b (f) = a ( )-(A (e) + a (10)) / 2 As described above, for b (8) and b (10), the original data a (8) and a (10) are used as they are, and Is the difference between the value of the sample point and the arithmetic mean of the sample points separated by a predetermined number of samples before and after the sample point.

When the binary difference processing is completed, the exponent is determined by the exponent determining means 16. That is, in order to represent b (1) to b (10) obtained by the binary difference processing with a shorter data amount, a process is performed in which a common exponent is provided for each block and the floating point is represented. When the index is determined by the index determining means 16, the difference is recalculated by the re-difference processing means 18 while calculating the reproducibility at the time of data expansion. That is, b (8) and b (10) are quantized based on the exponent determined by the exponent determining means 16, and the quantized data is set to b_ (8) and b_ (10), respectively. The “quantization” means that the lower bits are padded with 0s corresponding to the exponent, and rounding is performed by adding 1 to the most significant bit of the bits filled with 0s. And a (8) and a (10)
The binary difference processing is performed using b_ (8) and b_ (10) in place of b, and b (1) to b (10) are obtained again.

When the re-difference processing is completed, the exponent and mantissa data d (1) to d (1)
For example, (10) is arranged on data of equal length as shown in FIG. 10 (b) to form one block of compressed data, which is sent to a storage means such as a memory for storage. In preparation for the processing of the block (b), b_ (10) is stored as a new a (0) in the block final data storage means 22, returned to the blocking means 12, and the above processing is repeated. FIG. 12 (a) shows the waveform data shown in FIG. 5 (a) compressed and expanded by about 45% by a conventional waveform processing apparatus. Is recognized.

Another conventional waveform processing apparatus is disclosed in Japanese Unexamined Patent Application Publication No.
As shown in Japanese Patent No. 23498, a plurality of bit strings having the same length as the number of samples of the waveform data are prepared, and corresponding to each sample in chronological order from the leftmost bit of each bit string to obtain a desired data compression ratio. The bits are randomly selected at the same rate as the above, and the selected bits are replaced with a first bit value indicating that the corresponding sample is used, and a second bit indicating that the corresponding sample is not used. A first step of setting the bit value and a first step of each bit string.
A second step of connecting a sample corresponding to the bit value of the above with a straight line to restore a waveform, and calculating an evaluation value of the waveform depending on the number of used samples and the total length of the waveform; and a first and a second step A third step of determining an end condition whether or not a predetermined number of times have been executed; and, if the end condition is not satisfied, applying a genetic algorithm to the group of bit strings, selecting the bit strings, and evaluating the evaluation value. A fourth step in which pairs of relatively high bit strings are created and crossed over, each bit string is mutated and returned to the second step;
When the termination condition is satisfied, a bit string having a bit having a second bit value is selected from the bit string group at the same ratio as the compression rate to be obtained, and a data file is created based on the information held by the selected bit string. Fifth to make
Having the following steps.

FIG. 11A is a flowchart of another conventional waveform processing apparatus. First, N bit strings having the same length as the original number of samples are prepared, and for each bit string, bits are randomly selected at the same ratio as the required data compression ratio and the value is set to “0”. The value of the bit is set to "1". Each bit string indicates a candidate for a set of optimal samples to be obtained. Each bit corresponds to each sample in chronological order from the left end, and the bit value “
A bit value "1" indicates that the sample is used, and a bit value "1" indicates that the sample is used, that is, a set of samples corresponding to the bit value "1" is obtained. The correspondence between each bit and the sample above corresponds to each sample in chronological order from the leftmost bit on the bit string, and the bit value “0” does not use the sample, and the bit value “1”. Indicates that the sample is used. Hereinafter, these bit strings are referred to as individuals.

Next, in step 201, the goodness of each waveform is calculated, and an evaluation value is assigned to each individual. Next, step 2
At 03, it is determined whether or not to end the calculation. Usually, the number of generations to be calculated (steps 201 to 201)
206 loop) is determined in advance. If the end condition is satisfied, in step 107, an individual having a bit of value “0” is selected at the same ratio as the compression ratio obtained in the individual group, and in step 108, data is obtained based on the information of the individual. Create a file.

FIG. 11B shows the format of a data file. The bit string indicated by the individual applied at the top is written as it is. Then, a line feed is performed, and the sample number corresponding to the address of the bit value “1” in the bit string is written in chronological order. When reading this created file, the waveform is restored from the sample.

FIG. 12 (b) shows the waveform data shown in FIG. 5 (a) compressed and expanded by about 29% by another conventional waveform processing apparatus. Distortion that cannot be observed is observed.

[0012]

The above-described conventional waveform processing apparatus has the following problems. (1) In the conventional waveform processing apparatus described in JP-A-8-160999, in order to increase the compression ratio, the number of samples per block is increased, and
Since it is necessary to allocate a small number of bits for each mantissa data in the compressed data, if a waveform with large changes and a waveform with small changes coexist in the same block, the exponent value is determined by the waveform with large changes, and the waveform with small changes Is greatly distorted by the influence of the above.
In another conventional waveform processing apparatus described in Japanese Patent Application Publication No. 98-98, a bit string having the same length as the number of samples of the waveform data is fixedly output as compressed data. Is not so high due to the effect of the bit string, and as a result, the overall compression ratio is also limited. If an attempt is made to obtain a compression ratio above a certain level, the waveform is sharply distorted.

Therefore, in the prior art, when trying to obtain a high compression ratio, there is a high risk that important and delicate portions on the waveform are lost. (2) In the conventional waveform processing apparatus described in JP-A-8-160999, it is necessary to recalculate the difference while calculating the reproducibility of the data by the re-difference processing means. JP-A-8-123498
In another conventional waveform processing apparatus described in Japanese Patent Application Laid-Open No. H10-157, a genetic algorithm is applied to a group of bit strings, the bit strings are culled out, and a pair of bit strings having a relatively high evaluation value is formed and crossed. To mutate each bit string and repeat it until the termination condition is satisfied.

For this reason, in the conventional technology, it is necessary to perform a large number of complicated processes, and the circuit or the program is complicated and large-scale, and accordingly, a long processing time is required.

An object of the present invention is to provide a waveform processing apparatus capable of obtaining a high compression ratio while suppressing occurrence of loss and distortion of important and delicate portions on a waveform.

Another object of the present invention is to simplify the processing for achieving the above-mentioned object, thereby simplifying the circuit or the program, reducing the size of the circuit, and enabling the processing to be performed in a short processing time. It is to provide a processing device.

[0017]

In order to achieve the above object, a waveform processing apparatus according to the present invention comprises a memory for storing original waveform data and an original waveform data stored at a specified address. Read and store the first
First storage means for outputting the original waveform data stored at a specified address from the memory, and second storage means for outputting the second waveform as a second sample value; and An estimated waveform obtained by interpolating waveform data of an address between the address of the first sample value and the address of the second sample value from the first sample value, the second sample value, and the N value by interpolation processing. Interpolating means for outputting as data, and error comparing means for outputting a notice when the difference between the estimated waveform data output from the interpolating means and the original waveform data in the memory exceeds a predetermined error limit value. Reading the original waveform data stored at an address between the address of the first sampled value and the address of the second sampled value from the memory; A peak detecting means for outputting a peak when the peak is equal to or higher than the peak detection sensitivity, and outputting 1 as the N value in the initial state, and adding a value to the current N value by adding 1 to the new value when a count-up instruction is input. When the countdown instruction is input, the current N value becomes 0.
A counter that outputs a value obtained by subtracting 1 from the current N value as a new N value except for the case of (1), and data that combines the first sample value and the N value output from the counter and outputs the result as compressed data The combining means and an address of the original waveform data to be read from the original waveform data stored in the memory are instructed to the first storage means, and the address specified by the first storage means is forwarded by 2 to the Nth power. To the second storage means, and the fact that the peak is detected from the peak detection means or the fact that the difference between the estimated waveform data and the original waveform data exceeds the error limit value is transmitted from the error comparison means. If not, a count-up instruction is output to the counter, an address based on the N value newly output from the counter is instructed to the second storage means, and the peak detection means When the error detection means is notified or the error comparison means informs that the difference between the estimated waveform data and the original waveform data has exceeded the error limit value, a countdown instruction is output to the counter and the data synthesizing means is output. A control circuit for transmitting an instruction to output compressed data.

According to the present invention, the data stored at a certain address in the original waveform data stored in the memory is used as a first sampled value. Data stored at addresses separated by an integer multiple of 0 is used as a second sample value, and the waveform data at an address between the address of the first sample value and the address of the second sample value is predetermined. There is no peak or valley (peak) exceeding the specified value, and the waveform data of the address between the address of the first sampled value and the address of the second sampled value is stored in the first sampled value and the second sampled value. Is estimated from the sample values and the N values by interpolation processing, and the maximum N value that does not cause the difference between the estimated data and the original waveform data to exceed a predetermined error limit value is obtained. Combine N value with compressed data It is intended.

Therefore, by determining the maximum N value having no peak or valley exceeding a predetermined value, important and delicate portions on the waveform are prevented from being lost, and the estimated data and the original waveform data are prevented from being lost. By calculating the maximum N value that does not exceed a predetermined error limit value,
The number of data to be extracted as compressed data from the original waveform data is greatly reduced, and the address of the data is limited to 2 N, so that the number of processes for selecting the optimal sample value is reduced and the number of bits is reduced. The address of the compressed data can be represented, and the division of the data by the address can be performed by the shift processing, thereby eliminating the need for a complicated circuit. Therefore, it is possible to obtain a high compression ratio by a simple process while suppressing the generation of a delicate portion and distortion on a waveform.

Further, the waveform processing apparatus of the present invention reads out and stores the memory for storing the original waveform data and the original waveform data stored at the designated address as the first sample value. First storage means, second storage means for reading out and storing the original waveform data stored at the specified address from the memory and outputting it as a second sample value, and address of the first sample value Waveform data at an address between the first sample value, the second sample value, and the N value is estimated from the first sample value, the second sample value, and the N value by interpolation processing and output as estimated waveform data. Interpolating means, and error comparing means for outputting an error when the difference between the estimated waveform data output from the interpolating means and the original waveform data in the memory exceeds a predetermined error limit value. In the initial state, 1 is output as the N value. When an instruction to count up is input, a value obtained by adding 1 to the current N value is used as a new N value. When an instruction to count down is input, the current N value is 0. A counter that outputs a value obtained by subtracting 1 from the current N value as a new N value, the first sampled value and the N output from the counter.
A data synthesizing means for synthesizing a value and outputting as compressed data; and an address of the original waveform data to be read from the original waveform data stored in the memory, instructing the first storage means, Instructs the second storage means an address which is 2N higher than the address specified by the means, and notifies the error comparing means that the difference between the estimated waveform data and the original waveform data exceeds the error limit value. If not, a count-up instruction is output to the counter, an address based on the N value newly output from the counter is instructed to the second storage means, and the estimated waveform data and original waveform data are output from the error comparison means. When it is notified that the difference exceeds the error limit value, a countdown instruction is output to the counter and a compressed data output instruction is transmitted to the data synthesizing means. And a control circuit.

According to the present invention, the address of the first sample value and the second
Without considering whether a peak or a valley (peak) exceeding a predetermined value exists in the waveform data at an address between the address of the first sample value and the address of the second sample value. The waveform data of the address between the sample value and the address is estimated from the first sample value and the second sample value by interpolation, and the difference between the estimated data and the original waveform data is a predetermined error limit value. The maximum N value not exceeding?

Therefore, by slightly sacrificing the reproducibility of the expanded waveform, the compression ratio can be further increased and the circuit configuration or the program can be simplified.

According to an embodiment of the present invention, the error limit value is obtained from a difference between the first sample value and the second sample value.

According to the present invention, the error limit value is obtained from the difference between the first sample value and the second sample value. Therefore, by increasing the error limit value in a portion of a waveform where the error is large and the change of the waveform is large, the allowable error can be widened and a higher compression ratio can be obtained.

Further, the waveform processing apparatus of the present invention expands the compressed data created by compressing the waveform data and composed of sample values and N values, and outputs the expanded data as expanded data. First sample value storage means for storing and outputting a sample value in the compressed data at a designated timing, and second sample value storing and outputting the output of the first sample value storage means at a designated timing Value storage means, first N value storage means for storing and outputting the N value in the compressed data at a designated timing, and storing and outputting the output of the first N value storage means at a designated timing A second N-value storage means for performing the interpolation processing at the instructed timing of the output of the first sample value storage means, the output of the second sample value storage means, and the output of the second N value storage means To expand Interpolating means for outputting a sample value or an N value to the first sample value storage means, the second sample value storage means, the first N value storage means, and the second N value storage means. And a control circuit for instructing the interpolating means when to perform an interpolation process.

According to the present invention, a combination of two consecutive sets of sample values and N values in compressed data is stored, and interpolation is performed between the stored two sets of sample values and one previously read N value. Decompressed data is created by processing. Therefore, the compressed data can be expanded by a simple circuit or program.

[0027]

Next, an embodiment of the present invention will be described in detail with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram of a waveform processing apparatus according to a first embodiment of the present invention, and FIG. 2 is a flowchart showing the operation of the waveform processing apparatus of FIG.

Referring to FIG. 1, a waveform processing apparatus according to the present embodiment includes a memory 1 for storing original waveform data, a control circuit 9
The register 2 reads out and stores the original waveform data stored at the address specified from the memory 1 and outputs it as the first sampled value, and stores the original waveform data stored at the address specified by the control circuit 9. A register 3 that reads and stores the data from the memory 1 and outputs the second sampled value as the second sampled value, and stores the waveform data at an address between the address of the first sampled value and the address of the second sampled value as the first sampled value.
An interpolation circuit 5 for inferring by interpolation processing from the sample value of the second sample value and the N value and outputting it as estimated waveform data, an estimated waveform data output from the interpolation circuit 5 and an original waveform in the memory 1. When the difference from the data exceeds a predetermined error limit value, an error comparison circuit 6 for notifying the control circuit 9 of the fact;
The original waveform data stored at an address between the address of the first sample value and the address of the second sample value is stored in the memory 1
And a peak detection circuit 8 for transmitting a peak detection sensitivity value equal to or greater than a predetermined peak detection sensitivity value to the control circuit 9 in the read original waveform data, and outputting 1 as an N value in an initial state. When a count-up instruction is input from the control circuit 9, a value obtained by adding 1 to the current N value is set as a new N value, and when a count-down instruction is input from the control circuit 9, the current N value is changed except when the current N value is 0. Counter 4 for outputting a value obtained by subtracting 1 from the N value as a new N value
And a data synthesizing circuit 7 for synthesizing the first sampled value output from the register 2 and the N value output from the counter 4 and outputting as compressed data, and reading from the original waveform data stored in the memory 1 The address of the original waveform data to be supplied is instructed to the register 2, and the address ahead of the address specified in the register 2 by N to the Nth power is instructed to the register 3.
Unless the fact that the peak is detected from the peak detection circuit 8 or the fact that the difference between the estimated waveform data and the original waveform data exceeds the error limit value is not transmitted from the error comparison circuit 6, the count-up instruction is output to the counter 4 and the counter 4 is output. 4. Instruct register 3 of the address based on the N value newly output from 4,
When a signal indicating that a peak is detected from the peak detecting circuit 8 or a signal indicating that the difference between the estimated waveform data and the original waveform data exceeds the error limit value is transmitted from the error comparing circuit 6, a countdown instruction is output to the counter 4 and the data is output. And a control circuit 9 for transmitting an instruction to output compressed data to the synthesizing circuit 7.

Here, the N value output from the counter 4 is counted up or down one by one from the initial state of 1. If the N value is 0, the N value is not counted down any more, so the N value is an integer of 0 or more.

Next, the operation of the embodiment of the present invention will be described in detail with reference to the flowchart of FIG.

Here, it is assumed that the original waveform data has already been stored in the memory 1. First, the data stored at the first address in the memory 1 is read out and stored in the register 2 as a first sample value (step 101).
Next, the value N of the counter 4 is preset to 1 (step 102). Then, from the address of the first sampled value, N of 2
The data at the addresses up to the riding destination are sequentially read out, and a peak detection circuit 8 checks whether there is a peak or a valley (peak) exceeding the peak detection sensitivity value during that time (step 103). In this case (step 104), the data at the address of the Nth power of 2 from the address of the first sampled value is read from the memory 1,
Is stored as the second sample value (step 105). Then, the interpolation circuit 5 converts the data of the address between the first sample value and the second sample value into the first sample value and the second sample value, that is, the value stored in the register 2 and the register 3 and N It is inferred from the values by interpolation (step 106).

The formula for the interpolation is, for example, N = 2, the first sampled value is S (0), the second sampled value is S (4), and the interval between the first sampled value and the second sampled value. S (1) = S (0) + (S (4) −S) where S (1) = S (0) + (S (4) −S (0)) / (2 N power) S (2) = S (1) + (S (4) -S (0)) / (2 N power) S (3) = S (2) + ( S (4) -S (0)) / (2 to the Nth power).

The above interpolation method is merely an example,
Various methods can be applied to the same linear interpolation, and a curve interpolation such as a spline interpolation can also be used. Also,
Here, division by the number of 2 to the power of N can be performed by a shift process.

Next, the estimated waveform data estimated in step 106 is compared with the original waveform data stored in the corresponding address of the memory 1 (step 107), and an error of the estimated waveform data with respect to the original waveform data is determined in advance. The error comparing circuit 6 checks whether or not the error exceeds a predetermined error limit value (step 108). If the error does not exceed the limit value, there is a possibility that the address of the second sample value can be set earlier. The control circuit 9 outputs a count-up instruction to the counter 4 to count up the N value by one, and repeats the processing from step 103 (step 109).

If there is a peak in step 104 or if the error exceeds the limit value in step 108, the control circuit 9 outputs a countdown instruction to the counter 4 to count down one N value (step 1).
10). Then, in accordance with an instruction from the control circuit 9, the data synthesizing circuit 7 synthesizes the first sample value stored in the register 2 with the N value, and outputs it as compressed data (step 1).
11). Next, the second sample value is stored in the register 2 as a new first sample value, and the process returns to step 102 to repeat the above processing (step 112).

Next, using the waveform processing apparatus of this embodiment,
An example in which waveform data of bits × 160 = 1280 bits are actually processed will be described with reference to FIGS. 3, 4, and 5. FIG.

FIG. 3 is a diagram showing the processing status of the 8-bit waveform data by numerical values, FIG. 4 is a diagram showing the compressed data output by the process of FIG. 3, and FIG. 5 is a graph showing the original waveform data of FIG. FIG. 5A is a diagram (FIG. 5A), and FIG. 5B is a diagram (FIG. 5B) showing the expanded data of FIG. 3 in a graph.

The address in FIG. 3 indicates the address of the memory 1, that is, the order of the original waveform data. The original data is the original waveform data, the selected data is the first sampled value, and the decompressed data is the selected data value and N. The expansion error obtained by linear interpolation from the values, and the expansion error is obtained by comparing the original data with the expansion data and calculating the error by value. Referring to FIG. 4, according to the present embodiment, the 1280-bit original data is compressed to (8 bits (selection data) +3 bits (N value)) × 34 = 374 bits, that is, 29% from the 1280-bit original waveform data. You can see that it is.

Also, comparing the graph of the original waveform data of FIG. 5A with the graph of the expanded data of FIG. 5B, the present embodiment shows that the original waveform data is It can be seen that a high compression ratio of 29% is realized with extremely high reproducibility despite the bad condition of being 8-bit data.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 6 is a block diagram of a waveform processing apparatus according to a second embodiment of the present invention.

The waveform processing apparatus according to the present embodiment is obtained by adding an error control circuit 10 to the first embodiment.

The error control circuit 10 obtains the difference between the output of the register 2 and the output of the register 3 and, if the difference is greater than a certain value, outputs a value obtained by multiplying the difference by a certain coefficient as an error limit value. If the difference is smaller than a certain value, a predetermined value is output as an error limit value.

In the first embodiment, the error limit value fixedly determined in the first embodiment is variably determined according to the values of the registers 2 and 3 in the present embodiment.

In this embodiment, the difference between the output of the register 2 and the output of the register 3 is obtained, and a value obtained by multiplying the difference by a predetermined coefficient is used as an error limit value. , So that the error is strictly restricted where the change in the waveform is small. In addition,
If the change in the waveform falls below a certain level, the error is too severely limited, so that the error is limited so that it does not fall below a predetermined value.

In this embodiment, when the difference between the first sample value stored in the register 2 and the second sample value stored in the register 3 is large, that is, when the change in the waveform is large, the error is limited. The value is increased. However, when the change in the waveform is large, the distortion is not conspicuous even if the error is slightly large, so that there is little practical problem.

Therefore, the compression ratio can be increased even in a portion where the waveform changes greatly, and the compression ratio can be further increased as compared with the first embodiment.

(Third Embodiment) Next, a third embodiment of the present invention will be described with reference to the drawings.

FIG. 7 is a block diagram of a waveform processing apparatus according to a third embodiment of the present invention.

The waveform processing apparatus according to the present embodiment is the same as the first embodiment shown in FIG.
In this embodiment, the peak detection circuit 8 is omitted from the embodiment. That is, this embodiment is functionally equivalent to the first embodiment of FIG. 1 in which the peak detection sensitivity value to the peak detection circuit 8 is set to infinity.

The waveform processing apparatus according to the present embodiment has a high possibility of losing subtle changes in the waveform, but requires a small amount of circuitry and can further increase the compression ratio. Therefore, it is suitable for applications where subtle changes in waveform are not important.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described with reference to the drawings.

FIG. 8 is a block diagram of a waveform processing apparatus according to a fourth embodiment of the present invention.

The waveform processing apparatus of the present embodiment uses the second
In this embodiment, the peak detection circuit 8 is omitted from the third embodiment. That is, this embodiment is functionally equivalent to the second embodiment of FIG. 6 in which the peak detection sensitivity value to the peak detection circuit 8 is set to infinity.

As in the third embodiment, the waveform processing apparatus of this embodiment has a high possibility of losing subtle changes in waveform, but requires a smaller amount of circuits and can further increase the compression ratio. It is possible. Therefore, it is suitable for applications where subtle changes in waveform are not important.

(Fifth Embodiment) Next, a fifth embodiment of the present invention will be described with reference to the drawings.

FIG. 9 is a block diagram of a waveform processing apparatus according to a fifth embodiment of the present invention.

In the present embodiment, the compressed data output in the first to fourth embodiments is decompressed and output as decompressed data.

The waveform processing apparatus of this embodiment stores a sample value in the input compressed data at a timing instructed by the control circuit 36 and outputs the sample value. A sample register 33 for storing and outputting at the instructed timing, an N register 32 for storing and outputting the N value in the compressed data at a timing instructed by the control circuit 36, and an instruction from the control circuit 36 for outputting the N register 32 N register 34 for storing and outputting at the specified timing, and interpolation for outputting the output of the sample register 31, the output of the sample register 33, and the output of the N register 34 at the timing instructed by the control circuit 36 to output as decompressed data. Circuit 35 and sample register 3
1, a sample register 33, an N register 3, and a control circuit 36 instructing the N register 34 with a timing to store a sample value or an N value, and instructing an interpolation circuit 35 with a timing to perform an interpolation process.

Next, the operation of this embodiment will be described with reference to FIG.

First, at the timing instructed by the control circuit 36, the sample value portion of the input compressed data is stored in the sample register 31 and the N value portion is stored in the N register 32, respectively. The contents of the sample register 31 and the contents of the N register 32 are changed to the sample register 33 and the N
, Respectively, and at the same time, the next compressed data is similarly stored in the sample register 31 and the N register 32, respectively. The interpolation circuit 35 generates decompressed data by interpolation processing from the value of the sample register 31 (B), the value of the sample register 33 (A), and the value of the N register 34 (N). I do.

The following is an example of the processing when the interpolation processing is linear interpolation, N = 2, and the expanded data is D (0) to (3). D (0) = A D (1) = D (0) + ((BA) / (2 to the Nth power)) D (2) = D (1) + ((BA) / (2 N)) D (3) = D (2) + ((B−A) / (2 N)) The above interpolation method is merely an example, and various methods can be applied to the same linear interpolation. It can also be by curve interpolation, such as spline interpolation.

When the decompression processing for one sample is completed by the above processing, the contents of the sample register 31 and the contents of the N register 32 are changed to the sample register 33 and the N register 34, respectively.
, And at the same time, the next compressed data is similarly stored in the sample register 31 and the N register 32, respectively, and the same processing is repeated.

As described above, in this embodiment, compressed data can be expanded with a simple circuit configuration.

In the waveform processing apparatuses of the first to fifth embodiments, each component is constituted by a hardware circuit, but the operation of each component may be realized by software.

[0067]

As described above, the present invention has the following effects. (1) N of 2 (N ≧
The data stored at addresses separated by an integer multiple of 0) is used as a second sampled value, the difference between the estimated data and the original waveform data does not exceed a predetermined error limit value, and the first sampled value is used. Calculating the maximum N value in which there is no peak or valley (peak) exceeding a predetermined value in the waveform data at an address between the address of the value and the address of the second sample value, and creating compressed data. Thereby, a high compression ratio can be obtained while suppressing occurrence of loss and distortion of important and delicate portions on the waveform. (2) The address of the data to be selected as the sample value is 2 N
Since it is limited to the power, the number of processes for selecting the sample value can be reduced, so that the circuit or the program can be simplified. (3) According to the invention described in claim 4, compressed data can be expanded by a simple circuit or a program.

[Brief description of the drawings]

FIG. 1 is a block diagram of a waveform processing apparatus according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of the waveform processing device of FIG. 1;

FIG. 3 is a diagram showing numerical values of a processing status of 8-bit waveform data in the waveform processing device of FIG. 1;

FIG. 4 is a diagram showing compressed data output by the processing of FIG. 3;

FIG. 5 is a graph showing the original waveform data of FIG. 3 (FIG. 5);
FIG. 5A is a diagram (FIG. 5B) showing the expanded data of FIG. 3 in a graph.

FIG. 6 is a block diagram of a waveform processing device according to a second embodiment of the present invention.

FIG. 7 is a block diagram of a waveform processing device according to a third embodiment of the present invention.

FIG. 8 is a block diagram of a waveform processing device according to a fourth embodiment of the present invention.

FIG. 9 is a block diagram of a waveform processing device according to a fifth embodiment of the present invention.

FIG. 10 is a block diagram showing a conventional waveform processing apparatus (FIG. 1);
0 (a)) and an example of compressed data by a conventional waveform processing apparatus (FIG. 10 (b)).

11 is a flowchart showing the operation of another conventional waveform processing apparatus (FIG. 11A) and a diagram showing an example of compressed data by another conventional waveform processing apparatus (FIG. 11).
(B)).

FIG. 12 is a graph showing decompressed data by a conventional waveform processing device in a graph (FIG. 12A) and a graph showing decompressed data by another conventional waveform processing device (FIG. 12);
(B)).

[Explanation of symbols]

 Reference Signs List 1 memory 2 register 3 register 4 counter 5 interpolation circuit 6 error comparison circuit 7 data synthesis circuit 8 peak detection circuit 9 control circuit 10 error control circuit 12 blocking means 14 binary difference processing means 16 exponent determination means 18 re-differential processing Means 20 Compressed data generation / transmission means 22 Block final data storage means 31 Sample register 32 N register 33 Sample register 34 N register 35 Interpolator 36 Control circuit 101-112 steps 200-208 steps

Claims (4)

[Claims] 1. A memory for storing original waveform data, first storage means for reading and storing the original waveform data stored at a specified address from the memory, and outputting as a first sampled value; Second storage means for reading out and storing the original waveform data stored at the assigned address from the memory and outputting it as a second sampled value; and an address of the first sampled value and a value of the second sampled value. Interpolating means for estimating the waveform data of the address between the addresses from the first sample value, the second sample value, and the N value by interpolation processing and outputting the estimated data as estimated waveform data; Error comparing means for outputting an error when the difference between the output estimated waveform data and the original waveform data in the memory exceeds a predetermined error limit value; and an address of the first sample value. And reading the original waveform data stored at an address between the address of the second sample value and the memory, and detecting a peak equal to or higher than a predetermined peak detection sensitivity in the read original waveform data. A peak detection means for outputting a message to the effect that, in the initial state, 1 is output as the N value, when a count-up instruction is input, a value obtained by adding 1 to the current N value is set as a new N value, and when a count-down instruction is input, A counter that outputs a value obtained by subtracting 1 from the current N value as a new N value except when the current N value is 0, and synthesizes the first sample value and the N value output from the counter. A data synthesizing unit for outputting as compressed data, an instruction of an address of original waveform data to be read from the original waveform data stored in the memory, to the first storage unit, 2 of N squared only previous address from the specified address and instructs the second storage means 憶 means,
Unless the fact that the peak is detected from the peak detecting means or the fact that the difference between the estimated waveform data and the original waveform data exceeds the error limit value is not transmitted from the error comparing means, the count-up instruction is output to the counter, and An address based on the N value newly output from the counter is instructed to the second storage means, and the fact that a peak has been detected by the peak detection means or the difference between the estimated waveform data and the original waveform data has been determined by the error comparison means. And a control circuit for outputting a countdown instruction to the counter when the error limit value is exceeded and transmitting a compressed data output instruction to the data synthesizing means. 2. A memory for storing original waveform data, first storage means for reading and storing the original waveform data stored at a specified address from the memory, and outputting as a first sampled value; Second storage means for reading out and storing the original waveform data stored at the assigned address from the memory and outputting it as a second sampled value; and an address of the first sampled value and a value of the second sampled value. Interpolating means for estimating the waveform data of the address between the addresses from the first sample value, the second sample value, and the N value by interpolation processing and outputting the estimated data as estimated waveform data; Error comparing means for outputting the difference between the output estimated waveform data and the original waveform data in the memory when the difference exceeds a predetermined error limit value; When a count-up instruction is input, a value obtained by adding 1 to the current N value is set as a new N value. When a count-down instruction is input, a value is set to 1 from the current N value except when the current N value is 0. A counter that outputs a value obtained by subtracting the value as a new N value; a data synthesizing unit that synthesizes the first sample value and the N value output from the counter and outputs the result as compressed data; The address of the original waveform data to be read out from the original waveform data stored is instructed to the first storage means, and the address 2 N ahead of the address specified in the first storage means is stored in the second storage means. Instruct,
If the error comparing means does not notify that the difference between the estimated waveform data and the original waveform data has exceeded the error limit value, a count-up instruction is output to the counter, and the counter based on the N value newly output from the counter. Address to the second
When the error comparison means informs that the difference between the estimated waveform data and the original waveform data has exceeded the error limit value, a countdown instruction is output to the counter and the data synthesizing means is output. And a control circuit for transmitting an instruction to output compressed data. 3. The waveform processing apparatus according to claim 1, wherein the error limit value is obtained from a difference between the first sample value and the second sample value. 4. A waveform processing apparatus for expanding compressed data formed by compressing waveform data and comprising sample values and N values, and outputting the expanded data as expanded data, wherein a sample value in the input compressed data is First sample value storage means for storing and outputting at the instructed timing; second sample value storage means for storing and outputting the output of the first sample value storage means at the instructed timing; First N-value storage means for storing and outputting the N value in the specified timing, and second N value storage means for storing and outputting the output of the first N-value storage means at the specified timing Interpolating the output of the first sample value storage means, the output of the second sample value storage means, and the output of the second N value storage means at designated timings and outputting as decompressed data means A timing for storing a sample value or an N value in the first sample value storage means, the second sample value storage means, the first N value storage means, and the second N value storage means. And a control circuit for instructing the interpolation means to perform an interpolation process.