JPH10213523A - Automobile trouble diagnostic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a standardized automobile trouble diagnostic device. SOLUTION: An automobile trouble diagnostic device 100 is composed of a microprocessor 110 diagnosing trouble, a field programmable gate array(FPGA) 120 processing input and output signals of the microprocessor 110, a communication interface 130 composed of a plural number of communication protocol set gate circuits 180A to 180S corresponding to serial communications of different kinds, and a cartridge 140 composed of a plural number of communication protocol set electronic circuits 190E to 190S corresponding to serial communications of difference kinds. An output terminal of the cartridge 140 is connectable to an arbitrary pin among a plural number of pins of a serial communication connector 150.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vehicle failure diagnosis device, and more particularly, to a standardized vehicle failure diagnosis device.

[0002]

2. Description of the Related Art Recently, a control system of a vehicle such as an automobile has been electronically controlled. In order to perform a failure diagnosis, an automobile failure diagnosis apparatus is used to read data from the electronic control apparatus. I have.

[0003] A conventional automobile failure diagnosis apparatus uses an on-board engine control unit E using a serial communication line.
The ECU is connected to the CU and configured to perform a failure diagnosis of the ECU.

[0004]

SUMMARY OF THE INVENTION However, ECU
The communication protocol of the communication system used for, for example,
At present, it differs for each automobile manufacturer or vehicle type. Therefore, when producing an automobile failure diagnosis apparatus, conventionally, it was necessary to individually produce an automobile failure diagnosis apparatus corresponding to each maker or each vehicle model. That is, the conventional vehicle failure diagnosis device has a problem that it is not standardized.

An object of the present invention is to provide a standardized vehicle failure diagnosis device.

[0006]

In order to achieve the above object, the present invention relates to a vehicle failure diagnosis apparatus which is connected to an electronic control unit via a serial communication connector and diagnoses the failure of the electronic control unit. A microprocessor for performing fault diagnosis, a field programmable gate array connected to the microprocessor for processing input / output signals of the microprocessor, and a plurality of serial communication ports connected to the field programmable gate array for different types of serial communication. A communication interface configured with a communication protocol setting gate circuit, and a cartridge configured with a plurality of communication protocol setting electronic circuits connected to the communication interface and corresponding to different types of serial communication, and configured to set a communication protocol, Above cart The output terminal of the connector can be connected to an arbitrary one of a plurality of pins of the serial communication connector. With this configuration, it is possible to standardize an automobile failure diagnosis device. .

[0007] In the vehicle failure diagnosis apparatus, preferably, the microprocessor, the field programmable gate array, and the communication interface are arranged on a main board and connected to the main board via a connector. The additional function element is arranged on the function board. With this configuration, the additional function can be arbitrarily added.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A vehicle failure diagnosis apparatus according to an embodiment of the present invention will be described below with reference to FIGS. First, an overall configuration of a vehicle failure diagnosis device according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a system block diagram of a vehicle failure diagnosis device according to an embodiment of the present invention.

The vehicle failure diagnosis apparatus 10 according to the present embodiment.
Reference numeral 0 denotes a microprocessor 110, a field programmable gate array (FPGA) 120, a communication interface 130, a cartridge 140, and an external connection connector 150.

The two output terminals of the external connection connector 150 of the vehicle failure diagnosis device 100 are connected to an electronic control unit (ECU) 200 by a serial communication transmission line 210 and a serial communication reception line 220. Other output terminals of the external connection connector 150 can be connected to other electronic control units,
Here, the illustration is omitted. When the external connection connector 150 has a 16-pin configuration, SAE standard J196
The pin assignment in 2 is determined as follows.
That is, the pin No. Reference numeral 2 denotes a SAEJ1850 + line. Reference numeral 3 denotes a ground (GND) power supply line. Reference numeral 5 denotes a ground (GND) signal line. 7 is an ISO9141K line,
Pin No. 10 is a SAEJ1850- line,
Pin No. Reference numeral 15 denotes an ISO9141L line. Reference numeral 16 denotes a VB power supply line. And other pin Nos. 1,2,6,8,9,11,12,1
Lines 3 and 14 are undecided lines. Therefore, these undetermined lines can be used arbitrarily by each car manufacturer.

The serial communication line 21 of the ECU 200
If 0,220 is the SAEJ1850 line,
Pin No. Use 3,10. It is also possible to connect another electronic control unit via an undetermined line. That is, since what kind of serial communication line is connected to the undecided line is determined by the car maker, the vehicle failure diagnosis device can easily be connected to the undecided line according to the communication protocol connected to the undecided line. It has become available. The correspondence can be performed by the field programmable gate array (FPGA) 120, the communication interface 130, and the cartridge 140.

The FPGA 120 is composed of electronic components of a gate circuit mainly composed of a transistor. The microprocessor 110 and the FPGA 120 are connected to a serial communication TX line 160A and a serial communication RX line 160.
B, an address bus 160C supporting a 16-Mbyte address space, and an 8-bit data bus 160D.
A control bus 160E composed of a plurality of lines;
CPU clock 160F and interrupt IRQ line 16
0G and counter-related lines 16 consisting of multiple lines
0H, I / O lines 160I, 160J, 160K,
160L. An example of a specific configuration of the FPGA 120 will be described later with reference to FIG.

The communication interface 130 is composed of electronic components of a gate circuit mainly composed of a transistor. The communication interface 130 includes protocol setting gate circuits 180A and 180B for J1850 and IS
Protocol setting gate circuit 180C, 1 for O9141
80D and protocol setting gate circuit 1 for general purpose I / O
80E, 180F,..., 180S. The FPGA 120 and the communication interface 130
A + line 170A of J1850, a-line 170B of J1850, an L line 170C of ISO9141,
It is connected to the K line 170D of ISO9141 by general-purpose I / O lines 170E, 170F,..., 170S that can be used as a communication interface by bidirectional input / output. General-purpose I / O lines 170E, 170F, ...,
170S forms one channel in units of two,
For example, one channel is formed by the general-purpose I / O line 170E and the general-purpose I / O line 170F. An example of a specific configuration of the gate circuits 180E and 180F for general-purpose I / O will be described later with reference to FIG.

The cartridge 140 is an electronic circuit for setting a communication protocol. The cartridge 140 includes a communication protocol setting electronic circuit 190 for the general-purpose gate I / O.
E, 190F,..., 190S. Communication protocol setting electronic circuits 190E, 190F, ..., 19
OSS enables setting of a communication protocol for one channel every two. Note that the protocol setting gate circuits 180A and 180B for J1850 and ISO91
41. Protocol setting gate circuits 180C and 180D
, Since a unique protocol is set in advance in the communication interface 130, the communication interface 130 is connected directly to the external interface by direct wiring in the cartridge 140 as shown in FIG. The connection connector 150 is connected.

In the present embodiment, the FP is connected between the microprocessor 110 and the connector 150 for external connection.
The GA 120 is disposed, and the FPGA 120 performs signal control at a logic level. The controlled signals are connected by the protocol setting gate circuits 180A to 180S in the communication interface 130. Protocol setting gate circuits 180A, 180B
Is a protocol setting gate circuit 1 for J1850
80C and 180D are for ISO9141, and the protocol setting gate circuits 180E to 180S are
Since it is for general-purpose I / O and has general-purpose multipurpose functions, it can respond to a wide range of purposes such as communication and I / O.
Then, the protocol setting gate circuits 180E to 180S
Is compatible with communication interfaces of all car manufacturers.

Protocol setting gate circuits 180A-18
OS is connected to the cartridge 140, and the power supply voltage is 5 V, 7 to match the protocol in this area.
V and VB (normally 12 V) can be selected. Further, the cartridge 140 has a circuit configuration such as a circuit time constant and a circuit protection. Further, the cartridge 140
A combination arrangement of a communication line such as an ECU and an output connector pin of the external connection connector 150 is provided between the external connection connector 150 and the external connection connector 150.

Next, an example of the communication protocol setting electronic circuits 190E and 190F for the general-purpose gate I / O in the cartridge 140 according to the present embodiment will be described with reference to FIG. FIG. 2 is a wiring diagram of an example of a communication protocol setting electronic circuit for the general-purpose gate I / O in the vehicle failure diagnosis device according to one embodiment of the present invention.

The communication protocol setting electronic circuits 190E and 190F for the general-purpose gate I / 0 include a connector 142 for connecting to the communication interface 130 and the external connection connector 150.

The terminal 142A of the connector 142 is
For example, it is connected to the communication line voltage VCC (+ 5V), and the terminal 142I is grounded.
In another communication protocol setting electronic circuit, another power supply voltage can be set, and the power supply voltage can be selected by selecting the communication protocol setting electronic circuit.

The terminal 142B is connected to a gate circuit 180E for general-purpose I / O, and the terminal 142C is
It is connected to the external connection connector 150. A first pull-up resistor 144A is connected between the terminals 142B and 142C and the terminal 142A.
The terminal 142D is connected to the general-purpose I / O gate circuit 180F, and the terminal 142E is connected to the external connection connector 150. Terminal 14
Between the 2D, 142E and the terminal 142A, the first
And a second pull-up resistor 144B having a different resistance value from the second pull-up resistor 144A. This realizes a combination of the first communication line and a combination of the second communication line. In another communication protocol setting electronic circuit, another pull-up resistor can be set, and a pull-up resistor can be selected by selecting the communication protocol setting electronic circuit.

Furthermore, the communication protocol setting electronic circuit 19
0E and 190F include a flash memory 146. Flash memory 146 and terminals 142
F are connected by an address bus 148A that supports a 16 Mbyte address space. The flash memory 146 and the plurality of terminals 142G are connected by an 8-bit data bus 148B. Further, the flash memory 146 and the plurality of terminals 142
G is connected by an I / O line 148C such as a control bus of a plurality of lines, a CPU clock, an IRQ line of an interrupt, and a plurality of lines related to a counter. The contents of the flash memory 146 can be changed by the microprocessor 110. Therefore, by using the flash memory 146, the function of the cartridge 140 other than the communication line can be set.

That is, in the present embodiment, the cartridge 140 allocates the communication line to the pull-up resistor connector, and can be equipped with an additional function such as a flash memory.

Next, an example of a specific configuration of the FPGA 120 will be described with reference to FIG. FIG. 3 is an explanatory diagram of an FPGA logic circuit and an input / output relationship in the vehicle failure diagnosis device according to one embodiment of the present invention.

The input terminals 160D0 and 160D1 are
Data bus D of the 8-bit data bus 160D of
0, D1. Input terminals 160E0, 160E
1 is a control bus 16 composed of a plurality of lines shown in FIG.
0E are connected to the write enable signal line and the chip select signal line. The output terminal 160B0 is
Is connected to the serial communication RX line 160B. The input terminal 160A0 is connected to the serial communication TX line 16 of FIG.
0A. Input terminal 160I0 is connected to I / O line 160I, and output terminal 160J0 is connected to I / O line 160I.
Line 160J, and the input terminal 160K0
/ O line 160K and serves as a communication line selection signal. The input terminal 160F0 is connected to the CPU clock 160F of FIG. 1, and is supplied with a clock synchronous communication clock signal.

The output terminal 170C0 is connected to the ISO 91 of FIG.
41 L line 170C. Input terminal 170
D0 is the R of the K line 170D of ISO9141 in FIG.
X, and the output terminal 170D1 is connected to ISO9141.
To the TX of the K line 170D. Output terminal 17
0E0 is connected to the general-purpose I / O line 170E of FIG. 1 and connected to the TX of the car maker dedicated protocol, and the output terminal 170E1 is connected to the general I / O line 170E and connected to the TX of the car maker dedicated protocol.

It should be noted that the buffer elements BA, the NAND circuit NAND, the inverting circuit IN,
The AND circuit AND and the flip-flop FF are, for example,
They are connected as shown.

The FPGA 130 is connected to various bus lines of a microprocessor in order to increase the width of the internal circuit configuration, and has a structure that allows a wide custom IC design area. In the actual example, 21 channels are set for the communication line, and the protocol is standardized. In ISO9141 and SAEJ1850, the circuit is fixed, and the pin assignment of the connector is fixed assignment based on J1962. The general-purpose I / O has a free logic design as shown in FIG.

As described above, the vehicle failure diagnosis apparatus according to the present embodiment includes ISO9141 and SAEJ1.
850 has a standardized circuit configuration having a fixed I / O and a general-purpose I / O. The system can be designed in accordance with the communication protocol used by the ECU or the like to be diagnosed.

Here, a method of designing a system for performing internal connection in accordance with a specific ECU will be described with reference to FIG. FIG. 4 is a flowchart of a system design in the vehicle failure diagnosis device according to one embodiment of the present invention.

In step 400, system design begins. In step 402, the system designer selects whether setting of J1850 is necessary.
If the setting is unnecessary, in step 404, J18
Protocol setting gate circuits 180A, 180B for 50
And the external connection connector 150 need not be connected. If the setting is necessary, in step 406, the protocol setting gate circuits 180A and 180B for J1850 and the external connection connector 150 are connected as shown in FIG.

In step 408, IS09141
Select whether or not setting is necessary. If the setting is unnecessary, in step 410, the connection between the protocol setting gate circuits 180C and 180D for IS09141 and the external connection connector 150 is unnecessary. If the setting is necessary, in step 412, the protocol setting gate circuit 18 for IS09141 is used as shown in FIG.
0C and 180D and the external connection connector 150 are connected.

In step 414, it is selected whether or not a manufacturer-specific protocol needs to be set. If the setting of one channel is necessary, in step 416, the communication protocol setting electronic circuits 190E and 190F for the general-purpose gate I / O as described in FIG. 2 are set. If you need to set up multiple channels,
In step 418, the necessary number of communication protocol setting electronic circuits 190E, 190F, 1 for the general-purpose gate I / O are provided.
90G and ~ 190S are set.

Next, in step 420, the general-purpose I / O
Select the presence or absence of O. If not set, step 4
At 22, the gate circuits 180E, 180F,.
Do not connect 80S input / output. To set
In step 424, the input / output of the necessary general-purpose I / O gate circuits 180E, 180F,..., 180S is connected.

Next, in step 426, the connector pins of the external connection connector 150 after the selection is completed are assigned. In step 428, the manufacturer-specific I
The I / O protocol physical layer is determined by circuit settings. In step 430, the circuit voltage, current, time constant, and the like determined in step 428 are specifically configured in the cartridge 140. In step 432, the communication system switching specification is determined, the switching procedure for a plurality of channels is determined, and the combination wiring of each channel of the cartridge 140 and the external connection connector 150 is performed. In step 434, the circuit specifications of the FPGA 120 are determined, the circuit is designed, and a logic control circuit is configured. In step 436, software is created from the hardware configuration, and in step 438, the system design is completed.

Next, an example of an automobile failure diagnosis device designed according to the procedure shown in FIG. 4 will be described with reference to FIG. FIG. 5 is a configuration diagram of a communication circuit of the vehicle failure diagnosis device according to one embodiment of the present invention. In this example, only one communication circuit for serial communication TX and RX is shown for convenience of explanation.

The microprocessor 110 is connected to the FPGA 120 via a logic-level serial communication TX line 160A and a serial communication RX line 160B. The FPGA 120 is, for example, connected as shown by a buffer amplifier BA and an inverting circuit IN to form a logic circuit. Communication interface 13
0 is connected as shown by, for example, resistors R1, R2, R3, and R4 and transistors TR1 and TR2 to form a gate circuit of a multipurpose interface.
The resistors R1, R3 are pull-up resistors, and the resistors R2, R2
R4 is a base current limiting resistor. Transistor TR
Reference numeral 1 denotes a transmission transistor, and a transistor TR2
Is a receiving transistor.

The cartridge 140 has, for example, a resistance R
5, R6, R7, the capacitor C, and the zener diode ZD are connected as shown to form a circuit corresponding to the protocol. The resistor R5 is a pull-up resistor. The cartridge 140 is connected to the external connection connector 150 via the RX communication line 195A and the TX communication line 195B.

In the vehicle failure diagnosis apparatus according to the present embodiment, the communication interface 130 includes a protocol setting gate circuit 180A, 180B for J1850 and an ISO.
Protocol setting gate circuits 180C and 18 for 9141
, 180S, which is a general-purpose I / O protocol setting gate circuit that can support not only 0D but also communication interfaces of all car manufacturers.
Protocol setting gate circuits 180E, 180F, ..., 1
The communication protocol setting electronic circuits 190E to 190S connected to the switching gate (transistor) of the 80S can freely set the pull-up resistors 144A and 144B and the power supply voltage V. This communication protocol setting electronic circuit 19
0E to 190S enable selection by a selection combination of a switching gate and a connector. Further, protocol setting gate circuits 180E, 180F,.
An FPGA 120 for controlling the OSS switching gate is provided. Therefore, the vehicle failure diagnosis apparatus according to the present embodiment can perform failure diagnosis corresponding to various vehicles by setting mainly of software with a slight improvement of hardware in the cartridge 140.

As described above, according to the present embodiment, an automobile failure diagnosis apparatus can be standardized.

Next, a vehicle failure diagnosis apparatus according to another embodiment of the present invention will be described with reference to FIGS.
In the present embodiment, the additional functions of the vehicle failure diagnosis device can be set according to the purpose. First, the system configuration of the vehicle failure diagnosis device according to the present embodiment will be described with reference to FIG. FIG. 6 is a system block diagram of a vehicle failure diagnosis device according to another embodiment of the present invention. The same reference numerals as those in FIG. 1 indicate the same parts.

On the main board 105, a microprocessor 110, a field programmable gate array (FPGA) 120, and a communication interface 130 are arranged. These connection relations and functions are as described in FIG. In addition, main board 1
05 is connected to a ROM 115 and a RAM 125. The ROM 115 stores a program for operating the microprocessor 110. RAM1
25 temporarily stores, for example, data fetched from the ECU 200 or the like. The main board 105 has a failure diagnosis function.

The connector CN3 is connected to the cartridge 1
40. The connection relationship between the cartridge 140 and the interface 130 or the external connection connector 150 is as shown in FIG.

The connector CN4 of the main board 105 is
The external connection connector 150 shown in FIG. 1 is connected to the ECU 200 using a cable 205. The connector CN1 is connected to an LCD display 620 and a data input key 630 via a liquid crystal display (LCD) board 610.
It is connected to the LED lamp 640.

The connector CN5 is connected to a cigarette lighter cable 450 and can receive power from the cigarette lighter.

Further, in this embodiment, the additional function board 300 is connected via the connector CN3. By connecting this additional function board 300,
Additional functions of the vehicle failure diagnosis device can be set according to the purpose.

The additional function board 300 includes an RS232C
310, IRDA (optical) communication 320, a tester (voltage, resistance, pulse period, DUTY ratio) 330, and various functions of RAMs 340 and 350 that can be added are set.

The RS232C 310 is connected to an RS232C cable 360 by a connector CN8, and can be connected to an external device. The connector CN7 is a connector that can receive optical communication from outside. Connector C
N6 is connected to measurement probes 370 and 372. As the measurement probes 370 and 372, various measurement probes for voltage measurement, resistance measurement, current measurement, temperature measurement, pulse measurement, and the like can be used.

The additional function of the additional function board 300 is controlled via the connector CN2 since the main function of the main board 105 is the failure diagnosis function.

Next, the sectional structure of the vehicle failure diagnosis apparatus according to the present embodiment will be explained with reference to FIG. FIG.
FIG. 5 is a cross-sectional view of a vehicle failure diagnosis device according to another embodiment of the present invention.

The main body case 700 includes a main board 105 which is in charge of a main failure diagnosis function, a liquid crystal display (LCD) 620, a data input key 630, and failure diagnosis software 710 created for each automobile engine. And an additional function board 300, a connector CN2 for connecting the additional function to the main board, and a cover 7 for the additional function board.
20 are attached. The failure diagnosis software 710 is provided on the main board 105 shown in FIG.
It is stored in M125 and executes a failure diagnosis.

When the shape of a component interferes with the cover 720 based on the component mounting specification on the additional function board according to the setting function, the cover 720 has a structure that facilitates design and manufacture according to the specification.

Next, a processing flow of the additional function according to the present embodiment will be described with reference to FIG. FIG. 8 is a flowchart illustrating processing of an additional function in the vehicle failure diagnosis device according to another embodiment of the present invention.

In step 800, the operation of the failure diagnosis device is started. In step 820, a failure diagnosis function (diag) and an additional function (measurement) are selected. When the failure diagnosis function (diag) is selected, in step 804, failure diagnosis function software is executed. When the additional function (measurement) is selected, in step 806, measurement software is executed.

The measuring software determines, for example, whether or not to select the voltage range of 2.5 V in step 808, and if it is selected, in step 810, the measuring software
The range is executed. At step 812, the voltage 2
Judge whether or not to select the 5V range.
In step 814, the 25V range is executed.

Next, at step 816, it is determined whether or not to select the resistance measurement. When the selection is made, at step 818, the resistance measurement is executed. Step 82
At 0, it is determined whether or not to select current measurement, and if selected, at step 822, current measurement is performed. In step 824, it is determined whether or not to select temperature measurement, and if selected, in step 826, temperature measurement is performed. In step 828, it is determined whether or not to select the pulse measurement. When the selection is made, in step 830, the pulse measurement is performed.

In order to easily secure an occupied space for the main body of the automobile failure diagnosis apparatus, the main board 1
The cover 720 has a plate-like shape so that it can be arranged in a structure in which two printed circuit boards 05 and the additional function board 300 are stacked.
To facilitate design changes. The setting of the additional function can be freely designed by using the printed circuit board of the additional function board 300, and the control of the additional function can be set in a wide range by connecting the diagnosis function of the main board 105 to the microcomputer.

As described above, according to the present embodiment, the failure diagnosis function of the main board is made common, and by using the additional function board, dedicated functions corresponding to various vehicles can be easily performed. Can be added.

[0058]

According to the present invention, an automobile failure diagnosis apparatus can be standardized.

[Brief description of the drawings]

FIG. 1 is a system block diagram of a vehicle failure diagnosis device according to an embodiment of the present invention.

FIG. 2 is a wiring diagram of an example of a communication protocol setting electronic circuit for a general-purpose gate I / O in a vehicle failure diagnosis device according to an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a logic circuit of a FPGA and an input / output relationship in the vehicle failure diagnosis device according to one embodiment of the present invention.

FIG. 4 is a flowchart of a system design in the vehicle failure diagnosis device according to one embodiment of the present invention.

FIG. 5 is a configuration diagram of a communication circuit of the vehicle failure diagnosis device according to one embodiment of the present invention.

FIG. 6 is a system block diagram of a vehicle failure diagnosis device according to another embodiment of the present invention.

FIG. 7 is a cross-sectional view of a vehicle failure diagnosis device according to another embodiment of the present invention.

FIG. 8 is a flowchart illustrating a process of an additional function in a vehicle failure diagnosis device according to another embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 100: Vehicle failure diagnosis device 105: Main board 110: Microprocessor 120: Field programmable gate array (FP)
GA) 130 ... communication interface 140 ... cartridge 142 ... connector 144A, 144B ... pull-up resistor 146 ... flash memory 150 ... connector for external connection 160A ... serial communication TX line 160B ... serial communication RX line 160C ... address bus 160D ... data bus 160E ... Control bus 160F ... CPU clock 160G ... IRQ line 160H ... Counter-related line 160I, 160J, 160K, 160L ... I / O line 170A ... + line of J1850 170B ... J1850-line 170C ... ISO9141 L line 170D ... ISO9141 K-line 170E, 170F, ..., 170S ... General-purpose I / O line 180A, 180B ... Protocol setting gate circuit for J1850 1 80C, 180D ... Protocol setting gate circuit for ISO9141 180E, 180F, ..., 180S ... Protocol setting gate circuit for general purpose I / O 190E, 190F, ..., 190S ... Communication protocol setting electronic circuit for general purpose I / O 200 ... Electronic control unit (ECU) 210: Serial communication transmission line 220: Serial communication reception line 220 300: Additional function board 310: RS232C 320: IRD (optical) communication 330: Tester (voltage, resistance, pulse period, DUTY)
Ratio) 340: RAM that can be added 610: Liquid crystal display (LCD) board 620: LCD display 630: Key 640: LED lamp

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Norihiro Morino 2477 Takaba, Hitachinaka City, Ibaraki Prefecture Inside Hitachi Car Engineering Co., Ltd.

Claims (2)

[Claims] An automotive failure diagnostic device connected to an electronic control device via a serial communication connector and performing a failure diagnosis of the electronic control device, a microprocessor for performing a failure diagnosis, and a microprocessor connected to the microprocessor; A field programmable gate array for processing input / output signals of the microprocessor; a communication interface connected to the field programmable gate array and configured with a plurality of communication protocol setting gate circuits corresponding to different types of serial communication; A plurality of communication protocol setting electronic circuits connected to the interface and corresponding to different types of serial communication, comprising a cartridge for setting a communication protocol, and an output terminal of the cartridge, the output terminal of the serial communication connector Automotive fault diagnosis apparatus characterized by for any pins in the number of pins can be connected. 2. The vehicle failure diagnosis apparatus according to claim 1, wherein said microprocessor, said field programmable gate array, and said communication interface are arranged on a main board, and are connected to said main board via a connector. An automobile failure diagnosis device, wherein an additional function element is arranged on a possible additional function board.