JPH10207447A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processor used for the purpose of handling images different in expression forms and capable of executing high-speed plotting by an image memory by using an inexpensive general CPU. SOLUTION: An image memory 103 has a plurality of unit areas. An image generating means 101 generates image data regarding pixels constituting an image. In the image generating means 101, writing of the image data in the unit area of the image memory 103 corresponding to these pixels is determined by a recognizing means 104, if non-writing is determined, image data corresponding to the unit area is synthesized by the generated image data regarding the pixels and clear data, and if writing of the image data is finished already, image data corresponding to the unit area is synthesized by the generated image data regarding the pixels and data existing in the unit area, and then it is written in the unit area by the recognizing means 104 and a memory control means 102.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for generating a so-called computer graphics image and storing the same in an image memory, and then outputting the image data to an image output device such as a display device or a printing device. .

[0002]

2. Description of the Related Art In recent years, various types of printers for printing images generated by personal computers and the like have been provided. In response to requests from users, these printers have been required to be multicolored, high-speed, and high-definition. Attempted. At present, a printer capable of performing full-color printing at a speed of several tens of sheets per minute has been announced.

In a relatively high-speed printer, it is necessary to reduce the amount of data of an image to be transferred due to the limitation of the communication speed between the printer and the personal computer.
For this reason, instead of expressing image data directly as bitmap data and transferring it, a command sequence expressing an image in a page description language such as a post-crypto language is transferred to the printer device, and the printer device converts the command sequence. By interpretation, image data corresponding to the instruction sequence is stored in an image memory, and the image is printed on a medium such as paper in many cases.

In the case of adopting this method, the printer device normally stores the image of the pixel to be displayed in the image memory which has been subjected to the clear processing so as to draw a point or a straight line on a blank screen. A process of writing data is performed. For this reason, at the start of drawing an image,
It is necessary to blank the screen, that is, to clear the image memory before writing the image data.

Conventionally, as a method of performing the clear processing, a method of writing clear data to an image memory by a CPU, a method of providing a DMA control means on a memory bus, and
There has been a method in which clear data is written directly into an image memory without the intervention of a CPU under the control of the control means.

In these systems, clear data must be written to the entire image memory before writing image data for one screen. However, it can be said that many of the clear data written to the image memory in this clear processing are uselessly written. That is, after the clear processing, the image data is written by overwriting the clear data already written in the image memory. However, the clear data overwritten by this image data is data that does not need to be written originally. That's it.
In each of the above-described methods, since such useless writing of clear data is performed, the time for the clearing process becomes longer.

As a prior art for avoiding such useless writing of clear data, Japanese Patent Application Laid-Open No. Hei 8-123951 has been proposed.
There is a technique disclosed in Japanese Unexamined Patent Publication (Kokai) No. H11-26095. In this prior art, the following method is employed. (1) For each pixel constituting one screen, a state holding memory for storing information indicating whether image data of the pixel has been written or not written in the image memory is provided in advance. (2) At the start of screen drawing, the entire state holding memory is set to the unwritten state. (3) After generating an image and writing the image data of all the pixels that need to be drawn to the image memory, the pixels for which the image data has never been written to the image memory, that is, the clear data is originally written For a pixel to be cleared, clear data is written to an area in the image memory corresponding to the pixel. Alternatively, when the contents of the image memory are transferred to the image output device after the image generation is completed, clear data is generated and transferred without reading image data from the image memory for pixels that have not been written yet.

According to this conventional technique, of all the pixels forming one screen, image data is generated, and clear data is written to the image memory for uselessly in the pixels to be written to the image memory. You don't have to. Therefore, it is possible to reduce the amount of data to be written into the image memory by combining the clear processing and the image drawing processing, and to speed up the image drawing processing.

Japanese Patent Application Laid-Open No. 8-123951 discloses that
Further, another prior art using a similar state holding memory is disclosed. According to this conventional technique, a plurality of pixels are regarded as one unit, instead of each single pixel as described above, and information indicating whether data has been written or not written in the plurality of pixels is stored in a state holding memory. Performs the same control as described above.

[0010]

By the way, the data amount per pixel is generally 1 byte in a gray scale, 3 bytes in a RGB expression format for a color natural image, and 4 bytes in a YMCK expression format. It differs depending on the expression format of the image. In particular, many color printers and the like often handle input images of different expression formats, such as both black monochrome images and color images. The processing speed of such a color printing apparatus can be increased if the conventional technique disclosed in Japanese Patent Application Laid-Open No. 8-123951 can be applied. But it is extremely difficult. That is, assuming that a plurality of types of input images (for example, a black monochromatic image and a color image) are handled according to the related art disclosed in Japanese Patent Application Laid-Open No. 8-123951, whether image data has been written for each pixel The information indicating this is managed by the state holding memory, and in which area in the image memory the image data corresponding to each of these pixels is stored differs depending on the expression format of the image. Therefore, it is necessary to monitor access to the image memory in a method corresponding to the expression format of the input image to be handled, to pay a large monitoring load such as updating the contents of the state holding memory, and to perform extremely complicated control. It becomes necessary.

In addition, general-purpose high-speed C which is currently widely distributed
A PU can write data to memory only in a data processing unit inside the CPU called a word or an integer multiple of it, or in a size smaller than that, it can only write data from a 4-byte or 8-byte word boundary address. Many. Further, in a system including a cache memory, writing can often be performed only in a size called a cache line, which is usually an integral multiple of the word length. In such a system, when writing data in small units, the CPU first reads data of a minimum writable size including the position where data is to be written, and then reads the data by internal processing of the CPU. A process of changing a portion to be written in data and writing the entire data back to a memory is performed. for that reason,
If the prior art described in Japanese Patent Application Laid-Open No. 8-123951 is adopted, a CPU capable of performing memory access in units of data including image data for one pixel is required, and the available CPU is severely restricted. However, a dedicated and expensive CPU is required.

The present invention has been made in view of the circumstances described above, and can be applied to an application for handling input images having different data amounts per pixel, and uses an inexpensive general-purpose CPU. It is an object of the present invention to provide an image processing apparatus which can be constructed even when the image processing apparatus is constructed, and can execute drawing processing using an image memory at high speed.

[0013]

According to the present invention, there is provided an image memory having a plurality of unit areas for storing data, and a recognition apparatus for recognizing whether or not image data has been written for each of the unit areas. Means, image generating means for generating image data of pixels constituting an image to be output, a. Determining by the recognizing means whether or not image data has been written to a unit area of the image memory, which is an area where image data of pixels generated by the image generating means is to be stored; b. If the image data has not been written to the unit area yet, the image data corresponding to the unit area is synthesized with the image data of the pixels generated by the image generating means and the clear data, c. If the image data has already been written in the unit area, the image data of the pixel generated by the image generating unit and the data already stored in the unit area correspond to the unit area. Combining the obtained image data, d. The gist of the present invention is an image processing apparatus comprising: a synthesizing unit that writes synthesized image data into the unit area.

[0014]

Embodiments of the present invention will be described below with reference to the drawings.

A. First Embodiment FIG. 1 is a block diagram showing a configuration of an image processing apparatus according to a first embodiment of the present invention. As shown in the figure, the image processing apparatus according to the present embodiment includes an image generation unit 101
, A memory control unit 102, an image memory 103, a recognition unit 104, and a state holding memory 105.

The image generating means 101 is means for generating image data of each pixel constituting the screen. The image memory 103 is a unit that stores the image data generated by the image generation unit 101. The writing of the image data to the image memory 103 and the reading of the image data from the image memory 103 are performed by the recognition unit 10.
4 and the memory control means 102.

The state holding memory 105 includes the image memory 10
3 is a means for storing a storage element indicating whether or not image data has been written for each unit area in 3. In the above-described conventional technique, information on whether or not image data has been written for each pixel is managed. On the other hand, in the present embodiment, whether or not image data has been written is determined not for each pixel but for each unit area obtained by dividing the entire storage area in the image memory 103 into a certain size. It does.

FIG. 2 exemplifies a correspondence relationship between each pixel constituting an image, image data of each pixel stored in the image memory 103, and a storage element in the state holding memory 105.

In the figure, an image 4 represented by a plurality of squares
Although 01 is drawn, each of these boxes represents a pixel. Each of these pixels is represented by 3 bytes of image data. In FIG. 2, the image memory 103
Each storage area in each is represented by a cell. Each of these storage areas (cells) has a storage capacity of 1 byte, and a storage area of 4 bytes (for 4 cells) collectively constitutes one unit area. Image memory 103
The reading and writing of data in are performed using each of these unit areas as one unit. Further, the state holding memory 105 includes:
Each storage area has a storage capacity of 1 bit. Each of these storage areas (cells) stores one storage element.

In the illustrated example, the image 401 is composed of pixels 4
02 and a pixel 403. Of these, pixel 4
02 is stored in the image memory 103.
Are stored as upper 3 bytes of data in the unit area 404. On the other hand, in the 3-byte image data representing the pixel 403, the upper 1 byte is stored in the unit area 404 and the lower 2 bytes are stored in the adjacent unit area 405.

Each storage area of the state holding memory 105 stores a storage element indicating whether or not image data has been written to each unit area of the image memory 103. In this example, the unit area 404 includes the pixel 4
Since the image data 02 and a part of the image data of the pixel 403 have been written, the storage element 406 indicating that the image data has been written is stored in the storage area in the state holding memory 105 corresponding to the unit area 404. Is stored. In addition, the unit area 405 includes a pixel 403 in a part thereof.
A part of the image data is written, but a part where nothing is written remains. However, it is still the same that the image data has been written, although partly, so that the image data has already been written to the storage area in the state holding memory 105 corresponding to the unit area 405. Is stored.

In this embodiment, the image memory 10
For each of the unit areas 3, processing for drawing is performed while managing information on whether or not image data has been written. 3 and 4 are flowcharts showing the operation of the present embodiment. Hereinafter, the operation of the present embodiment will be described with reference to these flowcharts.

The image generating means 101 instructs the recognizing means 104 to initialize the state holding memory 105 at the start of drawing an image. In accordance with this command, the recognizing unit 104 stores a storage element indicating that image data has not been written in all storage areas of the state holding memory 105 (step S10).

During drawing, the image generating means 101 sequentially generates image data of each pixel (steps S11 and S1).
2) The image data is written to the image memory 103 via the recognition means 104 and the memory control means 102 (step S13).

FIG. 4 shows the details of the processing in step S13. Prior to writing the image data of the pixel generated by the image generating unit 101 to the image memory 103, the recognizing unit 104 obtains a unit area in the image memory 103 where the image data of the pixel is stored (Step S20). Here, for example, the pixel 40 of FIG.
Assuming that writing of the second image data is performed, the unit area 404 is obtained in this step S20. Further, assuming that the image data of the pixel 403 in FIG. 2 is to be written, both the unit areas 404 and 405 are obtained in this step S20.

Next, the recognizing means 104 determines in step S20
The storage element corresponding to the unit area obtained in step is read from the state holding memory 105, and it is determined whether or not image data is written in the unit area based on the storage element (step S21).

If the result of the determination is "YES", the recognizing means 104 instructs the memory control means 102 to read data from the unit area obtained in step S20. The memory control unit 102 reads data from the unit area in the image memory 103 in accordance with the instruction, and the recognition unit 104 transfers the read data to the image generation unit 101 (Step S22).

On the other hand, if the result of the determination in step S21 is "N
If “O”, the recognizing unit 104 generates clear data and delivers it to the image generating unit 101 (step S2).
5)

The image generating means 101 synthesizes the image data to be written in the unit area determined in step S20 by overwriting the image data of the above-mentioned pixel with respect to the data passed from the recognizing means 104 (step S20). S
23). The processing in step S23 will be described below with reference to a specific example.

First, for example, the image data of the pixel 402 in FIG.
It is assumed that image data has not yet been written to the unit area 404 corresponding to 02. In this case, in step S25, clear data having a size of 4 bytes that fills the unit area 404 is transmitted from the recognizing unit 104 to the image generating unit 1.
Delivered to 01. Then, in step S23, the image generating means 101 overwrites the image data of the pixel 402 generated this time in the upper 3 bytes corresponding to the pixel 402 in the clear data.

Next, for example, the image data of the pixel 402 in FIG. 2 has already been written in the image memory 103, and in this state, the image data of the pixel 403 is
1 is generated. In this case, the pixel 403 belongs to both the unit areas 404 and 405, and the image data of the pixel 402 has already been written in the unit area 404.
And 405, data having a size of 8 bytes is read out and passed to the image generating means 101 by the recognizing means 104. Then, in step S23, the image generating means 101 overwrites the image data of the pixel 403 generated this time in the portion from the fourth byte to the sixth byte in the 8-byte data.

The image generating means 101 delivers the data synthesized in step S23 to the recognizing means 104, and instructs the recognizing means 104 to write the data in the unit area obtained in step S20. Recognition means 104
Executes data writing to the image memory 103 via the memory control means 102 according to the command from the image generation means 101 (step S24).

The above processing is performed on the image data of all the pixels generated by the image generating means 101. According to the present embodiment, the image generation unit 101
Since the information on whether or not the image data has been written is managed in a unit corresponding to the memory access unit, the image generation unit 101 can be configured with an inexpensive general-purpose CPU. In the above embodiment, the case where one pixel is represented by 3-byte image data has been described as an example. However, it is possible to cope with the case where one pixel is represented by, for example, 4-byte image data with exactly the same configuration. It is. In the present embodiment, regardless of how many bytes of image data of one pixel are expressed, information of whether or not image data has been written for each unit area of a fixed size is managed independently of this. This is because the clearing process is controlled thereby.

B. Second Embodiment FIG. 5 is a block diagram showing a configuration of an image processing apparatus according to a second embodiment of the present invention. In this figure, an image generation unit 501, a memory control unit 502, an image memory 5
03, the recognition means 504 and the state holding memory 505
It plays almost the same role as each means of the same name in the first embodiment. In the present embodiment, a code memory 506 and an image output unit 507 are provided in addition to the above. Here, the code memory 506 is means for storing code information representing an image. The image output unit 507 is a unit that receives image data finally generated by the image processing apparatus via the bus 508 and outputs the image data to the outside as an image. The image memory 5
03 and the code memory 506 may be a series of memories divided into regions.

In this embodiment, the image generating means 501
Performs drawing processing using the same image memory 503 as in the first embodiment, receives code information from the outside, stores it in the code memory 506, and sequentially reads out the code information stored in the code memory 506. Rendering processing for generating image data of each pixel constituting an image can be performed. The drawing process itself using the image memory 503 is no different from the first embodiment described above. In the present embodiment, the image data stored in the image memory 503 can be output by the image output unit 507.
05 is referred to. That is, the recognition means 50
Under the control of Step 4, each storage element of the state holding memory 505 is sequentially referred to, thereby determining whether or not image data has been written in each unit area in the image memory 503. Only the image data of the area is read out by the memory control unit 502 and the bus 5
08 to the image output means 507.
Then, the image output unit 507 forms an output image based on the image data for the portion that received the image data via the recognition unit 504, and outputs a predetermined output image, for example, a blank page for the portion that did not receive the image data. Thus, an output image in the state described above is formed. Therefore, according to the present embodiment, the output time of an image having many white background portions can be shortened.

[0036]

As described above, according to the present invention, management of whether or not image data has been written is performed not in pixel units but in arbitrarily determined unit areas of the image memory. Therefore, there is an effect that clear processing can be performed with the same configuration for image data in an arbitrary expression format. Further, according to the present invention, the size of the unit area of the image memory may be determined according to the memory access unit of the CPU used as the image generating means. Therefore, there is an effect that the drawing processing can be executed at high speed by the image generating means using an inexpensive general-purpose CPU.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image processing apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram exemplifying a correspondence relationship between pixels constituting an image, image data of each pixel stored in an image memory 103, and storage elements in a state holding memory 105 in the embodiment.

FIG. 3 is a flowchart showing an operation of the embodiment.

FIG. 4 is a flowchart showing the operation of the embodiment.

FIG. 5 is a block diagram illustrating a configuration of an image processing apparatus according to a second embodiment of the present invention.

[Explanation of symbols]

101, 501... Image generating means (image generating means and synthesizing means), 102, 502.
3, 503 image memory, 104, 504 recognition means, 105, 505 state holding memory, 506 code memory, 507 image output means, 508 bus.

Claims (5)

[Claims] An image memory having a plurality of unit areas for storing data; a recognition unit for recognizing whether or not image data has been written for each of the unit areas; Image generating means for generating image data of constituent pixels; a. Determining by the recognizing means whether or not image data has been written to a unit area of the image memory, which is an area where image data of pixels generated by the image generating means is to be stored; b. If the image data has not been written to the unit area yet, the image data corresponding to the unit area is synthesized with the image data of the pixels generated by the image generating means and the clear data, c. If the image data has already been written in the unit area, the image data of the pixel generated by the image generating unit and the data already stored in the unit area correspond to the unit area. Combining the obtained image data, d. An image processing apparatus comprising: a synthesizing unit that writes the synthesized image data into the unit area. 2. Each of the unit areas in the image memory includes:
2. The image processing apparatus according to claim 1, wherein a minimum memory access unit when the image generation unit accesses the image memory or a memory access unit that is an integral multiple of the minimum memory access unit. 3. A state holding memory for holding, for each unit area of the image memory, a storage element indicating whether or not image data has been written, wherein the recognizing means comprises: a. When the image generating means starts generating image data of a pixel, writes a storage element indicating that image data has not been written in all the unit areas of the image memory into the state holding memory; b. When the image generating means generates image data of a pixel, it is determined whether writing of image data is performed in a unit area of the image memory, which is an area where image data of the pixel is to be stored, in the unit area. Making a determination based on the corresponding storage element in the holding state memory; c. 2. The image processing apparatus according to claim 1, wherein when the image data is written to the unit area of the image memory by the combining unit, a storage element indicating that the image data has been written to the unit area is written to the state holding memory.
Or the image processing device according to 2. 4. An image output means, wherein the recognizing means includes:
Image data is read out from only the unit area where the image data has been written and supplied to the image output means, and the image output means outputs the image data received by the image data through the recognition means. The image processing apparatus according to any one of claims 1 to 3, wherein an image is formed, and a predetermined output image is formed for a portion that does not receive image data. 5. A code memory for storing code information representing an image, wherein the image generation means receives code information from the outside and stores the code information in the code memory, and a code stored in the code memory. 5. The image processing apparatus according to claim 1, further comprising: a unit configured to generate image data of the pixel according to information.