JPH10164828A - Power-supply circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it cope with an extensive input voltage by a method wherein, in a period in which an input voltage is relatively low, the pulse width of a switching element is reduced forcibly by an abnormal-oscillation suppression circuit and a threshold voltage which decides a period in which the switching element is turned off forcibly is made extremely small as compared with a maximum value. SOLUTION: An abnormal-oscillation suppression circuit 17 always detects the level of a rectified waveform as the output of a bridge circuit 11, it forcibly lowers the output of an error amplifier 12 when a voltage level is low, and it outputs an instruction which forcibly reduces the pulse width of a switching transistor SW11. In addition, it outputs an instruction which forcibly turns off the switching transistor. At this time, it outputs the instruction when an input voltage is less than 1/5 in the ratio of the input voltage to a maximum value. Thereby, since a threshold voltage is changed according to the level of the input voltage, it is possible to obtain a power-supply circuit which can deal with an extensive input voltage and whose versatility can be enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit, and more particularly to improvement of a power factor of a high-frequency switching power supply circuit. In recent years, with the spread of electronic devices that use switching power supplies, high-frequency current to the power supply line has increased, causing failures in other electronic devices and causing harmonic interference in power transmission and distribution systems. It is being studied, and further improvement of the power factor has been demanded in order to respond thereto.

[0002]

2. Description of the Related Art A conventional power supply circuit will be described below with reference to the drawings. In a conventional power supply circuit, various attempts have been made to improve the power factor. In general, a power supply circuit is generally used which rectifies an AC voltage by a rectifier circuit and outputs the rectified voltage, and simultaneously detects the output voltage to make the output voltage constant. In such a circuit, there are two types of circuits: self-excited oscillation and separately excited oscillation.

[0003] When a DC voltage is generated, an AC voltage which is a basis changes so as to draw a sinusoidal waveform. However, during a period in which the AC voltage is low, oscillation stability is low irrespective of a self-excited circuit or a separately excited circuit. Since there is a problem that abnormal oscillation occurs, usually, a capacitor is connected to the output of the rectifier circuit to smooth the rectified waveform to prevent such abnormal oscillation. However, in a circuit using such a smoothing capacitor, the power factor is reduced to about 0.5 to 0.6. The following circuit has been proposed.

As shown in FIG. 5, this power supply circuit includes a bridge circuit 1, a flyback converter 2, a transformer 3,
This is a circuit including the abnormal oscillation suppressing circuit 4, the noise removing capacitor C1, and the switching transistor TR1.
According to this circuit, the power factor is improved by removing the smoothing capacitor, and the abnormal oscillation when the voltage is low is suppressed by the abnormal oscillation suppressing circuit. In FIG. 5, the terminal A, which is the anode terminal of the diode D1, is connected to the terminal B of the collector of the transistor Q1, and the base terminal of the transistor Q1 is connected to a constant voltage.

According to the above circuit, first, an AC voltage is input to the bridge circuit 1, full-wave rectified and output to the abnormal oscillation suppression circuit 4, and at the same time, is output to the primary coil side of the transformer 3. The flyback converter 2 and the switching transistor TR1 are connected in series to the primary coil of the transformer 3. The collector of the transistor Q2 is a resistor R
9, R6, and R13 are connected to one output side of the bridge circuit 1, and the base of the transistor Q2 is connected to the other output side of the bridge circuit 1 via a resistor R11.

Therefore, when the input voltage from the bridge circuit 1 fluctuates, the base potential divided by the resistance ratio of the resistors R11 and R12 fluctuates.
N / OFF operation is performed. Then, the transistor Q2 is turned on.
The transistor Q1 turns ON / OF in conjunction with the / OFF operation
F operates and the switching transistor T
R1 performs an OFF / ON operation.

As described above, when the input voltage exceeds a predetermined voltage, the switching transistor T
R1 is turned off and the voltage drops. When the voltage drops below a predetermined voltage, the switching transistor TR1 is turned on and the voltage rises.
The reference voltage Vref is obtained by turning on / off R1.
Is maintained constant, a voltage stabilized near a predetermined voltage is supplied to the primary coil of the transformer 3, an induced electromotive force is generated on the secondary coil side of the transformer 3, and the diode D 10 and the capacitor The power supply voltage Vout generated via the rectifier circuit composed of C10 is stabilized.

Further, in a time zone where the input voltage where the abnormal oscillation tends to occur is low and the oscillation stability is low, the voltage is divided by the resistance ratio of the resistors R1 and R2 of the abnormal oscillation suppressing circuit 4 according to the decrease of the input voltage. The potential on the cathode side of the diode D1 decreases, and as a result, the terminal A on the anode side of the diode D1
Potential drops. In this circuit, since the terminal A is connected to the terminal B connected to the emitter of the transistor Q1, the potential of the terminal B decreases, and the gate voltage of the switching transistor TR1 decreases.
By appropriately setting the resistance value of the switching transistor T, regardless of the operation control of the flyback converter 2 when the input voltage falls below a certain voltage,
R1 can be forcibly turned off.

As described above, the power factor can be improved by removing the smoothing capacitor, and at the time when the input voltage is low where abnormal oscillation often occurs, FIGS.
Since the switching transistor TR1 is forcibly turned off as shown in (2), it is easy to prevent the voltage from being applied to the primary coil of the transformer 3.
It is possible to suppress abnormal oscillation occurring in a circuit from which the smoothing capacitor has been simply removed.

[0010]

However, in the above-described circuit, a predetermined constant voltage, for example, 5 V, is set when setting a period for forcibly turning off the switching transistor TR1 (hereinafter referred to as an OFF period) to suppress abnormal oscillation. It was set to turn off when the following conditions were reached.

Since this constant voltage is fixed to a constant value regardless of the magnitude of the input voltage, as shown in FIG. 8, the OFF period Δt1 when the maximum value of the input voltage is relatively small.
And the OFF period Δt2 when the maximum value of the input voltage is relatively large, Δt2 becomes smaller,
It can be seen that as the input voltage increases, the OFF period relatively decreases. Therefore, when the input voltage becomes considerably large, the OFF period becomes extremely close to zero, and has little meaning for the purpose of suppressing abnormal oscillation, and abnormal oscillation may occur.

For this reason, it is not possible to cope with equipment used for applications having a wide input voltage range, and there is a problem that versatility is low.

[0013]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional disadvantages. As shown in FIG. 1, a bridge circuit for rectifying an AC voltage and outputting the rectified AC voltage from first and second output terminals. An output circuit connected between the first output terminal and the second output terminal to generate a power supply voltage based on an output voltage of the bridge circuit; and the first and second output terminals and the output circuit. A switching element connected between the switching element and an ON / OFF operation to control a voltage value of an output voltage of the bridge circuit;
A control circuit for controlling the F operation, and a command for forcibly reducing the pulse width of the switching element to the control circuit when the output voltage of the bridge circuit is extremely small compared to the maximum value of the output voltage. An object of the present invention is to solve the above problem by a power supply circuit having an abnormal oscillation suppressing circuit for outputting an instruction for forcibly turning off the switching element to the control circuit.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of the power supply circuit according to the present embodiment, and FIGS. 2, 3, and 4 are graphs illustrating the operation of the power supply circuit according to the present embodiment. As shown in FIG. 1, this circuit includes a bridge circuit 11, a control circuit 15, an output circuit 16, a switching transistor S
The power supply circuit includes a W11 and an abnormal oscillation suppression circuit 17, and supplies a stabilized power supply voltage by inputting a pulse wave from the outside and driving the switching transistor SW11.

The bridge circuit 11 rectifies the AC input voltage Vin input thereto and converts the rectified input voltage Vin into first and second output terminals Vo.
1, a circuit for outputting from Vo2. The output circuit 16 includes a diode D0 and a capacitor C10 connected between the first output terminal Vo1 and the second output terminal Vo2, and a choke coil L, and is a bridge stabilized by a control circuit described later. This circuit outputs the output voltage of the circuit 11 as the power supply voltage Vout. In this circuit, there are provided sixth and seventh resistors R6 and R7 which are connected in series between the first output terminal Vo1 and the second output terminal Vo2. 6, divided by the bleeder ratio of the seventh resistors R6 and R7 and input to an error amplifier 12 described later. The details will be described later.

The switching transistor SW11 is an example of a switching element, and is connected between the output circuit 16 and the first and second output terminals Vo1 and Vo2, and is turned on / off.
An element that operates and charges / discharges a choke coil L described later to raise / lower the voltage to adjust the power supply voltage Vout. The control circuit 15 constantly detects the power supply voltage Vout,
Based on this state, the switching transistor SW11
Circuit for controlling the ON / OFF operation of the amplifier and supplying a stabilized power supply voltage Vout.
2, a comparator 13 and a drive circuit 14.

The error amplifier 12 has a predetermined reference voltage Vre
f is input to the non-inverting input +, the voltage V1 input to the inverting input-is compared with the reference voltage Vref, and when the reference voltage Vref exceeds the voltage V1, a high level (hereinafter referred to as "H") is output. This circuit outputs a low level (hereinafter, referred to as “L”) when the output falls below the threshold. Note that the voltage V1 input to the inverting input-is basically equal to the above-described sixth and seventh resistors R
6 and the power supply voltage Vout divided by R7. Since the inverting input-is also connected to an abnormal oscillation suppressing circuit 17, which will be described later, it also affects the operation of the abnormal oscillation suppressing circuit 17.

The comparator 13 is a circuit that compares the current flowing through the switching transistor SW11 with the output of the error amplifier 12, compares the current with the reference pulse wave, and outputs a PWM-modulated rectangular wave to the drive circuit 14. . The drive circuit 14 is a circuit for turning on / off a switching transistor SW11 described later based on a rectangular wave output from the comparator 13.

The abnormal oscillation suppressing circuit 17 includes the bridge circuit 1
1 is always detected, and when the voltage level is low, the output of the error amplifier 12 is forcibly reduced to output a command for forcibly reducing the pulse width of the switching transistor SW11. This is a circuit that outputs a command to forcibly turn off the switching transistor. In this circuit, the voltage in the command is forcibly determined based on a ratio with respect to the maximum value of the input voltage. Therefore, the voltage level in the command varies according to the maximum value of the input voltage. In the present embodiment, a command for forcibly reducing the pulse width of the switching transistor SW11 is output when the input voltage falls below １ ／ of the maximum value of the input voltage, and a command for forcibly turning off the switching transistor is output. .

In this respect, the power supply circuit according to this embodiment is
The voltage for setting the FF period was fixed (for example, 5 V)
This is the most different point from the conventional circuit. As shown in FIG. 1, the abnormal oscillation suppressing circuit 17 includes a first resistor R1, a second resistor R2 connected in series between a first output terminal Vo1 and a second output terminal Vo2, and a first resistor R1. A first capacitor C1 connected in parallel with R1, a diode having a cathode connected between the first resistor R1 and the second resistor R2, an anode connected to the diode, and a second output terminal A third capacitor R2 connected in series between the inverting input of the error amplifier and the anode of the diode.
And the third capacitor C3.

The operation of the above circuit will be described below in two cases: a state where the output voltage of the bridge circuit 1 is relatively high and oscillation stability is good, and a state where the output voltage of the bridge circuit 1 is relatively low and oscillation stability is poor. I will explain separately. (1) Operation with Good Oscillation Stability First, when power is turned on, the bridge circuit 11 rectifies the AC input voltage Vin, and the first and second output terminals Vo.
1 and Vo2, and output by the output circuit 16 as the power supply voltage Vout.

The output voltage of the bridge circuit 11 is a resistor R6
R7 is divided by the negative input of the error amplifier 12
Is output to Next, this output voltage is compared with the reference voltage Vref by the error amplifier 12, and the comparison result is output from the error amplifier 12. If the reference voltage Vref is higher than V1, "H" is output, and if it is lower, "L" is output.

The output of the error amplifier 12 is the comparator 1
3 is input to one input. From the other terminal of the comparator 13, a current flowing through the switching transistor SW11 is output to the other input of the comparator 13, and a reference triangular pulse wave is compared and output. The switching transistor SW11 is turned ON / OF by the drive circuit 14 based on the pulse of the comparator 13.
F.

Here, the switching transistor SW11
Is turned on, a current ID flows through the drain thereof, thereby causing the choke coil L of the output circuit to output {(1/2) L} I
An energy E of D × ID is stored. At the moment of this ON, the potential Va at the point A in FIG. 1 is almost 0V. Next, the switching transistor SW11 is turned off.
Then, the current ID stops flowing, the energy stored in the choke coil L is released, and the potential Va at the point A rises. This is rectified by the diode D0 and the capacitor C10 and output as the power supply voltage Vout. The magnitude of the potential Va at the point A is determined by the magnitude of the energy E stored in the choke coil L, and the magnitude of this energy is defined by the ON / OFF duty ratio and the current of the switching transistor SW11. Further, the switching transistor SW11 is turned on.
The duty ratio of / OFF is determined by the pulse width of the output of the drive circuit 14.

Therefore, when the power supply voltage Vout is lower than the predetermined voltage, the switching transistor SW11 is turned on.
The power supply voltage Vout is driven to increase by increasing the energy E stored in the choke coil L by increasing the period during which the power supply voltage Vout is increased. Conversely, when the power supply voltage Vout is higher than a predetermined voltage, the switching transistor SW11 is turned on. The driving period is shortened so that the energy E stored in the choke coil L is reduced and the power supply voltage Vout is lowered.

By repeating such an operation at all times, a power supply voltage Vout stabilized at a predetermined voltage is output. (2) Operation with Oscillation Stability Reduced When the output voltage of the bridge circuit decreases, the oscillation stability may decrease and abnormal oscillation may occur. In the present embodiment, an abnormal oscillation suppression circuit 17 is provided to cope with this. The case will be described below.

In this case, the output voltage of the bridge circuit 11 becomes extremely small (about 1/5 of the peak voltage Vp).
Therefore, the diode D1 divided by the first and second resistors R1 and R2 and the first and second capacitors C1 and C2
, The potential on the anode side of the diode D1 decreases accordingly. In this circuit, since the anode and the output of the error amplifier 12 are connected via the third resistor R3, the potential V1 of the output of the error amplifier 12 decreases regardless of the level of the power supply voltage Vout, and 12 is always "L". As a result, the input of the comparator becomes "L" in this case, so that the drive circuit 14 forcibly reduces the pulse width of the switching transistor SW11 and issues a command for forcibly turning off the switching transistor SW11 during this period. Output and maintain this state during this period.

Although the conventional circuit has an abnormal oscillation suppression circuit, depending on whether or not it has a transmitter, the conventional abnormal oscillation suppression circuit has a threshold voltage for forcibly turning off. Is fixed, so that the versatility is poor. However, in the circuit of the present embodiment, the voltage to be turned off is not simply determined by the division ratio of the first and second resistors R1 and R2 as in the related art. , These are the first and second
Are connected in parallel to each other, an AC component of the input voltage is generated in the third resistor R3. Even if the input voltage changes, the AC component changes accordingly. No matter what level the input voltage is, this voltage is set to, for example, about 1/5 of the maximum value Vp of the input voltage. Then, it becomes possible to reduce the pulse width of the switching transistor SW11 or to forcibly turn off the switching transistor SW11.

By doing so, FIGS. 2 and 3
As shown in (1), the OFF period Δt11 when the maximum value Vp of the input voltage is large (FIG. 2) and the OFF period Δt12 when the maximum value Vp of the input voltage is large (FIG. 3) can be made substantially equal. Therefore, regardless of the maximum value Vp of the input voltage, the suppression of abnormal oscillation can be stably maintained, so that the present invention can be applied to a wide input voltage range.

Although the ratio of the input voltage to the maximum value Vp is set to 1/5 in the present embodiment, the present invention is not limited to this. For example, the ratio is reduced to 1/6, 1/4 or less of the maximum value. The same effect can be obtained even if the setting is made to be turned off when the operation is performed. To adjust this ratio, the first and second resistors R
This can be dealt with by adjusting the resistance values of R1 and R2 and the capacitance value of the first capacitor C1.

Further, in the circuit according to the present embodiment,
C3, C4, R4, and R8 function as phase correction of the error amplifier. In addition, since C3 and R4 are connected to a place where the error amplifier operates as an integrating circuit,
Since the error amplifier output waveform becomes gentler as the capacitance of C3 increases, the waveform of the peak current ID flowing to the drain of the switching transistor SW11 can be blunted as shown by the waveforms c and d in FIG. Resistance R of 4
By adjusting the resistance value of the fourth capacitor C4 and the capacitance value of the fourth capacitor C4, the falling waveform of the current ID shown in FIG. 4E can be adjusted. In order to improve the power factor, the portion where the waveform of the input voltage overlaps with the waveform of the peak current ID should be increased, and the waveform of the current ID also affects the power factor improvement. It is also possible to further improve the power factor by appropriately adjusting the value of.

In this embodiment, an n-channel MOS transistor is used as an example of a switching element. However, the present invention is not limited to this. For example, a p-channel MOS transistor, a bipolar transistor, or the like has the same effect. To play.

[0033]

As described above, according to the power supply circuit according to the present invention, during the period when the oscillation stability of the input voltage is low, that is, during the period when the input voltage is relatively low, the abnormal oscillation suppressing circuit controls the switching element. Outputs a command for forcibly reducing the pulse width, or outputs a command for forcibly turning off the switching element, and forcibly turns off.
Since the threshold voltage for determining the period to be set is extremely small compared to the maximum value of the output voltage, for example, when it becomes about 1/5 of the maximum value, the threshold voltage is fixed at a constant value. Unlike the related art, the threshold voltage fluctuates according to the level of the input voltage, so that it is possible to cope with a wide range of input voltages according to the fluctuation of the level of the maximum value of the input voltage, thereby improving versatility. .

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a power supply circuit according to an embodiment of the present invention.

FIG. 2 is a first diagram illustrating an operation of the power supply circuit according to the embodiment of the present invention.

FIG. 3 is a second diagram illustrating the operation of the power supply circuit according to the embodiment of the present invention.

FIG. 4 is a third diagram illustrating the operation of the power supply circuit according to the embodiment of the present invention.

FIG. 5 is a circuit diagram of a power supply circuit according to a conventional example.

FIG. 6 is a first graph illustrating an operation of a power supply circuit according to a conventional example.

FIG. 7 is a second graph illustrating the operation of the power supply circuit according to the conventional example.

FIG. 8 is a graph illustrating a problem of the power supply circuit according to the conventional example.

[Explanation of symbols]

Reference Signs List 11 bridge circuit 12 error amplifier 13 comparator 14 drive circuit 15 control circuit 16 output circuit 17 abnormal oscillation suppression circuit SW11 switching transistor (switching element) L choke coil Vo1 first output terminal Vo2 second output terminal

Claims (3)

[Claims] 1. A bridge circuit that rectifies an AC voltage and outputs the rectified AC voltage from first and second output terminals, and a bridge circuit connected between the first output terminal and the second output terminal.
An output circuit that generates a power supply voltage based on an output voltage of the bridge circuit; an output circuit that is connected between the first and second output terminals and the output circuit and that performs an ON / OFF operation to output the output of the bridge circuit; A switching element for controlling a voltage value of a voltage; a control circuit for controlling ON / OFF operation of the switching element; and an output voltage of the bridge circuit, when the output voltage is extremely small compared to the maximum value of the output voltage, An abnormal oscillation suppressing circuit for outputting a command for forcibly reducing the pulse width of the switching element to the control circuit, and outputting a command for forcibly turning off the switching element to the control circuit. Power circuit. 2. The control circuit has an inverting input and a non-inverting input, inputs the power supply voltage to the inverting input, inputs a constant reference voltage to the non-inverting input, An error amplifier that outputs a high-level signal when the input potential exceeds the potential of the inverting input, and outputs a low-level signal when the potential of the non-inverting input falls below the potential of the inverting input; Comparing the output of the error amplifier with the current flowing through the switching element, and comparing the pulse wave input from the outside as a reference, outputting a reset signal when the output of the error amplifier falls, A comparator that outputs a PWM-modulated rectangular wave, and PWM-modulates the output of the comparator to turn on / off the switching element based on the modulated waveform. And a drive circuit, wherein the abnormal oscillation suppression circuit comprises: a first resistor connected in series between the first output terminal and a second output terminal; and a first resistor A first capacitor connected in parallel with the first resistor, a first diode having a cathode connected between the first resistor and the second resistor, an anode of the first diode, and the second output. And a third capacitor connected in series between the inverting input of the error amplifier and the anode of the diode, a fourth resistor and a third capacitor. A choke coil connected between one end of the switching element and the first output terminal for charging and discharging in response to an ON / OFF state of the switching element; 2. A circuit comprising: a second diode having one end connected to the second diode; and an output capacitor connected between the other end of the second diode and the second output terminal. Power circuit. 3. The case where the output voltage is extremely small compared to the maximum value of the output voltage means that the output voltage is reduced to about 1/5 or less of the maximum value of the output voltage. The power supply circuit according to claim 1, wherein: