JPH10163786A - Attenuator - Google Patents
AttenuatorInfo
- Publication number
- JPH10163786A JPH10163786A JP32059396A JP32059396A JPH10163786A JP H10163786 A JPH10163786 A JP H10163786A JP 32059396 A JP32059396 A JP 32059396A JP 32059396 A JP32059396 A JP 32059396A JP H10163786 A JPH10163786 A JP H10163786A
- Authority
- JP
- Japan
- Prior art keywords
- diode
- capacitor
- inductor
- attenuator
- resonance circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Landscapes
- Attenuators (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、低挿入損失のアッ
テネータに関する。The present invention relates to a low insertion loss attenuator.
【0002】[0002]
【従来の技術】近年、たとえば自動車電話あるいは携帯
電話の移動体通信機器用に挿入損失を小さくしたアッテ
ネータが用いられている。2. Description of the Related Art In recent years, for example, an attenuator having a small insertion loss has been used for a mobile communication device such as an automobile telephone or a portable telephone.
【0003】そして、従来、この種の電力損失のアッテ
ネータとしては、たとえば特開平6−152301号公
報に記載の構成が知られている。[0003] Conventionally, as an attenuator of this kind of power loss, for example, a configuration described in Japanese Patent Application Laid-Open No. 6-152301 is known.
【0004】この特開平6−152301号公報には、
4つのPINダイオードをπ型に接続し、このPINダ
イオードのコントロール端子側および接地配線に高周波
チョークコイルを接続している。そして、高周波チョー
クコイルは、直流成分に対して非常に小さなインピーダ
ンスとなるとともに、PINダイオードは低電圧で駆動
するので、低電圧でアッテネータを駆動でき、低挿入損
失とすることができる。Japanese Patent Application Laid-Open No. 6-152301 discloses that
The four PIN diodes are connected in a π-type, and a high-frequency choke coil is connected to the control terminal side of the PIN diodes and the ground wiring. The high-frequency choke coil has a very small impedance with respect to the DC component, and the PIN diode is driven at a low voltage. Therefore, the attenuator can be driven at a low voltage and the insertion loss can be reduced.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、上記特
開平6−152301号公報に記載の構成では、PIN
ダイオードを低電圧で駆動することができるものの、ダ
イオードの高周波抵抗低減には限界がある問題を有して
いる。However, in the configuration described in Japanese Patent Application Laid-Open No. 6-152301, the PIN
Although the diode can be driven at a low voltage, there is a problem that the reduction of the high-frequency resistance of the diode is limited.
【0006】本発明は、上記問題点に鑑みなされたもの
で、より低挿入損失化を図ったアッテネータを提供する
ことを目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide an attenuator with lower insertion loss.
【0007】[0007]
【課題を解決するための手段】請求項1記載のアッテネ
ータは、入出力端間に接続されたインダクタおよびキャ
パシタの直列共振回路を具備したもので、入出力端子間
で直列共振回路により、低挿入損失化を図れる。According to a first aspect of the present invention, there is provided an attenuator having a series resonance circuit of an inductor and a capacitor connected between input and output terminals. Loss can be achieved.
【0008】請求項2記載のアッテネータは、請求項1
記載のアッテネータにおいて、インダクタおよびキャパ
シタとともに形成される並列共振回路を具備したもの
で、並列共振により必要な周波数帯でRF信号を減衰す
る。[0008] The attenuator according to the second aspect is the first aspect of the invention.
The attenuator described above includes a parallel resonance circuit formed with an inductor and a capacitor, and attenuates an RF signal in a required frequency band by the parallel resonance.
【0009】請求項3記載のアッテネータは、請求項2
記載のアッテネータにおいて、並列共振回路内に接続さ
れ共振を制御するダイオードを具備したもので、ダイオ
ードにより並列共振のQ値を制御でき、適切な減衰にな
る。A third aspect of the present invention provides an attenuator.
The attenuator described includes a diode connected in the parallel resonance circuit to control resonance, and the Q value of the parallel resonance can be controlled by the diode, resulting in appropriate attenuation.
【0010】[0010]
【発明の実施の形態】以下、本発明のアッテネータの一
実施の形態を図面に示す電圧制御可変型のアッテネータ
を参照して説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the attenuator of the present invention will be described below with reference to a variable voltage control type attenuator shown in the drawings.
【0011】図1は本発明の一実施の形態のアッテネー
タを示す回路図で、高周波入力端子RF IN および高周波
出力端子RF OUT間に、インダクタL1、キャパシタとして
のコンデンサC1およびインダクタL2の直列共振回路1が
接続されている。また、インダクタL1に対して並列にコ
ンデンサC2および並列共振を制御するダイオードD1の直
列回路が接続されて並列共振回路2が形成され、インダ
クタL2に対して並列にコンデンサC3および並列共振を制
御するダイオードD2の直列回路が接続されて並列共振回
路3が形成されている。FIG. 1 is a circuit diagram showing an attenuator according to an embodiment of the present invention. A series resonance circuit of an inductor L1, a capacitor C1 as a capacitor, and an inductor L2 is provided between a high frequency input terminal RF IN and a high frequency output terminal RF OUT. 1 is connected. A series circuit of a capacitor C2 and a diode D1 for controlling parallel resonance is connected in parallel with the inductor L1 to form a parallel resonance circuit 2, and a capacitor C3 and a diode for controlling parallel resonance in parallel with the inductor L2. The parallel resonance circuit 3 is formed by connecting the series circuits of D2.
【0012】また、コンデンサC2およびダイオードD1の
接続点に抵抗R1が接続され、コンデンサC3およびダイオ
ードD2の接続点に抵抗R2が接続され、これら抵抗R1およ
び抵抗R2の接続点にコントロール端子CONTが形成されて
いる。A resistor R1 is connected to a connection point between the capacitor C2 and the diode D1, a resistor R2 is connected to a connection point between the capacitor C3 and the diode D2, and a control terminal CONT is formed at a connection point between the resistors R1 and R2. Have been.
【0013】さらに、高周波入力端子RF IN はマッチン
グ用のダイオードD3および抵抗R3の直列回路を介して接
地され、高周波出力端子RF OUTはマッチング用のダイオ
ードD4および抵抗R4の直列回路を介して接地され、コン
デンサC1の一端は信号シャント用のダイオードD5、他端
は同じく信号シャント用のダイオードD6を介して接地さ
れている。Further, the high frequency input terminal RF IN is grounded via a series circuit of a matching diode D3 and a resistor R3, and the high frequency output terminal RF OUT is grounded via a series circuit of a matching diode D4 and a resistor R4. One end of the capacitor C1 is grounded via a signal shunt diode D5, and the other end is also grounded via a signal shunt diode D6.
【0014】次に、上記実施の形態の動作について説明
する。Next, the operation of the above embodiment will be described.
【0015】まず、コントロール端子CONTからコントロ
ール電流が供給されると、コントロール電流に従いイン
ダクタL1、コンデンサC1およびインダクタL2の直列共振
回路1で直列共振するとともに、インダクタL1、コンデ
ンサC2およびダイオードD1の並列共振回路2で並列共振
し、インダクタL2、コンデンサC3およびダイオードD2の
並列共振回路3で並列共振し、高周波入力端子RF IN か
ら入力された高周波は所定量減衰されて高周波出力端子
RF OUTから出力される。First, when a control current is supplied from the control terminal CONT, a series resonance occurs in the series resonance circuit 1 of the inductor L1, the capacitor C1, and the inductor L2 according to the control current, and a parallel resonance of the inductor L1, the capacitor C2, and the diode D1 occurs. The circuit 2 resonates in parallel, the inductor L2, the capacitor C3, and the diode D2 resonate in parallel. The high frequency input from the high frequency input terminal RF IN is attenuated by a predetermined amount, and the high frequency output terminal
Output from RF OUT.
【0016】また、高周波入力端子RF IN および高周波
出力端子RF OUT間には、インダクタL1、コンデンサC1お
よびインダクタL2の直列共振回路1のみが接続されてい
るため、ダイオードなどが接続されている場合に比べて
挿入損失を大きく低減できる。Further, since only the series resonance circuit 1 of the inductor L1, the capacitor C1 and the inductor L2 is connected between the high-frequency input terminal RF IN and the high-frequency output terminal RF OUT, when a diode or the like is connected. In comparison, the insertion loss can be greatly reduced.
【0017】なお、上記実施の形態のダイオードD1〜D6
は、挿入損失あるいはアッテネーションレベルに従いP
INダイオード、PN接合ダイオードあるいはショット
キーダイオードなどのいずれをも用いることができ、接
続は上述の形態に限らずπ型あるいはT型などとするこ
とができる。Note that the diodes D1 to D6 of the above embodiment
Is P according to the insertion loss or attenuation level.
Any of an IN diode, a PN junction diode, a Schottky diode, or the like can be used, and the connection is not limited to the above-described embodiment, and may be a π type or a T type.
【0018】[0018]
【発明の効果】請求項1記載のアッテネータによれば、
入出力端間に接続されたインダクタおよびキャパシタの
直列共振回路を具備したことにより、入出力端子間で直
列共振回路が形成され、低挿入損失化を図ることができ
る。According to the attenuator of the first aspect,
By providing a series resonance circuit of an inductor and a capacitor connected between the input and output terminals, a series resonance circuit is formed between the input and output terminals, and low insertion loss can be achieved.
【0019】請求項2記載のアッテネータによれば、請
求項1記載のアッテネータに加え、インダクタおよびキ
ャパシタのいずれかの素子とともに形成される並列共振
回路を具備したので、並列共振により必要な周波数を減
衰できる。According to the attenuator according to the second aspect, in addition to the attenuator according to the first aspect, a parallel resonance circuit formed together with any one of an inductor and a capacitor is provided, so that a required frequency is attenuated by parallel resonance. it can.
【0020】請求項3記載のアッテネータによれば、請
求項2記載のアッテネータに加え、並列共振回路内に接
続され共振を制御するダイオードを具備したので、ダイ
オードにより並列共振のQ値を制御でき、適切に減衰で
きる。According to the attenuator according to the third aspect, in addition to the attenuator according to the second aspect, since a diode connected to the parallel resonance circuit and controlling resonance is provided, the Q value of the parallel resonance can be controlled by the diode. Can be attenuated appropriately.
【図1】本発明のアッテネータの一実施の形態を示す回
路図である。FIG. 1 is a circuit diagram showing an embodiment of an attenuator according to the present invention.
【図2】周波数と減衰量およびバイアス電流との関係を
示すグラフである。FIG. 2 is a graph showing a relationship between frequency, attenuation, and bias current.
1 直列共振回路 2,3 並列共振回路 C1 キャパシタとしてのコンデンサ D1,D2 ダイオード L1,L2 インダクタ 1. Series resonant circuit 2, 3 Parallel resonant circuit C1 Capacitors D1, D2 Diode L1, L2 Inductor
Claims (3)
びキャパシタの直列共振回路を具備したことを特徴とす
るアッテネータ。1. An attenuator comprising: a series resonance circuit of an inductor and a capacitor connected between an input / output terminal.
成される並列共振回路を具備したことを特徴とする請求
項1記載のアッテネータ。2. The attenuator according to claim 1, further comprising a parallel resonance circuit formed together with the inductor and the capacitor.
るダイオードを具備したことを特徴とする請求項2記載
のアッテネータ。3. The attenuator according to claim 2, further comprising a diode connected in the parallel resonance circuit to control resonance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32059396A JPH10163786A (en) | 1996-11-29 | 1996-11-29 | Attenuator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32059396A JPH10163786A (en) | 1996-11-29 | 1996-11-29 | Attenuator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10163786A true JPH10163786A (en) | 1998-06-19 |
Family
ID=18123153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP32059396A Abandoned JPH10163786A (en) | 1996-11-29 | 1996-11-29 | Attenuator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10163786A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7184731B2 (en) | 2002-11-12 | 2007-02-27 | Gi Mun Kim | Variable attenuator system and method |
US7274272B2 (en) | 2004-11-11 | 2007-09-25 | Electronics And Telecommunications Research Institute | Microwave variable attenuator |
US7755214B2 (en) | 2005-06-01 | 2010-07-13 | Samsung Electronics Co., Ltd. | Diode circuit having passive element property, impedance modulator including the diode circuit, and DC source including the diode circuit |
-
1996
- 1996-11-29 JP JP32059396A patent/JPH10163786A/en not_active Abandoned
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7184731B2 (en) | 2002-11-12 | 2007-02-27 | Gi Mun Kim | Variable attenuator system and method |
US7274272B2 (en) | 2004-11-11 | 2007-09-25 | Electronics And Telecommunications Research Institute | Microwave variable attenuator |
US7755214B2 (en) | 2005-06-01 | 2010-07-13 | Samsung Electronics Co., Ltd. | Diode circuit having passive element property, impedance modulator including the diode circuit, and DC source including the diode circuit |
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