JPH10160799A - Test head of semiconductor-testing device and its performance board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simultaneously supply a plurality of power supplies for peripheral circuit with a simple configuration by providing a relay for supplying a plurality of power supplies simultaneously. SOLUTION: A relay 81 for turning on or off four circuits is provided on a performance board 41, its drive coil is connected between a power supply for periphery circuit and the ground, and each power supply is connected to the ON/OFF circuits of the relay 81. The performance board 41 is mounted on a test head and a power supply for periphery circuit and a test signal from a semiconductor-testing device body are supplied to a mother board 33. The former and the latter are connected to a contact ring 50 via a cable 34 and a pin card 32, respectively. Then, the performance board 41 is crimped and locked to a contact ring 50 by a slide link 70 and a power supply for periphery circuit is supplied to the performance board 41. More specifically, since the relay of the ON/OFF means of power supply for periphery circuit is provided at the performance board 41, a plurality of power supplies for periphery circuit can be supplied simultaneously with a simple configuration where the number of parts is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test head of a semiconductor test apparatus for supplying power for a peripheral circuit of a device under test to a performance board, and a performance board thereof.

[0002]

2. Description of the Related Art An example of the prior art will be described with reference to FIGS. As shown in FIG. 4, the configuration of the semiconductor test apparatus includes a workstation 10 serving as an operation interface, a semiconductor test apparatus main body 20 including a power supply unit of each unit and apparatus for generating and testing a test signal, And a test head 30 serving as an interface with the device under test.

As shown in FIG. 5, a main part of a conventional test head includes a test head body 31 and a mother board 3.
3, a pin card 32, a relay circuit board 37, a switch 90, a cable 34, and a contact ring 50.
, Performance board 40 and slide ring 70
It consists of: Then, the test signal and the power supply for the peripheral circuit from the semiconductor test apparatus main body 20 are supplied to the motherboard 33 of the test head. Next, the test signal supplied to the motherboard 33 is transmitted via a pin card 32 mounted on the motherboard 33, and the power supply for the peripheral circuit is transmitted via a relay circuit board 37 which is turned on / off by a switch 90 mounted on the motherboard 33. It is connected to a contact ring 50 by a cable 34. Further, the performance board 40 is attached to the contact ring 50 by the slide ring 70.
The test signal and the power supply for the peripheral circuit are supplied to the performance board 40.

Here, the performance board 40 is
The interface between the semiconductor test apparatus and the device under test is made of, for example, a multilayer printed wiring board having a side of about 30 to 40 cm, and is used by being attached to a test head. The peripheral circuit power supply is a power supply for supplying a circuit provided on the performance board 40 in accordance with the device under test in order to test the device under test.

As shown in the partial configuration diagram of the test head in FIG. 6, the power supply for the peripheral circuit to the performance board 40 is performed by a relay in which the power supply for the peripheral circuit is inserted into the board socket 36 mounted on the motherboard 33. Circuit board 3
7, the tip of a pogo pin 51 whose contact end is stretchable is pressed against a contact pad 46 of the performance board 40 by a cable 34 via a cable 34, and a power supply for a peripheral circuit is switched by a switch. 90
Is supplied by being turned ON / OFF.

On the other hand, the GND potential serving as a reference for the ground pattern 38 is directly transmitted from the motherboard 33 to the cable 34.
To the contact ring 50. Generally, GND
The potential is supplied through a plurality of paths to lower the impedance of the GND potential.

As shown in FIG. 7, a circuit of a power supply for a peripheral circuit in a conventional test head is provided on a relay circuit board 37 inserted in a board socket 36 by a relay driven by +5 V of the power supply for a peripheral circuit. 84-87 and its +
By turning on / off the 5V voltage, the relay 84-
And a switch 90 that is disposed near the test head and controls the peripheral circuit power supply + 5V, -5.2V, + 15V,
-15 V is supplied to the performance board 40.

FIG. 8A shows a performance board 40.
As shown in the figure, one side of the performance board 40 is the side to be brought into contact with the contact ring 50 and is the A side of the performance board 40. On the A side of the performance board 40, there are a large number of contact pads 46 arranged on the circumference to which the tips of the pogo pins 51 are pressed and the wiring side of the peripheral circuit mounting area 44. Also, there is a slide ring hole 45 into which the foot of the slide ring 70 is inserted.
V, −5.2 V, +15 V, and −15 V are drawn out to each land, and a test signal is supplied by connecting to the IC socket land 43 with the coaxial cable 35.

As shown in FIG. 8B, an IC socket 61 for inserting a device under test is mounted on the other side of the performance board 40, and a peripheral circuit mounting area 4 is provided.
Reference numeral 4 denotes a side on which components of a peripheral circuit for the device under test are mounted, which is the B side of the performance board 40.

When a desired device under test is tested, a performance board 40 corresponding to the device under test is mounted on a contact ring 50 and mounted on a slide ring 70. While the performance board 40 is mounted on the contact ring 50 of the test head 30 and is pressed and fixed by the slide ring 70, a large number of pogo pins 51 and the contact pads 46 come into contact with each other. . Therefore, when the switch 90 is kept ON, or when there is no switch 90 and all the plurality of power supplies for the peripheral circuits are in the active state, the plurality of power supplies for the peripheral circuits are not applied at the same time. The operation is unclear, which is not preferable.

Therefore, when a plurality of power supplies for the peripheral circuit are supplied to the performance board 40, the performance board 40 is mounted on the contact ring 50 of the test head 30 and fixed by crimping with the slide ring 70 before the switch is mounted. By turning on 90, a plurality of power supplies for peripheral circuits supplied from the semiconductor test apparatus main body 20 are turned on.
They are supplied to the performance board 40 at the same time.

[0012]

As described above, when a plurality of power supplies for the peripheral circuit are supplied to the performance board 40, the board socket 36 and the relay circuit board 37 are provided.
In addition, the switch 90 is required, and the number of parts is increased and the cost is increased. Therefore, the present invention has been made in view of such a problem, and an object of the present invention is to provide a test head of a semiconductor test apparatus that simultaneously supplies a plurality of power supplies for peripheral circuits with a simple configuration when a performance board is mounted on the test head. It is to provide the performance board.

[0013]

That is, a first aspect of the present invention, which has been made to achieve the above object, is to test a semiconductor test apparatus for supplying a plurality of power supplies for a peripheral circuit of a device under test to a performance board. In the head, when the performance board is mounted on the test head,
A gist of the present invention is a test head of a semiconductor test apparatus, wherein a relay capable of simultaneously supplying a plurality of power supplies is provided on the performance board.

According to a second aspect of the present invention, in order to achieve the above object, a plurality of power supplies for peripheral circuits can be simultaneously supplied by operating a relay by a program. The gist is a test head of a test device.

Further, a third aspect of the present invention, which has been made to achieve the above object, is to operate a relay with a power supply for a peripheral circuit to simultaneously supply a plurality of power supplies for the peripheral circuit. The gist is the performance board of the test head of the device.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in the following examples.

[0017]

An embodiment of the present invention will be described with reference to FIGS. 1 to 4 and FIG. The configuration of the semiconductor test apparatus is the same as that of the prior art shown in FIG. As shown in FIG. 1A, the first circuit example of the performance board of the present invention has four ON / OFF circuits on the performance board 41.
A relay 81 that can be turned off is provided. The drive coil of the relay is connected between the peripheral circuit power supply of 5 V and GND, and +15 V, −15 V, −5.2 V, and +5 V of each power supply are respectively connected to the ON / OFF circuit of the relay 81. It is connected.

FIG. 2 shows a performance board 41.
The external view in which the relay 81 was provided on the B side of FIG. The wiring in this case is not shown in the figure, but is performed on the A side of the performance board 41. In addition, performance board 4
The pattern and the like on the side A of 1 are the same as those shown in FIG.

Next, as shown in FIG. 1B, a second circuit example of the performance board according to the present invention is a case where a plurality of power supplies for peripheral circuits are supplied by a plurality of relays. On the top, relays 82 and 83 capable of turning on / off each of the two circuits are provided, and a drive coil of each relay is connected between a peripheral circuit power supply of 5 V and GND, and +15 V, -15 V, -5. 2V and + 5V are connected to ON / OFF circuits of relays 82 and 83, respectively.

Since the second circuit example is the same as the first circuit example, the relay 82,
The illustration of the external view and the pattern and the like provided with 83 are omitted. The type of relay depends on the number of power supplies supplied to peripheral circuits,
The relay can be selectively used depending on the number of circuits that can be turned ON / OFF.

FIG. 3 is an external view of a test head of a semiconductor test apparatus according to the present invention, on which the performance board 41 according to the first circuit example is mounted. As shown in FIG. 3, the main configuration of the test head of the present invention includes a test head main body 31, a motherboard 33, a pin card 32,
Cable 34, contact ring 50, relay 81
And a slide ring 70. That is, the relay circuit board 37 and the switch 90 are omitted from the conventional configuration, and the relay circuit is provided on the performance board 41.

The power supply for the peripheral circuit and the test signal from the semiconductor test apparatus main body 20 are supplied to the motherboard 33 as in the conventional case. Further, the power for the peripheral circuit supplied to the motherboard 33 is directly supplied to the contact ring 50 via the cable 34. The test signal supplied to the motherboard 33 is supplied via the pin card 32, and the power supply for the peripheral circuit is directly supplied to the contact ring 5 via the cable 34.
0 is supplied. Next, the performance board 41 is crimp-locked to the contact ring 50 by the slide ring 70 to supply power for the peripheral circuit to the performance board 41.

Next, when testing a desired device under test, a performance board 41 corresponding to the device under test is mounted on a contact ring 50 and fixed by pressing with a slide ring 70 as in the prior art. Do it. In this case, while the performance board 41 is mounted on the contact ring 50 of the test head and pressed and fixed by the slide ring 70, the order in which the pogo pins 51 and the contact pads 46 come into contact is determined when the performance board 41 is mounted. Although it is uncertain due to the inclination, since there is only one type of power supply for driving the relay 81, the relay 81 is driven when the power supply is turned on. Accordingly, when the relay 81 is driven, a plurality of power supplies of the peripheral circuit are supplied simultaneously, so that the operation of the peripheral circuit does not become unclear.

In this embodiment, the voltage applied to the drive coil of the relay is a +5 V power supply for peripheral circuits. However, the same can be realized by using another power supply voltage.
In addition, as a power supply for peripheral circuits, + 15V, -15V,
Although −5.2 V and +5 V are used, other power supply voltages may be used. Furthermore, using the signal voltage of the semiconductor test equipment,
A circuit configuration for controlling ON / OFF of the relay by a program may be adopted.

[0025]

The present invention is embodied in the form described above and has the following effects. That is,
Since the relay of the ON / OFF means of the power supply for the peripheral circuit is provided on the performance board, it is not necessary to turn the switch ON / OFF every time the performance board is replaced. Further, there is an effect that a test head of a semiconductor test apparatus and a performance board capable of simultaneously supplying a plurality of power supplies for a peripheral circuit to a performance board with a simple configuration in which the number of parts is reduced and the performance board can be realized at low cost.

[Brief description of the drawings]

FIG. 1A is a first circuit diagram of a power supply for a peripheral circuit of a performance board according to the present invention. FIG. 3B is a second circuit diagram of the power supply for peripheral circuits of the performance board of the present invention.

FIG. 2 is an external view of a first circuit diagram of the performance board of the present invention.

FIG. 3 is a diagram showing a main configuration of a test head according to the present invention.

FIG. 4 is a configuration diagram of a semiconductor test apparatus.

FIG. 5 is a diagram showing a main configuration of a conventional test head.

FIG. 6 is a partial configuration diagram of a conventional test head.

FIG. 7 is a circuit diagram of a conventional power supply for a peripheral circuit of a test head.

FIG. 8A is an external view of a performance board on a contact ring side. FIG. 3B is an external view of the performance board on the component mounting side.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 Workstation 20 Semiconductor test apparatus main body 30 Test head 31 Test head main body 33 Motherboard 34 Cable 35 Coaxial cable 36 Board socket 37 Relay circuit board 38 Ground pattern 40,41,42 Performance board 43 Land for IC socket 44 Peripheral circuit mounting area 45 Slide ring hole 46 Contact pad 50 Contact ring 51 Pogo pin 61 IC socket 70 Slide ring 80, 81, 82, 83, 84, 85, 86, 87 Relay 90 Switch

Claims (3)

[Claims] 1. A test head of a semiconductor test apparatus for supplying a plurality of power supplies for peripheral circuits of a device under test to a performance board, wherein when the performance board is mounted on the test head, the plurality of power supplies are simultaneously turned on. A test head for a semiconductor test apparatus, wherein a relay to be supplied is provided on the performance board. 2. A relay operated by a program,
2. The test head according to claim 1, wherein a plurality of power supplies for peripheral circuits can be supplied simultaneously. 3. A performance board for a test head of a semiconductor test apparatus, wherein a relay is operated by a power supply for a peripheral circuit to supply a plurality of power supplies for the peripheral circuit at the same time.