JPH10144088A - Write-in method for electrically erasable programmable rom - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a writing method by which program data can be written in many ROMs simultaneously without affecting it with trouble by using a ROM writer even when a flash ROM is mounted on a printed circuit board having a power source generation section. SOLUTION: This device is provided with an I/F 21 which can make a CPU a sleeve state externally and can controls a ROM externally, and a connection means 2 connecting this I/F 21 and a ROM writer 3 through a buffer 23 which can set them to a high impedance state. And the I/F 21 and the ROM writer 3 are connected through the connection means 2 in a state in which a ROM is mounted on the printed circuit board 1, the CPU is made a sleeve state, while the buffer 23 is set to a high impedance until the ROM writer 3 is made an operation state, and program data is written in the ROM mounted on the printed circuit board from the ROM writer 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for writing an electrically rewritable ROM (Read Only Memory), and more particularly, to a method of mounting a device such as a CPU on a printed circuit board such as a facsimile control board together with a device such as a CPU which can be a bus master. The present invention relates to a method for writing program data to the ROM.

[0002]

2. Description of the Related Art Conventionally, written data can be erased using ultraviolet rays or the like and re-programmed (written).
PROM (Erasable Programmable)
e ROM) It is common to write a single item using a ROM writer.

Recently, a flash EEP of a batch erase type has been proposed.
ROM (Electric Erasable Pro)
grammable ROM; hereinafter simply flash R
OM), because of its structure, a large capacity can be realized at low cost, so that it is widely used, and a ROM writer for writing a single flash ROM has come to correspond to this.

[0004] In addition, flash ROMs in flat packages have also been increasing for surface mounting, which can reduce the size of products.
A conversion board (socket) from an in-line package to a flat package is also supplied.

[0005] As described above, conventionally, the writing of a single ROM was mainly performed. And the ROM that has finished writing
Was mounted on a printed circuit board by soldering.

As a method of writing program data to a flash ROM or the like after being mounted on a printed circuit board, Japanese Patent Application Laid-Open Nos. 6-60682 and 6-23
As described in JP-A-3023 and JP-A-7-13753, there is a method of writing with a device that can be a bus master such as a CPU mounted on a printed circuit board.

[0007]

As described above, when a flash ROM or the like is written as a single item using a ROM writer, a flat packaged one is particularly suitable for a DIP / flat package conversion board ( When writing to the conversion board (socket), writing errors may occur due to poor contact with the conversion board (socket), or leads may be bent when removing from the conversion board (socket) after writing is completed. was there. Since the distance between the leads of the flat package is considerably smaller than that of the DIP, the bent R
When the OM is mounted (soldered) on a printed circuit board, problems such as poor soldering may occur.

After mounting, the CP on the printed circuit board is
When writing (downloading) using U, a program for performing this operation must be stored in another memory in advance. Also, the CP on the printed circuit board
Since it is performed using U, only one image can be written at a time.

A method of writing data from a ROM writer to a rewritable ROM such as a flash ROM mounted on a printed circuit board by using a simple connection means can be considered. It can only be written on a printed circuit board that does not have a power supply to it or that can be cut off. That is, some printed circuit boards generate power supply to the flash ROM on the printed circuit board, so that some cannot supply power to the externally rewritable ROM, and the ROM writer does not operate. Since the configuration does not take into account that the power supply voltage is sometimes applied through the ROM socket, the internal circuit may be broken if the power supply voltage is applied through the ROM socket.

Therefore, the present invention has been made to solve such a problem, and has an electric rewritable ROM having a power generation unit by using a buffer which can be set to a high impedance state. Even when mounted (soldered) on a printed circuit board or after the printed circuit board has been incorporated into an apparatus, it is possible to write program data to many ROMs at once without using a ROM writer by using a ROM writer. It is an object of the present invention to provide a writing method that can perform the writing.

It is another object of the present invention to prevent the buffer IC from being destroyed even when a general-purpose buffer IC such as 74 series is used as a buffer that can be set to a high impedance state.

In many cases, a ROM writer only has a drive capability for a control signal or the like for a single ROM.
Writer and printed circuit board (device with printed circuit board mounted)
It is an object of the present invention to be able to cope with a case where the drive load is large due to an increase in the distance from the drive.

It is another object of the present invention to enable writing even when the power supply capability of a printed circuit board is not sufficient to supply a buffer.

[0014]

In order to achieve the above object, the invention according to claim 1 of the present application provides a device which can be a bus master and an electrically rewritable ROM.
A printed circuit board on which a bus master device can be externally put into a sleep state, and the electrically rewritable ROM can be externally controlled, and the interface unit and a ROM writer are provided. A connection means for connecting the ROM socket to a ROM socket of a high impedance state via a buffer which can be set to a high impedance state. Are connected via the connection means, and the device which can be the bus master is put into a sleep state, and the buffer is set to a high impedance state until the ROM writer is put into an operation state, and is mounted on a printed circuit board. Electrically rewritable It is obtained so as to write the program data from the ROM writer such ROM.

According to a second aspect of the present invention, in the method for writing an electrically rewritable ROM according to the first aspect, the operating power supply of the buffer is supplied from a printed circuit board side, and Power supply RO
It is designed to be loaded before the M writer side.

According to a third aspect of the present invention, in the electrically rewritable ROM writing method according to the first aspect, the buffer is provided between the printed circuit board and the RO.
It is characterized by comprising two buffers on the M writer side.

According to a fourth aspect of the present invention, in the method for electrically writing in the electrically rewritable ROM according to the third aspect, an operating power supply for the two buffers is supplied from a printed circuit board side, and The power supply on the side is turned on before the ROM writer side.

According to a fifth aspect of the present invention, in the method for writing an electrically rewritable ROM according to any one of the first to third aspects, the operating power of the buffer is changed to a printed circuit board or a ROM. In addition to being supplied from a separate power source other than the writer, the separate power source is supplied before the printed circuit board and the ROM writer.

According to a sixth aspect of the present invention, in the electrically rewritable ROM writing method according to the third aspect, the operating power supplies of the two buffers are individually supplied from a printed circuit board and a ROM writer. It is intended to be supplied.

[0020]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
An embodiment of the present invention will be described in detail.

As shown in FIG. 1, the system configuration in the embodiment of the present invention includes a printed circuit board 1 such as a facsimile control board, a connection means 2 having a pin assignment conversion function and a buffer which can be set to a high impedance, and ROM writer 3 having a plurality of ROM sockets
And consists of The connection means 2 is constituted by a board or a cable according to a use form, and the one constituted by the board corresponds only to the printed circuit board 1 not incorporated in the device, while the one constituted by the cable is incorporated in the device. The printed board 1 can also be connected to the ROM writer 3. Then, the flash ROM mounted on the printed circuit board 1 from the ROM writer 3 via the connection means 2
Is to write the program data to the.

As shown in FIG. 2, the configuration of the printed circuit board 1 according to the present invention comprises a CPU serving as a bus master.
11, a flash ROM 12, and the flash RO
Flash ROM control interface unit (I / F) 1 that can control M12 from outside
And a power generation unit 14 for supplying power to the CPU 11 and the flash ROM 12. A power supply line from the power generation unit 14, control signals such as an address bus and a data bus, a read / write signal, and a sleep signal for putting the CPU 11 into a sleep state (stop state) are provided on the printed circuit board therebetween. And the like, and one end thereof is connected to the flash ROM control I / F 13. During normal operation, the flash ROM 12 is controlled by the CPU 11,
When writing program data to the CPU 12, the CPU 11 is put into a sleep state from the flash ROM control I / F 13, and the flash ROM 12 is externally controlled.

FIG. 3 shows a configuration of one embodiment of the connection means 2. The flash ROM control I / F 21 connectable to the flash ROM control I / F 13 of the printed circuit board 1 and the ROM writer 3 R
A ROM writer I / F22 connectable to an OM socket;
And a buffer unit 23 interposed therebetween. Address buses, data buses, and control signals can be connected to the printed board 1 from the ROM writer 3 via the ROM writer I / F 22, the buffer unit 23, and the flash ROM control I / F 21. The sleep signal is fixed (GND level in the figure) so that the CPU 11 enters the sleep state by connecting the connector of the flash ROM control I / F 21 to the printed circuit board 1.

The power supply to the buffer unit 23 is supplied from the power supply generation unit 14 on the printed circuit board 1 via the flash ROM control I / F 21. further,
The power line from the ROM socket of the ROM writer 3 is R
The data is supplied as a control signal to the buffer unit 23 via the OM writer I / F 22.

As shown in FIG. 4, the buffer unit 23 includes a general-purpose buffer I such as a 74 series buffer (244, 245, etc.) which can be set to a high impedance state.
C is used. Reference numeral 231 in FIG. 4A denotes a 74 series (such as 244) unidirectional three-state bus buffer.
It is used for an address bus and a control signal, and its control terminal G is connected to the above-mentioned power supply line from the ROM writer 3 via an inverter 233. Therefore, when the ROM writer 3 is not in the operating state, the control terminal G is set to the H level.
Level and output terminal Y is high impedance (Z)
Becomes When the ROM writer 3 is activated, the control terminal G goes low, and the value input to the terminal A is output from the terminal Y. Since the terminal A is an input terminal, the terminal A is always in a high impedance state from the ROM writer 3.

On the other hand, reference numeral 232 in FIG. 4B denotes a 74 series (245 or the like) bidirectional three-state bus buffer which is used for a data bus and whose control terminal G is described above via an inverter 233. A power supply line from the ROM writer 3 is connected, and a ROM is connected to the direction selection terminal DIR.
The read / write signal among the control signals from the writer 3 is connected. Therefore, when the ROM writer 3 is not in the operating state, the control terminal G is at the H level, and the terminals A and B are both at high impedance (Z). Also, R
When the OM writer 3 is in the operating state, the control terminal G is at the L level, and when the direction selection terminal DIR is at the L level, the value input to the terminal B is output from the terminal A and the terminal DIR is at the H level. In the case of the level, the value input to the terminal A is output from the terminal B. Also in this case, when the ROM writer 3 side becomes an input terminal, the ROM writer 3 is in a high impedance state.

That is, when the ROM writer 3 is not operating, the ROM writer I / F 22 (and the flash ROM control I / F 21) is in a high impedance state. Even in the connected state, it is electrically disconnected. Then, when the ROM writer 3 is in the operating state, the address bus, the data bus, and the control signal are oriented as shown in FIG. Therefore, even if the power supply on the printed circuit board 1 side is turned on while the ROM writer 3 is not operating,
Since the ROM writer 3 is electrically disconnected, no power supply voltage is applied through the ROM socket, and there is no possibility that the internal circuit of the ROM writer 3 is broken.

Now, in the above configuration, the flash R
Writing of program data to the OM 12 is performed as follows.

First, a connector is connected between the flash ROM control I / F 13 of the printed circuit board 1 on which the flash ROM 12 is mounted by soldering and the flash ROM control I / F 21 of the connection means 2. As a result, a sleep signal fixed to the GND level (Low level) is applied to the CPU 11, and the CPU 11 is in a sleep state (stop state) even when the power supply of the printed circuit board 1 is turned on, and the flash ROM 12 is electrically operated by the CPU 11 Will be cut off and can be freely controlled from outside.

Next, the ROM writer I / F 2 of the connection means 2
2 is inserted into the ROM socket of the ROM writer 3. Since the ROM writer 3 is usually provided with a large number of ROM sockets (for example, a total of 16 sockets in two rows of 8), a plurality of the printed circuit boards 1 to which the connecting means 2 are attached as described above are mounted on the ROM writer 3. Can be set. Even if the connecting means 2 is formed of a board, the printed circuit board 1 on which the connecting means 2 is attached as described above can be set on the ROM writer 3 in a state where a plurality of printed boards 1 are arranged side by side. If the power supply of the printed circuit board 1 has not been turned on, the power supply of the printed circuit board 1 is first turned on, and then the power supply of the ROM writer 3 is turned on to be in an operation state.

Then, as described above, the printed circuit board 1
Is controlled as shown in the flowchart of FIG.
2 is written. In addition,
This processing is performed by the flash R mounted on the printed circuit board 1.
The same applies to the case where the OM 12 is written and the case where the flash ROM alone inserted into the ROM socket is written.

That is, first, it is checked whether or not there is a flash ROM to be written (decision 101). If there is a flash ROM to be written, a write mode is entered to enable a control signal such as a write signal (process 102), and a write address and program data are output to an address bus and a data bus (process 103). Then, it waits until the write operation time elapses (decision 10).
4 N loops). When a predetermined write operation time has elapsed (Y in decision 104), a write check mode is entered to enable a read signal of a control signal and the like (step 10).
5) Read the write data from the flash ROM (process 106). Then, the read data and the written data are compared to check whether or not the data has been correctly written (decision 107). If the data has not been correctly written, the process returns to the process 102 to repeat the write process. On the other hand, if the data has been correctly written, the flow returns to the first judgment 101 to check whether there is a flash ROM to be written or not, and the above processing is performed until the writing of all the ROMs set in the ROM writer 3 is completed. repeat.

According to the above, the program data can be written into the flash ROM 12 mounted on the printed circuit board 1 having the power generation unit 14 by the ROM writer 3. It is possible to write program data to many flash ROMs 12 at once without causing a problem such as destruction. Note that 74 used in the buffer unit 23 is used.
When a voltage such as +5 V is applied to a signal terminal of a general-purpose buffer IC such as a series in a state where the operating power is not supplied, the buffer IC may be broken. But,
As in the present embodiment, the printed circuit board 1 is
By supplying power from the power supply side and turning on the power supply on the printed circuit board 1 side before the ROM writer 3 side, such a problem that the buffer IC is destroyed as described above is also eliminated.

FIG. 6 shows another embodiment of the buffer unit 23. The buffer unit 23 of the present embodiment comprises:
A flash ROM control I / F-side buffer 23a provided near or built in to the connector of the flash ROM control I / F 21, and a ROM writer I / F 2
And two ROM writer I / F-side buffers 23b provided near or built into the two connectors,
They are connected by an appropriate length of cable.

Then, the flash ROM control I
For each of the / F side buffer 23a and the ROM writer I / F side buffer 23b, a 74 series buffer as shown in FIG.
Power is supplied to the buffers 23a and 23b from the printed circuit board 1 side. The power supply line on the ROM writer 3 side is connected to the control terminal G of each of the buffer ICs 231 and 232 shown in FIG.
3 are connected. This allows RO
When the M writer 3 is not operating, the ROM writer I / F 22 is in a high impedance state,
When the M writer 3 enters the operating state, the address bus, the data bus, and the control signal are oriented as shown in FIG.

The write operation in the above configuration is the same as in the above embodiment, and the same operation and effect can be obtained. Further, as described above, since the ROM writer 3 often has only the drive capability of a control signal or the like for a single ROM, the R
If the distance between the OM writer 3 and the printed circuit board 1 (the device on which the printed circuit board 1 is mounted) is large and the drive load is large, it is not possible to cope with the problem. 3, writing can be performed over a considerable distance, depending on the capacity of the buffer.
Can be dealt with by cable connection.

FIG. 7 shows the respective buffers 23a, 23a,
This is an embodiment in which an operating power supply is supplied from an external power supply 31 to an external power supply 23b. In this case, each buffer IC 23 of the flash ROM control I / F side buffer 23a
A power line from the printed circuit board 1 side is connected to the control terminals G of 1 and 232 via an inverter 233.
Each buffer IC of the ROM writer I / F side buffer 23b
A power line from the ROM writer 3 side is connected to the control terminals G of 231 and 232 via an inverter 233. Therefore, the flash ROM control I / F buffer 23a is in a high impedance state when the power of the printed circuit board 1 is not turned on, and when the power of the printed circuit board 1 is turned on, the address bus, the data bus, The control signal is oriented as shown in FIG. The ROM writer I / F side buffer 23b
Is RO when the ROM writer 3 is not operating.
The M writer 3 enters the high impedance state, and the ROM
When the writer 3 is in the operating state, the address bus, the data bus, and the control signal are oriented as shown in FIG.

The writing operation in the above configuration is almost the same as in the above embodiment, and the same operation and effect can be obtained.
Further, since power is supplied to the buffers 23a and 23b from an external power supply 31 which is a separate power supply from the printed circuit board 1 and the ROM writer 3, the power supply capability of the printed circuit board 1 and the ROM writer 3 is applied to the buffers 23a and 23b. Writing is possible even if it is not enough to supply.

In this case, when the external power supply 31 is turned on before the printed circuit board 1 and the ROM writer 3 side, the buffer I used for each of the buffers 23a and 23b is turned on.
There is no fear of destruction of C231 and C232. Further, as described above, when the ROM writer 3 is not in the operating state, the ROM writer 3 is in a high impedance state and is in an electrically disconnected state. The internal circuit of the writer 3 is not destroyed, and when the power is not supplied to the printed circuit board 1, the printed circuit board 1 side of the flash ROM control I / F buffer 23a becomes high impedance and is electrically disconnected. In this state, even if the external power supply 31 is turned on first, the internal circuit of the printed circuit board 1 will not be destroyed.

FIG. 8 shows that the flash ROM control I / F buffer 23a is supplied with operating power from the printed circuit board 1 side, and the ROM writer I / F buffer 23b
Is an embodiment in which operating power is supplied from the ROM writer 3 side. In this case, each buffer IC 23 of the flash ROM control I / F side buffer 23a
A power line from the ROM writer 3 side is connected to the control terminals G of 1 and 232 via an inverter 233.
Each buffer IC of the ROM writer I / F side buffer 23b
Power supply lines from the printed circuit board 1 side are connected to control terminals G of 231 and 232 via an inverter 233. Therefore, the flash ROM control I / F side buffer 23a is configured such that when the ROM writer 3 is not in operation, the ROM writer 3 is in a high impedance state, and when the ROM writer 3 is in operation, the address bus, data, The bus and control signals are oriented as shown in FIG. The ROM writer I / F side buffer 23b
When the power of the printed circuit board 1 is not turned on, the side of the printed circuit board 1 is in a high impedance state, and when the power of the printed circuit board 1 is turned on, the address bus, the data bus, and the control signal are oriented in the directions shown in FIG. Become.

The write operation in the above configuration is almost the same as in the above embodiment, and the same operation and effect can be obtained.
Furthermore, if the printed circuit board 1 and the ROM writer 3 can supply power to the buffers 23a and 23b on the respective sides, the external power supply 31 as in the above embodiment is not required as a separate power supply.

In this case, the printed circuit board 1 and the ROM
Until both power supplies of the writer 3 are turned on, one of the buffers 23a or 23b becomes a high impedance state and the two buffers 23a and 23b are electrically disconnected from each other. Even if R
There is no danger of the OM writer 3 and the internal circuit of the printed circuit board 1 being destroyed, and there is no danger of the buffer ICs 231 and 232 used for the buffers 23a and 23b being destroyed.

Further, up to here, the printed circuit board 1 having the power generation unit 14 as shown in FIG. 2 has been described, but as shown in FIG. May be connected. In this case, as shown in FIG. 10, the system configuration may be not only a single printed circuit board 1 but also a plurality of connected printed circuit boards 1 or the entire apparatus. Absent.

In this way, it is possible to write to the flash ROM 12 mounted on a plurality of printed circuit boards 1 connected so as to have a power generation unit, and to write to the flash ROM 12 mounted on the device.

In each of the above embodiments, each invention of the present application is referred to as a collectively erase type electrically rewritable RO.
Although the case where the present invention is applied to a flash ROM of M has been described, any electrically rewritable ROM can be applied not only to the batch erase type but also to a normal EEPROM.

Further, each invention of the present application is applicable not only to a facsimile control board as a printed circuit board, but also to various control boards equipped with a device that can be a bus master. In addition, as a device that can be a bus master, there is a DMA controller in addition to the CPU.

[0047]

As described above, according to the first aspect of the present invention, a device that can be a bus master and a device that can be a bus master can be externally mounted on a printed circuit board on which an electrically rewritable ROM is mounted. A sleep state, and an interface that can externally control the electrically rewritable ROM, and a buffer that can set the interface and the ROM socket of the ROM writer to a high impedance state. The interface unit and the ROM of the ROM writer in a state in which the printed circuit board has an electrically rewritable ROM,
A socket is connected via the connection means, the device which can be the bus master is put into a sleep state, and the buffer is set in a high impedance state until the ROM writer is put into an operation state, and mounted on a printed circuit board. Since the program data is written from the ROM writer to the electrically rewritable ROM, the electrically rewritable ROM is mounted (soldered) on a printed circuit board having a power generation unit, Even after the board is assembled in the equipment, RO
There is an effect that program data can be written to many ROMs at once without causing any trouble to the ROM writer by using the M writer.

According to a second aspect of the present invention, in the electrically rewritable ROM writing method according to the first aspect, the operating power of the buffer is supplied from the printed circuit board side, and Is turned on earlier than the ROM writer side, so that in addition to the effect of claim 1, a general-purpose buffer IC is used as a buffer that can be set to a high impedance state.
Even if a series or the like is used, the buffer IC will not be destroyed.

According to a third aspect of the present invention, in the electrically rewritable ROM writing method according to the first aspect, the buffer includes two buffers on a printed circuit board side and a ROM writer side. Thus, in addition to the effect of claim 1, the ROM writer can
When there is only drive capability such as control signal to M single item,
Even if the distance between the ROM writer and the printed circuit board (the device on which the printed circuit board is mounted) is increased, and the drive load is large, it is possible to cope with the case.

According to a fourth aspect of the present invention, in the electrically rewritable ROM writing method according to the third aspect, the operating power of the two buffers is supplied from a printed circuit board side and the printing power is supplied to the two buffers. Since the power supply on the substrate side is turned on before the ROM writer side, in addition to the effect of the third aspect, a general-purpose buffer IC such as 74 series is used as a buffer that can be set to a high impedance state. Also, the buffer IC is not destroyed.

According to a fifth aspect of the present invention, in the electrically rewritable ROM writing method according to the first or third aspect, the operation power of the buffer is set to a power supply other than a printed circuit board and a ROM writer. And a separate power supply, this printed circuit board and ROM
Since the power is supplied before the writer side, in addition to the effects of the first or third aspect, writing becomes possible even when the power supply capability of the printed circuit board is not sufficient to supply the power to the buffer.

According to a sixth aspect of the present invention, in the electrically rewritable ROM writing method according to the third aspect, the operating power supplies of the two buffers are individually set from a printed circuit board and a ROM writer. In addition to the effect of the third aspect, the ROM
If the writer and the printed circuit board can supply power to the buffers on each side, no separate power supply is required.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a system configuration according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of the printed circuit board in FIG. 1 according to the present invention.

FIG. 3 is a block diagram showing a configuration of an embodiment of a connection unit in FIG. 1;

FIG. 4 is a diagram showing a general-purpose buffer IC used in the buffer unit of FIG. 3;

FIG. 5 is a flowchart showing a flash ROM writing process in the ROM writer.

FIG. 6 is a block diagram showing another embodiment of the buffer unit.

FIG. 7 is a block diagram showing another embodiment of the buffer unit.

FIG. 8 is a block diagram showing another embodiment of the buffer unit.

FIG. 9 is a block diagram illustrating a configuration in which a power generation unit is connected to a printed circuit board that does not have a power generation unit.

FIG. 10 is a block diagram showing a system configuration in the case of FIG. 9;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Printed circuit board 2 Connection means 3 ROM writer 11 CPU 12 Flash ROM 13, 21 Flash ROM control I / F 14, 41 Power supply generation part 22 ROM writer I / F 23 Buffer part 23a Flash ROM control I / F side buffer 23b ROM writer I / F buffer 31 External power supply

Claims (6)

[Claims] 1. A device which can be a bus master and an electrically rewritable ROM mounted on a printed circuit board. The device which can be a bus master can be put into a sleep state from the outside and the electrically rewritable ROM can be externally put on the printed circuit board. And a connection unit for connecting the interface unit and the ROM socket of the ROM writer via a buffer that can be set to a high impedance state, and electrically connected to the printed circuit board. While the rewritable ROM is mounted, the interface unit and the ROM socket of the ROM writer are connected via the connection unit, and the device which can be the bus master is put into a sleep state, and the ROM writer is operated until the ROM writer is put into an operation state. High-impedance buffer So as to set the dance state,
Electrically rewritable RO mounted on printed circuit board
An electrically rewritable ROM writing method, wherein program data is written to M from a ROM writer. 2. An operating power supply for the buffer is supplied from a printed circuit board side, and a power supply on the printed circuit board side is
2. The method according to claim 1, wherein the writing is performed earlier than the M writer side. 3. The buffer according to claim 1, wherein said buffer is provided between
2. The method according to claim 1, further comprising two buffers on the M writer side. 4. The electrical device according to claim 3, wherein the power supply for operating the two buffers is supplied from the printed circuit board side, and the power supply on the printed circuit board side is turned on before the ROM writer side. Rewritable ROM
Writing method. 5. An operation power supply for the buffer is supplied from another power supply other than a printed circuit board and a ROM writer,
4. The electrically rewritable ROM according to claim 1, wherein the separate power supply is turned on before the printed circuit board and the ROM writer.
Writing method. 6. The electrically rewritable ROM writing method according to claim 3, wherein operating power for said two buffers is individually supplied from a printed circuit board and a ROM writer.