JPH10136397A - Amplifier circuit for convergence correction circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the superimposing of the switching noise of a switching circuit by attaining the state of connecting loads to power sources on a positive side and on a negative side at all times when first and second switching circuit are turned on in a fly-back period. SOLUTION: In the fly-back period, a first blanking pulse BLK1 is inputted to the case of a second switching transistor(TR) Q12 for constituting a positive side power source switching circuit 12, the TR Q12 is turned on, thus a first switching TR Q11 is also turned on and a high voltage +VccH is supplied to the positive side of an amplifier 11. Also in a negative side power source switching circuit 13, a second blanking pulse BLK2 is similarly inputted to the base of a forth switching TR Q14, the TRs Q14 and Q13 are turned on and the high voltage -VccH is supplied also to the negative side of the amplifier 1. Thus, the switching noise of the switching TRs Q13 and Q14 is not superimposed at the moment of generating crossover distortion inevitable to the operation of a class B amplifier.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an improvement in an amplifier circuit used in a convergence correction circuit used in a CRT type projection television or the like.

[0002]

2. Description of the Related Art A conventional amplification circuit for a deflection circuit will be described below. This circuit is a circuit used for a convergence correction circuit such as a CRT type projection television, which amplifies a deflection signal and outputs the amplified signal to a deflection coil L, and deflects electrons irradiated on a CRT to correct convergence. is there. For the sake of simplicity, it is assumed that the deflection signal Vin has a sawtooth signal waveform as shown in FIG.

As shown in FIG. 3, a deflection signal Vin is input to the positive input + of the amplifier 1, amplified by the amplifier 1 and output to the deflection coil L, thereby generating a magnetic field and irradiating the cathode ray tube. The electrons are deflected. The current flowing through the deflection coil L is converted to a resistance R after voltage conversion.
The operation is stabilized by being fed back to the negative input of the amplifier 1 via a feedback circuit having the circuit 50.

The amplifier 1 uses a class B amplifier which has a simple structure and is easy to handle. The power of the amplifier 1 is supplied from the negative side and the positive side. The state of signal processing by this amplifier, that is, deflection signal Vin, and its current waveform I
FIG. 4 shows the relationship between the in, the waveform of the output voltage Vo, and the power supply voltages + Vcc and -Vcc supplied to the amplifier 1. Output voltage Vo
As shown in FIG. 4, a flyback pulse of a high voltage is generated in the flyback period. A higher voltage may be always supplied as the power supply voltage of the amplifier 1. However, in this case, a loss of power consumption with respect to output power is large in a scanning period in which a low voltage is output, and the efficiency of the amplifier is reduced. High efficiency is achieved by using two types of power supply voltages for the flyback period.

That is, as shown in FIG. 3, a low-voltage power supply voltage + VccL and a high-voltage power supply voltage + VccH are prepared in advance.
The output voltage Vo is detected and these two types of power supply voltage + Vcc
A positive power supply switching circuit 2 and a negative power supply switching circuit 3 for selecting one of L and + VccH are provided. The details of the operation will be described below. Two types of power supply voltage ± Vcc
Switching between L and ± VccH uses first and second blanking pulses BLK1 and BLK2, which are pulses used for temporarily stopping the screen display during the flyback period. The first blanking pulse BLK1 is “H” during the scanning period,
The second blanking pulse BLK2, which is a pulse that becomes “L” during the retrace period, is the first blanking pulse BLK.
This is a pulse obtained by inverting K1.

In the flyback period, the first blanking pulse BLK1 is input to the base of the switching transistor Q2 constituting the power supply switching circuit 2 on the positive side, and the switching transistor Q2 is turned on, whereby the switching transistor Q1 is also turned on. . As a result, the high voltage + VccH is supplied to the positive side of the amplifier 1. Similarly, in the negative power supply switching circuit 3, the second blanking pulse BLK2 is input to the base of the switching transistor Q4, and Q4 and Q3 are turned on to supply the high voltage -VccH to the negative side of the amplifier 1. Is done.

In the scanning period, the blanking pulse BLK1 is switched to "H", so that the switching transistor Q2 is turned off in the positive power supply switching circuit 2.
As a result, Q1 is also turned off, so that the low voltage + VccL is supplied to the positive side of the amplifier 1 via the diode D1. Similarly, on the negative side of the amplifier, the negative side power supply switching circuit 3
Selects the low voltage -VccL, and the low voltage-
VccL is supplied.

By using the power supply switching circuits 2 and 3 as described above,
As shown in FIG. 4, a high voltage + VccH is supplied as a power supply voltage to the amplifier 1 during a flyback period in which a flyback pulse is generated, and a low voltage + VccL is supplied to the amplifier 1 during a scanning period. , The power consumption loss is reduced, and the efficiency is improved as compared with the case where a constant voltage is used as the power supply voltage.

[0009]

However, in the above circuit, a class B amplifier is used as the amplifier 1.
In this case, while the current is being supplied from the positive power supply side to the output stage of the amplifier 1, the negative power supply side is in a completely no-load state, and during this time, the switching transistors Q3 and Q4 of the negative power supply switching circuit 3 are in the non-load state. If the blanking pulse BLK2 is turned on once at the rising edge of the second blanking pulse BLK2, the ON state is maintained even after the pulse BLK2 falls. This is presumably because the charge injected into the bases of the switching transistors Q3 and Q4 cannot be released under no load.

Therefore, as shown in FIG. 4, even after the second blanking pulse BLK2 falls, the high voltage -VccH is still selected because the switching transistors Q3 and Q4 are ON. Then amplifier 1
At the moment when the output signal is switched from the positive side to the negative side, the load is also connected to the negative side, so that the injected charges at the bases of the switching transistors Q3 and Q4 are released, and these are rapidly turned off.

At this time, as shown in FIG. 4, unavoidable crossover distortion occurs almost simultaneously with the operation of the class B amplifier. Therefore, this crossover distortion and the switching of the switching transistors Q3 and Q4 when switching to the negative power supply are performed. Noise has been superimposed, resulting in a very large distortion appearing in the output voltage Vo, which has a problem of adversely affecting the convergence characteristics and even the screen display.

[0012]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks. As shown in FIG. 1, a signal amplifier comprising a class B amplifier for amplifying a deflection signal, Supplying the first voltage to the unit as a positive power supply voltage
And a second voltage higher than the first voltage;
A second path provided between the first path and a second path, the second path being provided in the second path, and when turned off, the first voltage is supplied to the signal amplification section as a positive power supply voltage;
A first switching circuit for supplying the second voltage as a positive power supply voltage of the signal amplifying unit when turned on;
A third path for supplying a third voltage to the signal amplifying unit as a negative power supply voltage, and a fourth path that is higher than the third voltage.
And a fourth path provided between the third path and the third path, and the third voltage is provided to the fourth path as a negative power supply voltage to the signal amplifying unit when turned off. And a second switching circuit for supplying the fourth voltage as a negative power supply voltage of the signal amplifying unit when turned on, a first load provided on the first path,
According to another aspect of the present invention, there is provided an amplifier circuit for a convergence correction circuit having a second load provided in the third path.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an amplifier circuit for a deflection circuit according to an embodiment of the present invention will be described with reference to the drawings. This amplification circuit is a circuit used for a convergence correction circuit of a projection television, and is a circuit that amplifies a deflection signal, outputs the amplified signal to a deflection coil, and deflects electrons irradiated on a CRT in a vertical direction.

This circuit, as shown in FIG.
1. A circuit including a positive power supply switching circuit 12, a negative power supply switching circuit 13, resistors R11 and R12, and capacitors C11 and C12, and amplifies a deflection signal Vin as an input signal and outputs the amplified signal to a deflection coil L as a load. It is. As shown in FIG. 1, the deflection signal Vin is input to the positive input + of the amplifier 11, amplified by the amplifier 11, and output to the deflection coil L, thereby generating a magnetic field and deflecting the electrons irradiated on the cathode ray tube. Is done. The current flowing through the deflection coil L is converted into a voltage and then fed back to the negative input of the amplifier 11 via a feedback circuit having a resistor R20, thereby stabilizing the operation.

The amplifier 11 is an example of a signal amplifying unit.
This circuit amplifies the deflection signal Vin and outputs the amplified signal to the deflection coil L. Since the configuration is simple and handling is easy, a class B amplifier is used. The positive power supply switching circuit 12 is an example of a first switching circuit, and includes first and second switching transistors Q11 and Q12. The first switching transistor Q11 has its emitter connected to a high voltage + Vcc.
H and the collector is connected to the positive power supply input of the amplifier 11. Second switching transistor Q12
Has an emitter connected to the base of the switching transistor Q11, a collector connected to the collector of the first switching transistor Q11, and a base serving as an input terminal of a later-described first blanking pulse BLK1.

A collector common to the first and second switching transistors Q11 and Q12 and a low voltage + Vcc
A diode D11 is connected between L and L to form a supply path for supplying the low voltage + VccL to the amplifier 11. This supply path is an example of a first path. Also,
The positive side power supply switching circuit 12 supplies the high voltage + VccH to the amplifier 11
(An example of a second path). Further, the low voltage + VccL is an example of a first voltage, and the high voltage + VccH is an example of a second voltage.

A resistor R11 is connected in parallel with the diode D11.
Is connected to one end of the resistor R11 and the ground potential GND.
Is connected to the capacitor C11. In addition,
The resistor R11 is an example of a first load, and is a capacitor C
11 is an example of a first capacitance element. The negative power supply switching circuit 13 is an example of a second switching circuit.
It comprises fourth switching transistors Q13, Q14. The third switching transistor Q13 has an emitter connected to the high voltage -VccH and a collector connected to the amplifier 11.
Is connected to the negative power supply input. The fourth switching transistor Q14 has an emitter connected to the base of the third switching transistor Q13, a collector connected to the collector of the third switching transistor Q13,
The base is an input terminal for a second blanking pulse BLK2 described later.

A collector common to the third and fourth switching transistors Q13 and Q14 and a low voltage + Vcc
A diode D12 is connected between L and L to form a supply path for supplying the low voltage -VccL to the amplifier 11. This supply path is an example of a third path. Also,
The negative power supply switching circuit 13 supplies the high voltage −VccH to the amplifier 11.
(An example of a fourth route). Further, the low voltage −VccL is an example of the third voltage, and the high voltage −VccH is an example of the fourth voltage.

A resistor R12 is connected in parallel with the diode D12.
Is connected to one end of the resistor R11 and the ground potential GND.
Is connected to the capacitor C12. In addition,
The resistor R12 is an example of a second load, and is a capacitor C1
2 is an example of a second capacitor. Hereinafter, the operation of the amplifier circuit according to the present embodiment will be described. This circuit basically operates in such a manner that two kinds of voltages of a high voltage ± VccH and a low voltage ± VccL are switched between a scanning period and a retrace period to improve the efficiency.

Switching between the two types of voltages ± VccL and ± VccH
First and second blanking pulses BLK1, which are pulses used for temporarily stopping the screen display during the flyback period
BLK2 is used. First blanking pulse BLK1
Is a pulse that is “H” during the scanning period and becomes “L” during the retrace period, and is the second blanking pulse BLK2.
Is a pulse obtained by inverting the first blanking pulse BLK1.

In the flyback period, the first blanking pulse BLK1 is input to the base of the switching transistor Q12 constituting the power supply switching circuit 12 on the positive side, and the switching transistor Q12 is turned on, whereby the switching transistor Q11 is also turned on. . As a result, a high voltage + VccH is supplied to the positive side of the amplifier 11. Similarly, in the negative power supply switching circuit 13, the second blanking pulse BLK2 is also supplied to the switching transistor Q1.
4 and Q14 and Q13 are turned on, and the high voltage -VccH is also supplied to the negative side of the amplifier 1.

At this time, the class B amplifier 11
While the current is being supplied to the output stage of FIG. 1, the negative power supply side has been in a completely no-load state in the past, but in the present embodiment, the resistor R12 is provided in parallel with the diode D12. A small current Im flows through the path shown in FIG. 1, and a light load is connected to the negative side. Thereafter, the blanking pulse BLK1 switches to “H” and shifts to the scanning period.

In the scanning period, the switching transistor Q12 of the positive power supply switching circuit 12 is turned off.
F, thereby turning off Q11.
Is supplied with a low voltage + VccL via a diode D11. Similarly, on the negative side of the amplifier, the negative power supply switching circuit 13 selects the low voltage −VccL, and the low voltage −VccL is supplied to the negative side of the amplifier 11.

At this time, in the conventional circuit, if the switching transistors Q3 and Q4 of the negative power supply switching circuit 3 are turned on once at the rise of the second blanking pulse BLK2, the switching transistor is in a no-load state. The charge injected into the bases of Q3 and Q4 could not be released, and the ON state was maintained even after the pulse BLK2 fell. However, in this embodiment, the state becomes the same as when a light load was connected. Therefore, as shown in FIG. 2, after the second blanking pulse BLK2 falls, the third and fourth switching transistors Q13 and Q13
In 14, the injected charges of these bases are released, and these are quickly turned off in synchronization with the fall of the second blanking pulse BLK 2.

Therefore, as shown in FIG. 2, at the moment when inevitable crossover distortion occurs in the operation of the class B amplifier,
The switching noise of the fourth switching transistors Q13 and Q14 does not overlap. Therefore, when these are superimposed, a very large distortion appears in the output voltage Vo,
It is possible to suppress the problem of adversely affecting the convergence characteristics and even the screen display.

Although the capacitor C2 is connected, the capacitor C2 is charged by -VccH when the third and fourth switching transistors Q13 and Q14 of the negative power supply switching circuit 13 are ON.
At this time, as shown in FIG.
The falling of the switching waveform c can be slowed down. Therefore, the peak level of the switching noise can be reduced.

By providing the resistor R12 and the capacitor C12 in this manner, it is possible to switch the power supply without deteriorating the convergence characteristics. As described above, by using the power supply switching circuits 12 and 13, as shown in FIG.
By supplying the high voltage + VccH to the amplifier 11 during the flyback period in which 1 and BLK2 occur, and supplying the low voltage + VccL to the amplifier 11 during the scanning period, loss of power consumption with respect to output power particularly during the scanning period is reduced. The efficiency is improved as compared with the case where a constant voltage is used as the power supply voltage.

In this embodiment, in order to control ON / OFF of the first to fourth switching transistors Q11 to Q14, the first and second blanking pulses are set to BLK.
1. Although BLK2 is used, the present invention is not limited to this.
The same effect can be obtained by using a pulse whose level switches between the scanning period and the flyback period. Furthermore, in the present embodiment, the case where the above circuit is applied to a convergence correction circuit is described. However, the present invention is not limited to this, and the same effect can be obtained even when applied to another deflection circuit such as a vertical deflection circuit. To play.

[0029]

As described above, the amplifier circuit for a deflection circuit according to the present invention comprises a signal amplifier, first, second, third and fourth paths and first and second switching circuits. And the first load provided on the first path and the second load provided on the third path, so that the first and second switching circuits are ON during the flyback period. When the power supply is in either the positive side or the negative side,
Some load is always connected to the positive and negative power supplies.

For this reason, even if the operation shifts to the scanning period thereafter,
Since the load is always connected to each of the positive and negative power supplies, it is possible to suppress the switching noise of these switching circuits from being superimposed at the moment when inevitable crossover distortion occurs in the operation of the class B amplifier. Is superimposed and appears in the output voltage Vo as a very large distortion,
It is possible to suppress the problem of adversely affecting the convergence characteristics and even the screen display.

In the present invention, the first and second loads are resistors, a first capacitive element connected between one end of the first load and a ground potential, and one end of the second load. A second capacitor connected between the second capacitor and a ground potential. Therefore, the falling waveform of the power supply voltage can be blunted by these time constants. Therefore, the peak level of the switching noise can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an amplifier circuit for a convergence correction circuit according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating an operation of an amplifier circuit for a convergence correction circuit according to the embodiment of the present invention.

FIG. 3 is a circuit diagram of an amplifier circuit for a convergence correction circuit according to a conventional example.

FIG. 4 is a diagram illustrating the operation of a conventional amplifier circuit for a convergence correction circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 Amplifier 12 Positive side power switch circuit (1st switching circuit) 13 Negative side power switch circuit (2nd switching circuit) Q11 1st switching transistor Q12 2nd switching transistor Q13 3rd switching transistor Q14 4th Switching transistor + VccL Low voltage (first voltage) + VccH High voltage (second voltage) -VccL Low voltage (third voltage) -VccH High voltage (fourth voltage) R11 resistance (first load) R12 resistance (Second load) C11 capacitor (first capacitance element) C12 capacitor (second capacitance element) Vin deflection signal Vo output voltage + Vcc positive power supply voltage -Vcc negative power supply voltage L deflection coil

Claims (3)

[Claims] A signal amplifier configured to amplify a deflection signal; a first path for supplying a first voltage to the signal amplifier as a positive power supply voltage; A second path provided between the second path and the first path, and a second path provided between the first path and the second path. A first switching circuit for supplying the second voltage as a positive power supply voltage of the signal amplifying unit, and a third voltage for supplying a negative voltage to the signal amplifying unit. A third path to be supplied as a power supply voltage, a fourth voltage higher than the third voltage, a fourth path provided between the third path, and a fourth path. A third power supply for supplying a negative power to the signal amplifying unit when the signal amplifying unit is turned off; A second switching circuit that supplies the fourth voltage as a negative power supply voltage of the signal amplifying section when supplied as a voltage, and when turned on, a first load provided in the first path; An amplifier circuit for a convergence correction circuit, comprising: a second load provided on a third path. 2. The first switching circuit includes a first switching transistor having an emitter connected to the second voltage and a collector connected to the signal amplifier.
The emitter is connected to the base of the first switching transistor, the collector is connected to the collector of the first switching transistor, and the base is constituted by a second switching transistor which is an input of a signal for controlling power supply voltage switching. The second switching circuit includes a third switching transistor having an emitter connected to the fourth voltage, a collector connected to the signal amplifier, and an emitter connected to a base of the third switching transistor. The collector is connected to the collector of the third switching transistor, and the base is constituted by a fourth switching transistor serving as an input of a signal for controlling power supply voltage switching. The first and second switching transistors are PN
2. The amplifier circuit for a convergence correction circuit according to claim 1, wherein the third and fourth switching transistors are P-type transistors, and are NPN-type transistors. 3. The first and second loads are resistors, and a first load connected between one end of the first load and a ground potential.
And a second capacitor connected between one end of the second load and a ground potential.
3. The amplifier circuit for a convergence correction circuit according to claim 1, further comprising: a capacitive element.