JPH10136272A - Picture input device - Google Patents

Picture input device

Info

Publication number
JPH10136272A
JPH10136272A JP8301294A JP30129496A JPH10136272A JP H10136272 A JPH10136272 A JP H10136272A JP 8301294 A JP8301294 A JP 8301294A JP 30129496 A JP30129496 A JP 30129496A JP H10136272 A JPH10136272 A JP H10136272A
Authority
JP
Japan
Prior art keywords
light
period
emitting
signal
solid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8301294A
Other languages
Japanese (ja)
Inventor
Toshimichi Masaki
俊道 政木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Corp
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corp, Omron Tateisi Electronics Co filed Critical Omron Corp
Priority to JP8301294A priority Critical patent/JPH10136272A/en
Publication of JPH10136272A publication Critical patent/JPH10136272A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To miniaturize a picture input device with a built-in illumination device, which is difficult to be affected by disturbance, even if the semiconductor light-emitting element of a light-emitting diode is used by shutter-controlling a semiconductor light-emitting element and a solid-state image pickup element so that a light-emitting period and a light-receiving period are matched. SOLUTION: The solid-state image pickup element 1 is arranged in a position where an object image passing through a lens 2 is image-formed, and it photoelectrically converts the image and outputs an obtained image pickup signal S1 to a synchronizing signal overlap part 4 through an output buffer 3. A pair of light-emitting diodes 6a and 6b are arranged near both ends of the lens 2. LED 6a and 6b emitted/driven by a light-emitting command signal LS outputted from the control part through an LED driver 7 and they function as illumination devices illuminating the object. For preventing the device from being easily affected by disturbance light, the light-receiving period for accumulating the signal charges in the photosensor Ph of the solid-state image pickup element 1 is matched with the light-emitting period for emitting LED 6a and 6b, and light is received by the photosensor Ph only when LED emits light.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、被写体を照明する
ための照明装置を一体的に備えた画像入力装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image input device integrally provided with an illumination device for illuminating a subject.

【0002】[0002]

【従来の技術】従来の画像入力装置は、照明装置を用い
て被写体を撮像する場合、照明を常時点灯し、被写体の
光学像を固体撮像素子のフォトセンサ上に2次元の画像
として結像させ、光電変換によってフォトセンサに蓄積
した信号電荷を電圧信号に変換し、インターライン転送
方式やフレーム転送方式などによって1次元の電気信号
として外部に取り出すようにしている。
2. Description of the Related Art In a conventional image input apparatus, when an object is imaged using an illumination device, the illumination is always turned on and an optical image of the object is formed as a two-dimensional image on a photosensor of a solid-state image sensor. In addition, a signal charge accumulated in a photosensor is converted into a voltage signal by photoelectric conversion, and is taken out as a one-dimensional electric signal by an interline transfer method or a frame transfer method.

【0003】[0003]

【発明が解決しようとする課題】従来の画像入力装置に
おいて、小型で低コストの照明一体型の画像入力装置を
作製しようとすると、照明装置として発光ダイオードや
レーザダイオード等の半導体発光素子を用いる必要があ
る。ところが、このような半導体発光素子を用いると、
照度が低いためにレンズの口径を大きくしたり、フォト
センサの感度を上げるなどして受光感度を上げる必要が
あった。
In a conventional image input device, if an attempt is made to produce a small-sized and low-cost integrated image input device with illumination, it is necessary to use a semiconductor light emitting element such as a light emitting diode or a laser diode as the illumination device. There is. However, when such a semiconductor light emitting device is used,
Since the illuminance is low, the light receiving sensitivity has to be increased by increasing the aperture of the lens or increasing the sensitivity of the photo sensor.

【0004】ところが、受光感度を上げると、撮像した
画像が蛍光灯のフリッカや人の影などの外乱の影響を受
けやすくなるという不都合が生じる。外乱に弱いことは
撮像した画像を用いて画像処理を行う場合に信頼性を大
きく損ねる結果となり、極めて不都合である。このた
め、従来は大型で照度が高い強力な照明装置を用いざる
を得ず、小型化が困難であった。
[0004] However, when the light receiving sensitivity is increased, there arises a disadvantage that a captured image is more susceptible to disturbance such as flicker of a fluorescent lamp and a shadow of a person. Weakness to disturbance results in significant loss of reliability when performing image processing using a captured image, which is extremely inconvenient. For this reason, conventionally, a large and powerful illumination device having high illuminance had to be used, and it was difficult to reduce the size.

【0005】本発明は、このような従来の課題を解決す
るためになされたもので、照明装置として発光ダイオー
ド等の半導体発光素子を用いても、外乱の影響を受け難
い照明一体型の小型の画像入力装置を得ることを目的と
する。
The present invention has been made to solve such a conventional problem. Even if a semiconductor light-emitting device such as a light-emitting diode is used as a lighting device, a small lighting-integrated type that is hardly affected by disturbance. An object is to obtain an image input device.

【0006】[0006]

【課題を解決するための手段】本発明の請求項1に記載
の発明は、発光ダイオードなどの半導体発光素子と、複
数のフォトセンサに蓄積された信号電荷を電気信号とし
て順次取り出す固体撮像素子と、半導体発光素子の発光
期間およびフォトセンサの受光期間を制御する制御部と
を備え、制御部は発光期間と受光期間とが一致するよう
に半導体発光素子および固体撮像素子をシャッタ制御す
るように構成する。
According to a first aspect of the present invention, there is provided a semiconductor light emitting device such as a light emitting diode, and a solid state image pickup device for sequentially taking out signal charges accumulated in a plurality of photosensors as electric signals. A control unit for controlling a light emitting period of the semiconductor light emitting device and a light receiving period of the photo sensor, wherein the control unit is configured to control the shutter of the semiconductor light emitting device and the solid-state imaging device so that the light emitting period and the light receiving period coincide with each other. I do.

【0007】本発明の請求項2記載の発明は、請求項1
記載の発明において、制御部は、1垂直期間終了前の一
定期間のみを受光期間とし、他の期間にフォトセンサに
蓄積された信号電荷を消去し、受光期間に蓄積された信
号電荷のみを電気信号として取り出すように固体撮像素
子を制御する。
[0007] The invention according to claim 2 of the present invention is based on claim 1.
In the invention described, the control unit sets the light receiving period only for a certain period before the end of one vertical period, erases the signal charges accumulated in the photo sensor in the other periods, and electrically removes only the signal charges accumulated in the light receiving period. The solid-state imaging device is controlled so as to be extracted as a signal.

【0008】本発明によれば、固体撮像素子の受光期間
と半導体発光素子の発光期間とを同期させるようにした
ので、被写体像を撮像する際の外乱耐性が向上する。ま
た、受光期間に同期して発光期間を定めるので、半導体
発光素子はパルス点灯することになり、パルス点灯時の
半導体発光素子の瞬間発光パワーはDC点灯時の数十倍
の大きさになるので、外乱耐性がさらに向上する。
According to the present invention, the light receiving period of the solid-state image pickup device and the light emitting period of the semiconductor light emitting device are synchronized with each other, so that the disturbance resistance when a subject image is picked up is improved. In addition, since the light emitting period is determined in synchronization with the light receiving period, the semiconductor light emitting element is pulse-lighted, and the instantaneous light emission power of the semiconductor light emitting element at the time of pulse lighting is several tens of times that at the time of DC lighting. In addition, disturbance resistance is further improved.

【0009】[0009]

【発明の実施の形態】図1は、本発明による画像入力装
置の一実施の形態を示すブロック図である。同図におい
て、固体撮像素子1はレンズ2を透過した被写体像が結
像する位置に配置され、画像を光電変換して得た撮像信
号S1を、出力バッファ3を介して同期信号重畳部4に
出力する。同期信号重畳部4では、撮像信号S1に制御
部5から出力される水平同期信号HDおよび垂直同期信
号VDを重畳して映像信号S2として外部に出力する。
FIG. 1 is a block diagram showing an embodiment of an image input apparatus according to the present invention. In FIG. 1, a solid-state imaging device 1 is arranged at a position where a subject image transmitted through a lens 2 is formed, and an imaging signal S1 obtained by photoelectrically converting an image is output to a synchronization signal superimposing unit 4 via an output buffer 3. Output. The synchronizing signal superimposing unit 4 superimposes the horizontal synchronizing signal HD and the vertical synchronizing signal VD output from the control unit 5 on the imaging signal S1 and outputs the superimposed signal as a video signal S2 to the outside.

【0010】また、レンズ2の両端近傍には、一対の発
光ダイオード(LED)6a,6bが配置されている。
このLED6a,6bはLEDドライバ7を介して制御
部5から出力される発光指令信号LSによって発光駆動
され、被写体を照明する照明装置として機能する。
A pair of light emitting diodes (LEDs) 6a and 6b are arranged near both ends of the lens 2.
The LEDs 6a and 6b are driven to emit light by a light emission command signal LS output from the control unit 5 via the LED driver 7, and function as an illumination device for illuminating a subject.

【0011】図2は、固体撮像素子1を集積回路で構成
した場合の平面構造図である。同図において、複数のフ
ォトセンサPhが基板11にマトリクス状に配置されて
おり(この図では、4列×6行)、各列のフォトセンサ
Phの間にはCCD(電荷結合素子)からなる垂直シフ
トレジスタVR1〜VR4が配置されている。
FIG. 2 is a plan view showing the structure when the solid-state imaging device 1 is formed by an integrated circuit. In the figure, a plurality of photo sensors Ph are arranged in a matrix on a substrate 11 (in this figure, 4 columns × 6 rows), and a CCD (charge coupled device) is provided between the photo sensors Ph in each column. Vertical shift registers VR1 to VR4 are arranged.

【0012】また、各垂直シフトレジスタVR1〜VR
4の出力端には、CCDからなる一ライン転送分の水平
シフトレジスタHRが配置されており、各垂直シフトレ
ジスタVR1〜VR4に蓄積された信号電荷をライン毎
に出力するように構成されている。
Further, each of the vertical shift registers VR1 to VR
At the output end of No. 4, a horizontal shift register HR for one line transfer composed of a CCD is arranged, and is configured to output signal charges accumulated in each of the vertical shift registers VR1 to VR4 line by line. .

【0013】この固体撮像素子1は、それ自体は公知の
インターライン転送形固体撮像デバイスであるので、詳
細説明は省略するが、Vφ1〜Vφ4は垂直シフトレジ
スタVR1〜VR4を駆動する4相の垂直レジスタ転送
クロック、Hφ1〜Hφ2は水平シフトレジスタHRを
駆動する2相の水平レジスタ転送クロック、VOUT は信
号出力、RGは信号電荷を電圧信号に変換するリセット
ゲートクロック、CGGは出力増幅器ゲート、VDDは回路
電源、VLは保護トランジスタバイアス、SUBは基板
電圧である。
The solid-state imaging device 1 is a well-known interline transfer type solid-state imaging device. Therefore, detailed description thereof is omitted, but Vφ1 to Vφ4 are four-phase vertical driving registers for driving the vertical shift registers VR1 to VR4. Hφ1 to Hφ2 are two-phase horizontal register transfer clocks for driving the horizontal shift register HR, VOUT is a signal output, RG is a reset gate clock for converting signal charges into voltage signals, CGG is an output amplifier gate, and VDD is a register transfer clock. A circuit power supply, VL is a protection transistor bias, and SUB is a substrate voltage.

【0014】次に、図3に示す波形図を参照しながら、
本実施の形態による画像入力装置の動作について説明す
る。同図において、(a)は1垂直期間における映像信
号S2を示し、映像信号S2が垂直同期信号VD、水平
同期信号HDおよびnラインの撮像信号S1(S1(1)
〜S1(n))からなっていることを示している。
Next, referring to the waveform diagram shown in FIG.
The operation of the image input device according to the present embodiment will be described. In the figure, (a) shows a video signal S2 in one vertical period, and the video signal S2 is composed of a vertical synchronizing signal VD, a horizontal synchronizing signal HD, and an n-line imaging signal S1 (S1 (1)
.. S1 (n)).

【0015】固体撮像素子1の受光によってフォトセン
サPhで発生した信号電荷は、電荷蓄積動作によってそ
れぞれの接合容量に蓄積され、蓄積期間が終了すると、
全画素同時に隣接する垂直シフトレジスタVR1〜VR
4に転送される。この転送は1垂直期間終了毎に行われ
る。本実施の形態では、(b)に示す転送クロックVφ
1〜Vφ4のうち、転送クロックVφ1,Vφ3が高レ
ベルになった時点t1で行う。
The signal charges generated in the photosensor Ph by the light reception of the solid-state imaging device 1 are accumulated in the respective junction capacitors by a charge accumulation operation.
Vertical shift registers VR1 to VR simultaneously adjacent to all pixels
4 is transferred. This transfer is performed every time one vertical period ends. In the present embodiment, the transfer clock Vφ shown in FIG.
This is performed at time t1 when the transfer clocks Vφ1 and Vφ3 among 1 to Vφ4 become high level.

【0016】なお、転送クロックVφ1,Vφ3は低レ
ベル、中レベル、高レベルの3つの電圧レベルをとり、
転送クロックVφ2,Vφ4は低レベル、中レベルの2
つの電圧レベルをとる。転送クロックVφ1,Vφ3が
高レベルになるとフォトセンサPhに蓄積された信号電
荷が垂直シフトレジスタVR1〜VR4に転送され、あ
とは水平同期期間HD毎に転送クロックVφ1〜Vφ4
による低レベルおよび中レベルを取るクロックで4相駆
動され、1水平期間毎に1ビットずつの信号電荷が水平
シフトレジスタHRに転送される。
The transfer clocks Vφ1 and Vφ3 take three voltage levels, that is, low level, middle level and high level.
The transfer clocks Vφ2 and Vφ4 are low level, medium level 2
Takes one voltage level. When the transfer clocks Vφ1 and Vφ3 become high level, the signal charges accumulated in the photosensor Ph are transferred to the vertical shift registers VR1 to VR4, and thereafter, the transfer clocks Vφ1 to Vφ4 for each horizontal synchronization period HD.
, And is driven in four phases by a clock that takes a low level and a medium level, and signal charges of one bit are transferred to the horizontal shift register HR every one horizontal period.

【0017】各レジスタVR1〜VR4に転送された信
号電荷のうち最初は最下部のラインの信号電荷が水平シ
フトレジスタHRに転送される。水平シフトレジスタH
Rに転送された1ラインの信号電荷は、(c)に示す転
送クロックHφ1〜Hφ2によってシフトされ、1水平
期間中に1ライン分の信号電荷が出力される。
At first, among the signal charges transferred to the registers VR1 to VR4, the signal charges in the lowermost line are transferred to the horizontal shift register HR. Horizontal shift register H
The signal charges of one line transferred to R are shifted by transfer clocks Hφ1 to Hφ2 shown in (c), and signal charges of one line are output during one horizontal period.

【0018】この動作を繰り返すことによって、1垂直
期間内に全ラインの信号電荷がリセットゲートクロック
RGによって電圧信号に変換されて、時系列的に信号出
力VOUT から撮像信号S1(1) 〜S1(n) として出力さ
れる。
By repeating this operation, signal charges of all lines are converted into voltage signals by the reset gate clock RG within one vertical period, and the image signals S1 (1) to S1 ( n) is output.

【0019】こうして出力された撮像信号S1は、同期
信号重畳部4で1水平期間毎に水平同期信号HDが重畳
され、かつ1垂直期間毎に垂直同期信号VDが重畳さ
れ、映像信号S2として出力される。
The image signal S1 thus output is superimposed on the horizontal synchronizing signal HD for each horizontal period by the synchronizing signal superimposing section 4 and superimposed on the vertical synchronizing signal VD for each vertical period, and is output as a video signal S2. Is done.

【0020】また、本発明では、外乱光の影響を受け難
いようにするために、固体撮像素子1のフォトセンサP
hに信号電荷を蓄積する受光期間と、LED6a,6b
を発光させる発光期間とを一致させ、LED6a,6b
が発光しているときのみフォトセンサPhで受光するよ
うにしている。
In the present invention, the photo sensor P of the solid-state image pickup device 1 is provided so as to be hardly affected by disturbance light.
h, a light receiving period for accumulating signal charges in the LEDs 6a, 6b
Are matched with the light emission period of the LEDs 6a and 6b.
Is received by the photo sensor Ph only when is emitting light.

【0021】すなわち、本実施の形態では、(d)に示
すように、1水平期間毎に基板電圧SUBを通常の電圧
より高い電圧とし、1垂直期間終了前、例えばラインS
1(n-1) の開始時点t2から時点t1までの期間は基板
電圧SUBを通常電圧に維持するようにしている。こう
することによって時点t2〜時点t1を受光期間として
いる。
That is, in this embodiment, as shown in (d), the substrate voltage SUB is set to a voltage higher than the normal voltage every one horizontal period, and before the end of one vertical period, for example, the line S
The substrate voltage SUB is maintained at the normal voltage during the period from the start time t2 of 1 (n-1) to the time t1. Thus, the time point t2 to the time point t1 are set as the light receiving period.

【0022】これは、固体撮像素子1は基板電圧SUB
が5〜10ボルト程度の通常電圧のときは、フォトセン
サPhによって光電変換された信号電荷を蓄積するが、
基板電圧SUBが通常より高い電圧(例えば、22.5
ボルト)になると、フォトセンサPhに蓄積していた信
号電荷を垂直シフトレジスタVR1〜VR4に移動せ
ず、そのまま外部に放出するという性質があるためであ
る。
This is because the solid-state imaging device 1 has a substrate voltage SUB
Is a normal voltage of about 5 to 10 volts, the signal charge photoelectrically converted by the photosensor Ph is stored.
When the substrate voltage SUB is higher than normal (for example, 22.5
(Volts), the signal charge accumulated in the photosensor Ph does not move to the vertical shift registers VR1 to VR4, but is discharged to the outside as it is.

【0023】そこで、1水平期間毎に基板電圧SUBを
高電圧とし、それまでフォトセンサPhに蓄積されてい
た信号電荷を放出し、ただし時点t2〜t1間のみは基
板電圧SUBを通常電圧に維持するようにしている。す
ると、最後に基板電圧SUBが高電圧になった時点t2
からフォトセンサPhの信号電荷を垂直レジスタVR1
〜VR4に転送する時点t1までの間に受光した光の信
号電荷のみが垂直レジスタVR1〜VR4に転送され
る。すなわち、1垂直期間で出力される信号電荷は、時
点t2〜t1間に蓄積された光のみである。
Therefore, the substrate voltage SUB is set to a high voltage every one horizontal period to release the signal charges accumulated in the photosensor Ph, but the substrate voltage SUB is maintained at the normal voltage only during the period from time t2 to t1. I am trying to do it. Then, at the time point t2 when the substrate voltage SUB finally becomes a high voltage.
From the photosensor Ph to the vertical register VR1
Only the signal charges of the light received during the time t1 when the signal charges are transferred to the vertical registers VR1 to VR4 are transferred to the vertical registers VR1 to VR4. That is, the signal charge output in one vertical period is only light accumulated between the time points t2 and t1.

【0024】また、制御部5は蓄積期間t2〜t1間に
同期して時点t3〜t4の間で発光指令信号LSを出力
し、この間のみLED6a,6bを発光させる。こうす
ることによって、LED6a,6bが発光しているとき
のみの画像が光電変換されて出力されることになる。
Further, the control unit 5 outputs the light emission command signal LS between the time points t3 and t4 in synchronization with the accumulation time period t2 to t1, and makes the LEDs 6a and 6b emit light only during this time. By doing so, an image only when the LEDs 6a and 6b are emitting light is photoelectrically converted and output.

【0025】また、一般にLEDは、図4のIF 〜IE
特性図に示すように、パルス点灯を行うと瞬間の出力パ
ワーが通常のDC定格のときよりも大きくとれ、約30
倍にすることが可能である。すなわち、DC点灯時の定
格45mm/srに対して、パルス点灯時は1200mm/sr
程度まで瞬間発光パワーを上げることが出来る。したが
って、従来のようにLEDをDC点灯させてシャッタ動
作なしに制御した場合に比べ、外乱の耐性としてはLE
Dのパワーアップ分(約30倍)強くなる。
In general, the LEDs are IF to IE shown in FIG.
As shown in the characteristic diagram, when the pulse lighting is performed, the instantaneous output power can be larger than that at the time of the normal DC rating, and about 30 times.
It is possible to double. In other words, the rated value is 45 mm / sr for DC lighting, but 1200 mm / sr for pulse lighting.
The instantaneous light emission power can be increased to a degree. Therefore, the resistance to the disturbance is LE compared to the conventional case where the LED is turned on DC and the shutter is not operated.
It becomes stronger by the power-up of D (about 30 times).

【0026】[0026]

【発明の効果】本発明によれば、固体撮像素子1はLE
D6a,6bの点灯時の入射光のみを受光するので、画
像を撮像する際の外乱耐性の向上に大きな効果を発揮す
ることができる。しかも、発光ダイオードはパルス点灯
を行うと発光パワーがDC点灯時の数十倍の大きさにな
るので、DC定格の小さな発光ダイオードを用いても外
乱耐性の向上に大きな効果を発揮することができる。
According to the present invention, the solid-state imaging device 1 is LE
Since only the incident light at the time of lighting of D6a and D6b is received, a great effect can be exerted on improvement of disturbance resistance when capturing an image. Moreover, since the light emitting power of the light emitting diode is several tens times larger than that of the light emitting diode when pulse lighting is performed, even if a light emitting diode having a small DC rating is used, it is possible to exert a great effect on improvement of disturbance resistance. .

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態を示す画像入力装置のブ
ロック図である。
FIG. 1 is a block diagram of an image input device according to an embodiment of the present invention.

【図2】固体撮像素子を集積回路で構成した場合の平面
構造図である。
FIG. 2 is a plan view of the structure when the solid-state imaging device is configured by an integrated circuit.

【図3】本実施の形態による動作について説明する波形
図で、(a)は映像信号S2、(b)は垂直レジスタ転
送クロックVφ1〜Vφ4、(c)は水平レジスタ転送
クロックHφ1〜Hφ2、(d)は基板電圧SUB、
(e)は発光指令信号LSである。
3A and 3B are waveform diagrams for explaining the operation according to the present embodiment, wherein FIG. 3A shows a video signal S2, FIG. 3B shows vertical register transfer clocks Vφ1 to Vφ4, FIG. 3C shows horizontal register transfer clocks Hφ1 to Hφ2, and FIG. d) is the substrate voltage SUB,
(E) is a light emission command signal LS.

【図4】発光ダイオード(LED)のIF 〜IE 特性図
である。
FIG. 4 is a graph showing IF to IE characteristics of a light emitting diode (LED).

【符号の説明】[Explanation of symbols]

1 固体撮像素子 2 レンズ 3 出力バッファ 4 同期信号重畳部 5 制御部 6a,6b 発光ダイオード(LED) 7 LEDドライバ DESCRIPTION OF SYMBOLS 1 Solid-state image sensor 2 Lens 3 Output buffer 4 Synchronization signal superposition part 5 Control part 6a, 6b Light emitting diode (LED) 7 LED driver

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 発光ダイオードなどの半導体発光素子
と、 複数のフォトセンサに蓄積された信号電荷を電気信号と
して順次取り出す固体撮像素子と、 前記半導体発光素子の発光期間および前記フォトセンサ
の受光期間を制御する制御部とを備え、 前記制御部は、前記発光期間と前記受光期間とが一致す
るように前記半導体発光素子および前記固体撮像素子を
シャッタ制御することを特徴とする画像入力装置。
A semiconductor light-emitting element such as a light-emitting diode; a solid-state image pickup element for sequentially extracting signal charges accumulated in a plurality of photosensors as electric signals; and a light-emitting period of the semiconductor light-emitting element and a light-receiving period of the photosensor. An image input device, comprising: a control unit that controls the semiconductor light-emitting element and the solid-state imaging element so that the light-emitting period and the light-receiving period coincide with each other.
【請求項2】 前記制御部は、1垂直期間終了前の一定
期間のみを受光期間とし、他の期間に前記フォトセンサ
に蓄積された信号電荷を消去し、前記受光期間に蓄積さ
れた信号電荷のみを電気信号として取り出すように前記
固体撮像素子を制御することを特徴とする請求項1記載
の画像入力装置。
2. The method according to claim 1, wherein the control unit sets a light receiving period only for a certain period before the end of one vertical period, erases signal charges accumulated in the photo sensor in another period, and stores the signal charges accumulated in the light receiving period. 2. The image input device according to claim 1, wherein the solid-state imaging device is controlled so that only the electric signal is extracted as an electric signal.
JP8301294A 1996-10-25 1996-10-25 Picture input device Pending JPH10136272A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8301294A JPH10136272A (en) 1996-10-25 1996-10-25 Picture input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8301294A JPH10136272A (en) 1996-10-25 1996-10-25 Picture input device

Publications (1)

Publication Number Publication Date
JPH10136272A true JPH10136272A (en) 1998-05-22

Family

ID=17895114

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8301294A Pending JPH10136272A (en) 1996-10-25 1996-10-25 Picture input device

Country Status (1)

Country Link
JP (1) JPH10136272A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100423543C (en) * 2004-05-19 2008-10-01 索尼株式会社 Image pickup apparatus and image pickup method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100423543C (en) * 2004-05-19 2008-10-01 索尼株式会社 Image pickup apparatus and image pickup method

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