JPH10136228A - Horizontal synchronous pulse generation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce peripheral parts without changing relative time between a horizontal pulse edge and a vertical pulse edge even if a horizontal screen position is changed by generating a horizontal trigger pulse and a vertical trigger pulse with the same clock. SOLUTION: A video signal is inputted to a synchronous separation circuit 107. A horizontal synchronous pulse is outputted to a reference clock generation circuit 101 and a vertical synchronous pulse to a latch circuit 106. A counter circuit 102 sets a pulse which is outputted from the reference clock generation circuit 101 and which is 32 times as the reference clock of a counter and uses the vertical pulse outputted from the latch circuit 106 as a reset trigger pulse. A horizontal pulse generation circuit generates a pulse having a horizontal period and a vertical pulse generation circuit 104 a pulse having a vertical period by using the pulse outputted from the counter circuit 102. Thus, a microcomputer 105 is prevented from malfunctioning and a complicated pulse generation circuit is not necessary.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is to provide a television receiver capable of reducing peripheral parts without changing the relative time between horizontal and vertical pulse edges even when the horizontal screen position is changed. The present invention relates to a horizontal synchronization pulse generation circuit.

[0002]

2. Description of the Related Art In recent years, a horizontal synchronization pulse generation circuit requires a microcomputer that requires stable horizontal and vertical pulses in accordance with the sophistication of color television receivers. Even without changing the relative time between the horizontal and vertical pulse edges,
A horizontal synchronizing pulse generation circuit that can reduce the number of peripheral components is regarded as important.

Hereinafter, an example of the above-described conventional horizontal synchronizing pulse generation circuit will be described with reference to the drawings.

FIG. 3 is a block diagram showing a conventional horizontal synchronizing pulse generating circuit. In the block diagram of FIG. 3, reference numeral 301 denotes a reference clock generation circuit, 302 denotes a counter circuit, 303 denotes a pulse shaping circuit, 304 denotes a vertical pulse generation circuit, 305 denotes a microcomputer,
06 is a latch circuit, 307 is a sync separation circuit, 308 is a horizontal position adjustment circuit, and 309 is a horizontal deflection circuit.

[0005] The operation of the horizontal synchronizing pulse generation circuit configured as described above will be described below.

First, a video signal is input to the sync separation circuit 307, and a horizontal sync pulse and a vertical sync pulse are output. The horizontal synchronization pulse is input to the reference clock generation circuit 301 and outputs a clock having a frequency 32 times the horizontal frequency.
The vertical synchronization pulse is input to the latch circuit 306,
After being latched by the clock of twice the horizontal frequency output from the reference clock generation circuit 301, it enters the counter circuit 302. The counter circuit 302 configures a counter with a reference clock having a 32 times horizontal frequency and a reset trigger as a vertical output pulse from the latch circuit 306. Based on the output pulse from the counter circuit 302, a vertical pulse generation circuit 304 generates a vertical pulse, and a horizontal position adjustment circuit 308 generates a horizontal drive pulse for driving a horizontal deflection circuit. The horizontal drive pulse generated by the horizontal position adjustment circuit 308 is input to the horizontal deflection circuit 309, generates a flyback pulse, and feeds it back to the horizontal position adjustment circuit 308 to perform phase adjustment to the horizontal position adjustment circuit 308. Do it. This allows the horizontal position adjustment circuit 308 to adjust the horizontal position of the screen. The flyback pulse output from the horizontal deflection circuit 309 is input to the pulse shaping circuit 303, and after performing pulse shaping, enters the microcomputer 305 as a horizontal trigger pulse. On the other hand, the vertical pulse generation circuit 304
The pulse generated in is input to the microcomputer 305 as a vertical trigger pulse. The microcomputer 305 determines a field based on these horizontal and vertical trigger pulses and determines a start point of an on-screen character.

[0007]

However, the above configuration has the following problems. That is,
When the horizontal position of the screen is moved by the horizontal position adjustment circuit 308, the phase of the flyback pulse output from the horizontal deflection circuit 309 changes, so that the phase of the horizontal trigger pulse output from the pulse shaping circuit 303 also changes. Here, FIG. 2 shows the time relationship between the vertical trigger pulse and the horizontal trigger pulse input to the microcomputer 305. The time A, B, C, and C between the vertical trigger pulse edge and the horizontal trigger pulse edge are shown. D, E, F,
If G and H are less than a predetermined time, the microcomputer 305 malfunctions. However, when the horizontal position of the screen is moved, the time between the horizontal trigger pulse and the vertical trigger pulse changes, so that A, B, C, D, E, F, G,
H cannot be taken for more than the required time, and the microcomputer 305 may malfunction. In order to solve this problem, it is necessary to add a complicated circuit as shown in FIG.

[0008]

In order to solve the above-mentioned problems, a horizontal synchronizing pulse generation circuit according to the present invention comprises a reference clock generation circuit, a counter circuit, a horizontal pulse generation circuit, a vertical pulse generation circuit, and a micro-pulse generation circuit. It has a computer, a latch circuit, and a sync separation circuit.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention has the effect that the peripheral parts can be reduced without changing the relative time between the horizontal pulse edge and the vertical pulse edge even if the horizontal screen position is changed. A horizontal synchronizing pulse generation circuit characterized by the function of generating a horizontal trigger pulse and a vertical trigger pulse entering a microcomputer from a counter circuit configured by the same clock.

[0010] The invention according to claim 2 of the present invention comprises a reference clock generation circuit, a counter circuit, a horizontal pulse generation circuit, a vertical pulse generation circuit, a microcomputer, a latch circuit, and a synchronization separation circuit. Horizontal synchronization pulse generation circuit which has the effect of reducing the peripheral parts without changing the relative time between the horizontal pulse edge and the vertical pulse edge even when the horizontal screen position is changed. This has the function of generating a trigger pulse from a counter circuit configured by the same clock.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a horizontal synchronizing pulse generating circuit according to an embodiment of the present invention. In FIG. 1, reference numeral 101 denotes a reference clock generation circuit, 102 denotes a counter circuit, 103 denotes a horizontal pulse generation circuit, 104 denotes a vertical pulse generation circuit, 105 denotes a microcomputer, 106 denotes a latch circuit, and 107 denotes a synchronization separation circuit.

The operation of the horizontal synchronizing pulse generation circuit configured as described above will be described below with reference to FIGS.

First, in FIG. 1, a video signal is input to the sync separation circuit 107, and a horizontal sync pulse is output to the reference clock generating circuit 101 and a vertical sync pulse is output to the latch circuit 106. The reference clock generation circuit 101 outputs a pulse having a horizontal frequency of 32 times and 2 times, and a latch circuit 106 latches a vertical synchronization pulse with a pulse of twice the horizontal frequency output from the reference clock generation circuit 101. The counter circuit 102 uses a 32-fold pulse output from the reference clock generation circuit 101 as a reference clock for the counter, and uses a vertical pulse output from the latch circuit 106 as a reset trigger pulse. Using the pulse output from the counter circuit 102, the horizontal pulse generation circuit generates a pulse having a horizontal period, and the vertical pulse generation circuit 104 generates a pulse having a vertical period.

FIG. 2 is a diagram for explaining the operation of the horizontal synchronizing pulse generating circuit according to the present invention. The time relationship between the horizontal trigger pulse edge and the vertical trigger pulse edge input to the microcomputer 105 is conceptually shown. Is shown. Both the horizontal pulse generation circuit 103 and the vertical pulse generation circuit 104 are made based on the same clock.
When the horizontal position of the screen is moved, the phases of the horizontal and vertical pulse edges do not change, so one of A, B, C, D, E, F, G, and H shown in FIG. It will not take more time, and the microcomputer 105 will not malfunction. Therefore, a complicated pulse generation circuit as shown in FIG. 4 is not required.

[0016]

As described above, the present invention provides a reference clock generation circuit, a counter circuit, a horizontal pulse generation circuit, a vertical pulse generation circuit, a microcomputer, a latch circuit, and a synchronization separation circuit. Even if the horizontal screen position is changed, it is possible to expect an effect that the relative time between the horizontal pulse edge and the vertical pulse edge is not changed, and the peripheral components can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a horizontal synchronization pulse generation circuit according to an embodiment of the present invention.

FIG. 2 is an operation explanatory diagram of FIG. 1;

FIG. 3 is a block diagram of a conventional horizontal synchronization pulse generation circuit.

FIG. 4 is a circuit configuration diagram of a conventional pulse shaping circuit.

[Explanation of symbols]

 Reference Signs List 101 Reference clock generation circuit 102 Counter circuit 103 Horizontal pulse generation circuit 104 Vertical pulse generation circuit 105 Microcomputer 106 Latch circuit 107 Synchronization separation circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroyasu Shimaoka 1006 Kazuma Kadoma, Osaka Pref.Matsushita Electric Industrial Co., Ltd.

Claims (2)

[Claims] 1. A horizontal synchronizing pulse generation circuit characterized in that the relative time between a horizontal pulse edge and a vertical pulse edge is not changed even if the horizontal screen position is changed. 2. A reference clock generation circuit, a counter circuit, a horizontal pulse generation circuit, a vertical pulse generation circuit,
A horizontal synchronization pulse generation circuit comprising a microcomputer, a latch circuit, and a synchronization separation circuit, wherein a relative time between a horizontal pulse edge and a vertical pulse edge is not changed even when a horizontal screen position is changed.