JPH10135280A - Semiconductor device, manufacture thereof and circuit film for board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device in which a finer wiring pattern can be formed to realize a chip size semiconductor device easily. SOLUTION: A semiconductor element 10 provided with an electrode terminal 12 is bonded, to one face side thereof, with a circuit board of substantially the same size as the semiconductor element 10 and the wiring pattern of the circuit board is connected electrically with the electrode terminal 12 of the semiconductor element 10. A circuit film 14 for board where a wiring pattern 20 provided with land parts to be fixed with external connecting terminals, i.e., solder balls 22, is formed on one face side of an insulating film 18 while being bent, at one end part thereof, along the side end face of the insulating film 18 is employed as the circuit board wherein the bent part of the insulating film 18 is connected through a bump 28 with the electrode terminal 12 of the semiconductor element 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a method for manufacturing the same, and a circuit film for a substrate. A semiconductor device comprising a wiring pattern and an electrode terminal of a semiconductor element electrically connected thereto, a method of manufacturing the same, and a connection part joined to one surface of the semiconductor element and connected to the electrode terminal of the semiconductor element is formed at one end. The present invention relates to a circuit film for a substrate, wherein a wiring pattern having a land portion on which an external connection terminal is mounted is formed on one surface side of an insulating film.

[0002]

2. Description of the Related Art In a semiconductor device, as shown in FIG.
A package 102 having substantially the same size as the package 102 is bonded to the so-called chip size package (Chip Size Packa).
ge) (hereinafter may be referred to as CSP). FIG.
In the CSP shown in FIG. 3, an insulating film 104 made of polyimide on which wiring patterns 106, 106,.
08 and the wiring pattern 10
., The leads 110, 110.
And the electrode terminals 112, 112,... Formed on one surface side of the semiconductor element 100 are joined. The leads 110 and the like are sealed with a resin 116. Further, the solder balls 114, 114,... Formed as external connection terminals on the wiring patterns 106, 106,.
0 is electrically connected to the electrode terminal 112. In the CSP shown in FIG. 13, a metal ring 118 for protection is mounted along the peripheral side surface of the semiconductor element 100.

[0003]

The CSP shown in FIG.
Is suitable for mobile phones and the like because of its small size. However, in the CSP of FIG. 13, the leads 110 extending from the wiring patterns 106, 106,...
110 and the electrode terminals 112, 1 of the semiconductor element 100
The connection with 12... Is usually made by pressing and crimping each lead 110 with a special crimping tool for connection. For this reason, further fine patterning of the wiring pattern 106 and the like is limited by the capability of the crimping tool for connection, and the manufacturing process is extremely complicated.
Manufacturing costs are high. In addition, in a normal-size semiconductor device, with the progress of integration of semiconductor elements,
There is a demand for a means for further miniaturizing a wiring pattern or the like of a circuit board. Therefore, an object of the present invention is to provide a semiconductor device capable of further miniaturizing a wiring pattern and the like, a method of manufacturing the same, and a circuit film for a substrate so that a semiconductor device having a chip size can be easily obtained. It is in.

[0004]

Means for Solving the Problems The present inventor has studied to solve the above problems, and as a result, on one surface side of the insulating film,
A wiring pattern having a land portion on which an external connection terminal is mounted is formed, and a circuit film for a substrate, which is formed by bending one end of the wiring pattern along a side end surface of the insulating film, is provided with an electrode terminal. By bonding to the one surface side of the provided semiconductor element and connecting the bent portion of the wiring pattern and the electrode terminal of the semiconductor element via a bump,
As in the conventional CSP shown in FIG.
., The leads 110, 110.
. And the electrode terminals 112, 112 of the semiconductor element 100.
Without using a special crimping tool for connection
The inventors have found that SP can be manufactured, and have reached the present invention. That is, the present invention relates to a semiconductor device in which a circuit board is joined to one surface side of a semiconductor element provided with an electrode terminal, and a wiring pattern of the circuit board is electrically connected to an electrode terminal of the semiconductor element. As a circuit board, a wiring pattern having a land portion on which an external connection terminal is mounted is formed on one surface side of the insulating film, and one end of the wiring pattern has a side end surface or a perforated hole of the insulating film. The semiconductor device is characterized in that a substrate circuit film bent along the inner wall is used, and the bent portion of the wiring pattern and the electrode terminal of the semiconductor element are connected via a bump. Here, by using a circuit board of a chip size as the circuit board, a chip size package can be obtained.

Further, the present invention provides a semiconductor device comprising a circuit board joined to one surface of a semiconductor element provided with electrode terminals, and a wiring pattern of the circuit board and an electrode terminal of the semiconductor element electrically connected. When manufacturing a circuit board, a wiring pattern having a land portion to which an external connection terminal is mounted is formed on one surface side of an insulating film as the circuit board, and one end of the wiring pattern is an insulating film. After using the circuit film for a substrate that is bent along the side end surface or the inner wall of the perforated hole, and bonding the circuit film for a substrate to each one surface side of a plurality of unit semiconductor elements formed on a wafer, The bent portions of the wiring pattern and the electrode terminals of the unit semiconductor element are connected via bumps, and then the wafer and the substrate circuit film are cut at predetermined locations to form a plurality of semiconductor devices. In a method of manufacturing a semiconductor device which is characterized in that formed.

According to the present invention, a circuit film for a substrate is joined to one surface of a unit semiconductor element so that the bent portion of the wiring pattern and the electrode terminal of the unit semiconductor element are close to each other, so that connection by bumps is achieved. Can be easily performed. Further, by using such bumps as solder bumps or gold bumps, the connection between the bent portion of the wiring pattern and the electrode terminal of the unit semiconductor element can be further facilitated. Further, the other surface of the insulating film is bonded to the one surface of the semiconductor element with an adhesive, or the one surface of the insulating film on which the wiring pattern is formed is bonded to the one surface of the semiconductor element with an adhesive. By piercing the insulating film with the piercing hole in which the land portion of the wiring pattern is exposed on the bottom surface, the insulating film and the semiconductor element can be easily joined. Further, in the manufacturing method of the present invention, the productivity of the semiconductor device can be further improved by using, as the circuit film for the substrate, a circuit film for the connecting substrate in which the circuit film for the unit substrate corresponding to the unit semiconductor element is connected. .

According to the present invention, there is provided a wiring which is joined to one surface side of a semiconductor element, has a connection portion connected to an electrode terminal of the semiconductor element at one end, and has a land portion to which an external connection terminal is mounted. A pattern is a circuit film for a substrate formed on one surface side of an insulating film, wherein a connection portion of the wiring pattern is bent along a side end surface of the insulating film or an inner wall of a perforated hole. It is also a circuit film for a substrate characterized by the above. In the present invention, by forming the circuit film for a substrate as a circuit film for a connecting substrate in which the circuit film for a unit substrate corresponding to the unit semiconductor element is connected, a unit substrate is formed for each of the unit semiconductor devices formed on the wafer. Circuit films can be simultaneously bonded, which is convenient for improving the productivity of semiconductor devices.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in more detail with reference to the drawings. FIG. 1 is a longitudinal sectional view showing an example of a CSP according to the present invention. FIG. 1 is an example of a CSP of a semiconductor device 10 having an electrode terminal 12 formed on a peripheral portion. CSP of FIG.
A substrate circuit film 14 having substantially the same size as the semiconductor element 10 is bonded to one surface of the semiconductor element 10 on which the electrode terminals 12 are formed by an adhesive 16. As shown in FIG. 2, the circuit film 14 for the substrate is formed on an insulating film 18 made of polyimide resin, BT (Bismaleimide Triazine) resin, glass epoxy resin, glass mat / epoxy resin, phenol resin, chlorofluorocarbon resin, or the like. A wiring pattern 20 is formed.
Is provided with a land portion 24 on which a solder ball 22 as an external connection terminal is mounted, and one end portion thereof is formed in a bent portion 26 bent along the side end surface of the insulating film 18. . Such land portion and bent portion 2
The wiring pattern 20 except 6 is covered with a protective film 32 made of solder resist and protected from oxidation and the like. As shown in FIG. 1, the bent portion 26 of the wiring pattern 20 is connected to the electrode terminal 12 of the semiconductor element 10 by a solder bump 28 and is sealed by a sealing resin 30.

The CSP shown in FIG. 1 is composed of a substrate circuit film 14 shown in FIG. 2 and an adhesive 16 on one surface side of unit semiconductor elements 11a, 11b... Formed on a wafer 11, as shown in FIG. It is preferable from the standpoint of production efficiency that they are joined and manufactured. The circuit film 14 for a substrate is a circuit film for a connecting substrate in which the circuit films for the unit substrates corresponding to the unit semiconductor elements 11a, 11b,. When bonding the substrate circuit film 14 to the wafer 11, the electrode terminals 1 of the unit semiconductor elements 11a, 11b,.
2 and the bent portion 26 of the wiring pattern 20 as close as possible. The solder balls 29 may be attached to the electrode terminals 12 after joining the circuit film 14 for a substrate to the wafer 11. Next, the solder ball 29 is reflowed to connect the bent portion 26 of the wiring pattern 20 and the solder bump 28 in order to ensure the connection between the solder ball 29 and the bent portion 26 of the wiring pattern 20. Thereafter, the wafer 1 is placed at the position indicated by the dashed line shown in FIG.
1 and the substrate circuit film 14, the bent portion 26 of the wiring pattern 20 and the electrode terminal 12 of the semiconductor element 10 are cut.
Is sealed with potting by sealing resin. Further, the CSP shown in FIG. 1 can be obtained by mounting the solder balls 22 as external connection terminals on the lands 24 of the wiring pattern 20. Here, a solder bump 28 connecting the bent portion 26 of the wiring pattern 20 and the electrode terminal 12 of the semiconductor element 10
Is sealed by potting, and then the wafer 11 is cut at the dashed line shown in FIG.
P may be used, and instead of the solder ball 29, a solder bump formed by printing or dotting a solder paste or by solder plating may be used. Further, the connection between the bent portion 26 of the wiring pattern 20 and the electrode terminal 12 of the semiconductor element 10 may be performed by a stud bump described later.

According to the CSP shown in FIG.
0, a circuit film 14 for a substrate on which a wiring pattern 20 is previously formed on an insulating film 18 is bonded to an adhesive 16
After bonding, the electrode terminals 12 of the semiconductor element 10 and the bent portions 26 as connection portions of the wiring patterns 20 can be connected via the solder bumps 28. Therefore, as in the conventional CSP shown in FIG.
The CSP can be manufactured without using a special connection crimping tool to connect the leads 110, 110,... Extended from the electrode terminals 112, 112,. Further, in the CSP shown in FIG. 1, the degree of miniaturization of the wiring pattern 20 is not determined by the capability of the crimping tool for connection, so that the degree of freedom of miniaturization of the wiring pattern 20 can be increased.

In manufacturing the circuit film 14 for a substrate used in the CSP shown in FIG. 1, first, a circuit film 34 is formed as shown in FIG. This circuit film 3
4, one end 25 of the wiring pattern 20 formed on one surface side of the insulating film 18 protrudes inward of a through hole 36 formed in the insulating film 18. Further, the other end of the wiring pattern 20 is formed on a land 24 on which an external connection terminal is mounted. Such a circuit film 34
Is formed by applying a photolithography method or the like to a metal foil such as a copper foil bonded to one surface side of the insulating film 18 to form a wiring pattern 20 having a predetermined pattern.
The hole 36 can be obtained by drilling a through hole 36 at a predetermined location by laser processing or etching processing so as to project inward. Next, as shown in FIG. 5A, an intermediate circuit film 15 is formed in which the wiring pattern 20 excluding the land portion 24 and the one end 25 protruding inward of the through hole 36 is covered with a protective film 32 made of solder resist. I do. This protective film 32
This protects the wiring pattern 20 from oxidation and the like.
The circuit film 34 shown in FIG. 4 is formed by bonding a metal foil such as a copper foil to the insulating film 18 having the through holes 36 formed therein.
The wiring pattern 20 having a predetermined pattern may be formed by applying a photolithography method or the like to the metal foil.

Thereafter, as shown in FIG.
The bending jig 38 is inserted into the through-hole 36 and the wiring pattern 20 is
Is bent along the inner wall surface of the through-hole 36 to obtain the circuit film 14 for a substrate. It is preferable that the bending jig 38 bends the one end portions 25 of the plurality of wiring patterns 20 projecting inward of the through holes 36 at the same time. For this reason, as shown in FIG. 4, it is preferable to make the protruding edge 37 of the through hole 36 from which the one end 25 of the wiring pattern 20 protrudes straight, because the shape of the bending jig 38 can be simplified. The circuit film 14 for a substrate shown in FIG. 2 can be obtained by separating the portion 40 where the wiring pattern 20 is formed on the insulating film 18 from the connecting portion 42 connecting the other insulating film 18.

In the CSP shown in FIG. 1, the substrate circuit film 1 has a bent portion 26 formed by bending one end 25 of the wiring pattern 20 along the side end surface of the insulating film 18 in advance.
4, the CSP shown in FIG. 6 can be obtained by using the intermediate circuit film 15 shown in FIG.
That is, the CSP shown in FIG. 6 differs from the CSP shown in FIG. 1 in that the connection between the bent portion 26 of the wiring pattern 20 and the electrode terminal 12 of the semiconductor element 10 is connected by the stud bump 44 made of gold. It can be manufactured by the method shown in FIG. FIG.
7A, first, as shown in FIG. 7A, an intermediate circuit film 15 is bonded to a unit semiconductor element 11a formed on a wafer 11 by an adhesive 16. Then
As shown in FIG. 7B, a wiring pattern 2 projecting from a side end surface of the insulating film 16 is formed by using a bonding tool 46 which is widely used as a conventional semiconductor device manufacturing apparatus.
0 is bent along the side end surface of the insulating film 20 and the electrode terminal 1 of the unit semiconductor element 11a is bent.
Then, a gold stud bump 44 is formed on 2. The stud bump 44 lowers the capillary 48 of the bonding tool 46 substantially vertically, and connects the end of the gold wire 50 inserted in the capillary 48 to the unit semiconductor element 11a.
Is formed by pressing on the electrode terminals 12.

The formed stud bumps 44 correspond to FIG.
As shown in FIG. 2C, the bent portion 26 of the wiring pattern 20 bent by the capillary 48 is also joined, and the bent portion 26 of the wiring pattern 20 is electrically connected to the electrode terminal 12 of the unit semiconductor element 11a. be able to. Then, after cutting the wafer 11 at the position indicated by the one-dot chain line shown in FIG. 7, the stud bumps 44 connecting the bent portions 26 of the wiring pattern 20 and the electrode terminals 12 of the semiconductor element 10 are sealed with potting resin. The cutting of the wafer 11 is performed by bending the bent portion 26 of the wiring pattern 20 and the unit semiconductor element 1.
Stud bumps 44 connecting the electrode terminals 12 of 1a
After sealing resin by potting. Furthermore, solder balls 22 as external connection terminals
The CSP shown in FIG. 6 can be obtained by mounting the CSP on the land portion 24 of the wiring pattern 20. Like this
Since the CSP shown in FIG. 6 can be manufactured using a bonding tool that is widely used as a conventional semiconductor device manufacturing apparatus, the manufacturing cost of the CSP can be further reduced. In FIG. 7, the stud bumps 44 are formed by lowering the capillary 48 of the bonding tool 46 in a direction substantially perpendicular to the electrode terminals 12, but as shown in FIG. May be approached from an oblique direction to form the stud bump 44. Here, instead of a gold wire passing through the capillary 48, a solder wire is inserted into the capillary 48, and a stud bump made of solder is inserted into the unit semiconductor element 11a.
May be formed on the electrode terminals 12. In this manner, by forming the stud bumps 44 as solder stud bumps, the bent portions 26 and the electrode terminals 12 can be connected by solder reflow, so that the connection between them can be performed more easily.

The CSP shown in FIG. 1 or FIG. 6 is a CSP of the semiconductor element 10 having the electrode terminal 12 formed on the peripheral portion. However, the present invention relates to a semiconductor element having the electrode terminal provided near the center. Can also be applied. An example is shown in FIG. The CSP shown in FIG. 9 (a) is obtained by bonding a substrate circuit film 18 having substantially the same size as the semiconductor element 10 having the perforated holes to the semiconductor element 12 having the electrode unit 12 provided in the vicinity of the center. 16 joined together. The circuit film 18 for a substrate includes a bent portion 26 formed by bending one end of a circuit pattern 20 formed on one surface side of the insulating film 14 having a perforated hole formed along the inner wall surface of the perforated hole.
The circuit pattern 20 excluding the land portion and the bent portion 26 is protected by a protective film 32 made of solder resist. A circuit pattern 20 formed along the inner wall surface of the perforated hole is formed with the circuit film 14 for a board.
The adhesive 16 is applied to one surface of the semiconductor element 12 so that the bent portion 26 of the semiconductor element 12 and the solder bump 29 (FIG. 3) provided on the electrode terminal 12 near the center of the semiconductor element 10 are as close as possible. Join. Next, similarly to the CSP shown in FIG. 1, reflow is performed on the solder bump 29 to connect the bent portion 26 of the circuit pattern 20 and the electrode terminal 12 of the semiconductor element 10 via the solder bump 28. 12 is sealed with a sealing resin 30 by potting to form a CSP. Also, in FIGS. 1 to 9A, the bent portion 26 of the circuit pattern 20 is formed along the vertical surface of the insulating film 18.
As shown in (b), the side end surface of the insulating film 18 or the inner wall of the perforated hole may be formed on an inclined surface by etching, and the bent portion 26 of the circuit pattern 20 may be formed along the inclined surface. As described above, in order to form the bent portion 26 of the circuit pattern 20 along the inclined surface of the insulating film 18,
It can be formed by forming a metal layer on the insulating film 18 by electroless plating, sputtering, vapor deposition, or the like, and etching the metal layer. In FIG. 9B, the bent portions 26 of the circuit pattern 20 and the electrode terminals 12 of the semiconductor element 10 are connected by the stud bumps 44, but the solder balls 29 (FIG. 3) are reflowed. It may be a solder bump.

The C shown in FIG. 1 to FIG.
In the SP, the circuit film for a substrate 14 bonded to one surface side of the semiconductor element 10 by the adhesive 16 is bonded so that the wiring pattern 20 is on the front surface, but as shown in FIG. The circuit film 14 for a substrate may be joined so as to be joined to one surface side of the semiconductor element 10 by the adhesive 16. In the case of the CSP shown in FIG.
It is necessary to bend one end of the wiring pattern 20 along the side end face 8 to form a bent portion 26. Further, since the solder balls 22 as external connection terminals are mounted on the lands 24 formed on the wiring pattern 20, the lands 24 are exposed on the bottom surfaces of the perforated holes formed in the insulating film 18 by etching or leather. It is also necessary to make it happen. However, since the wiring pattern 20 is protected by the adhesive 16, it is not necessary to protect the wiring pattern 20 with a protective film made of a solder resist.

Further, the size of the circuit board to be joined to the semiconductor element 10 may be slightly larger than that of the semiconductor element 10, as shown in FIG. The CSP shown in FIG. 11 is a substrate CSP formed of an insulating film 18 on the upper surfaces of the semiconductor element 10 and the heatsink 52 inserted into the recesses 53 of the metal heatsink 52 slightly larger than the semiconductor element 10. The circuit film 14 is bonded by an adhesive 16. The circuit film for a substrate 14 is joined so that a perforated hole formed in the insulating film 18 faces the electrode terminal 12 of the semiconductor element 10, and the insulating film 18 joined to the semiconductor element 10 and a heat sink Conductive patterns 20, 20,... Are formed on the respective upper surfaces of the insulating film 18 joined near the periphery of the 52. Further, one end of the conductor pattern 20 is bent along the inner wall surface of the drilled hole, is joined to the electrode terminal 12 of the semiconductor element 10 via the solder bump 28, and
A solder ball 22 as an external connection terminal is mounted on the other end of the solder ball. According to the CSP shown in FIG. 11, since the heat sink 52 is provided, the heat dissipation is good, and the solder balls 22 can be mounted on the upper surface of the semiconductor element 10 and near the periphery of the heat sink 52. It can easily cope with increasing the number of pins. The conductor pattern 20 is covered with a protective film 32 made of solder resist, and the electrode terminals 12 and the solder bumps 28 of the semiconductor element 10 are sealed with a sealing resin 30.

In the CSP and the like shown in FIGS.
The wiring pattern 20 shown in FIGS. 12A and 12B can be used. The wiring pattern 20 shown in FIG.
A wiring pattern 20 made of gold is provided on one surface of the insulating film 18.
Are formed, and the gold wiring pattern 20 protrudes into the through hole 36 (FIG. 4). Such a wiring pattern 2
0, a gold layer is formed on the entire surface of the copper foil adhered to one surface side of the insulating film 18 by electrolytic plating or sputtering, and then a through hole 36 having a predetermined shape is formed in the insulating film 18; After a wiring pattern of a predetermined pattern is formed by a method or the like, the copper layer of the wiring pattern 20 protruding into the through-hole 36 can be removed by an etching solution or the like that dissolves only copper. Therefore, a copper layer 21 is provided between the gold wiring pattern 20 and the insulating film 18.
Exists. On the other hand, the wiring pattern 2 shown in FIG.
Numeral 0 indicates that the copper pattern 19 formed on one surface side of the insulating film 18 is covered with the gold layer 23.
In the wiring pattern 20 shown in FIG. 12B, since the copper pattern 19 serves as a strong carrier of the wiring pattern 20, compared with the wiring pattern 20 shown in FIG.
The gold layer can be made thin. The wiring pattern 20 shown in FIG. 12 (b) is formed by using a copper foil adhered on one surface side of the insulating film 18 in which a through hole 36 having a predetermined shape is formed to a predetermined pattern copper pattern 19 by a photolithography method or the like. Thereafter, the copper pattern 19 can be obtained by performing electrolytic gold plating.

In the semiconductor device according to the present invention described above, each of the unit substrate circuit films obtained by cutting the substrate circuit film 14 is bonded to an individual unit semiconductor element obtained by cutting the wafer 11 with an adhesive. Of course, it is good. Further, an insulating film made of a thermoplastic resin is used as the insulating film 18 for forming the circuit film 14 for a substrate, and the bonding between the circuit film 14 for a substrate and a wafer or a semiconductor element is performed by thermocompression bonding without using an adhesive. It may be possible. In addition, it is needless to say that the present invention may be applied to a normal-sized semiconductor device having a size larger than that of the CSP.

[0020]

According to the present invention, there is no need for a connection crimping tool for connecting a lead extended from a wiring pattern to an electrode terminal of a semiconductor element, which is required in a conventional CSP manufacturing process. In this way, the wiring pattern can be further miniaturized, and the manufacturing cost of the CSP can be reduced. Further, by applying the present invention to a normal-sized semiconductor device, it is possible to further reduce the size of a wiring pattern and the like, and to cope with the progress of integration of semiconductor elements.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view showing an example of a semiconductor device according to the present invention.

FIG. 2 is a partial cross-sectional view illustrating a circuit film for a substrate used in the semiconductor device of FIG. 1;

FIG. 3 is an explanatory diagram illustrating an example of a method for manufacturing the semiconductor device illustrated in FIG.

FIG. 4 is a front view of a circuit film for obtaining the circuit film for a substrate shown in FIG. 2;

5 is an explanatory view illustrating a process for obtaining a circuit film for a substrate shown in FIG. 2 using the circuit film shown in FIG. 4;

FIG. 6 is a partial sectional view showing another example of the semiconductor device according to the present invention.

FIG. 7 is an explanatory diagram illustrating a process for obtaining the semiconductor device illustrated in FIG. 6;

FIG. 8 is an explanatory view illustrating another process for obtaining the semiconductor device according to the present invention.

FIG. 9 is a longitudinal sectional view and a partial sectional view showing another example of the semiconductor device according to the present invention.

FIG. 10 is a partial sectional view showing another example of the semiconductor device according to the present invention.

FIG. 11 is a partial sectional view showing another example of the semiconductor device according to the present invention.

FIG. 12 is a partial cross-sectional view illustrating a wiring pattern of a circuit film for a substrate used in a semiconductor device according to the present invention.

FIG. 13 is a partial cross-sectional view illustrating a conventional semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 10 semiconductor element 12 electrode terminal of semiconductor element 10 14 circuit film for substrate 16 adhesive 18 insulating film 20 wiring pattern 22 solder ball (external connection terminal) 24 land part of wiring pattern 20 25 one end part of wiring pattern 20 26 wiring pattern 20 bent portions 28 bumps 30 sealing resin 36 through holes

Claims (13)

[Claims] 1. A semiconductor device comprising: a circuit board joined to one surface of a semiconductor element provided with an electrode terminal; and a wiring pattern of the circuit board electrically connected to an electrode terminal of the semiconductor element. As a substrate, a wiring pattern having a land portion on which an external connection terminal is mounted is formed on one surface side of the insulating film, and one end of the wiring pattern has a side end surface of the insulating film or a perforated hole. A semiconductor device, wherein a circuit film for a substrate bent along an inner wall is used, and a bent portion of the wiring pattern and an electrode terminal of a semiconductor element are connected via a bump. 2. The semiconductor device according to claim 1, wherein the other surface of the insulating film is bonded to one surface of the semiconductor element by an adhesive. 3. One side of the insulating film on which the wiring pattern is formed is joined to the one side of the semiconductor element with an adhesive, and the wiring pattern is formed on the bottom surface of the perforated hole formed in the insulating film. 2. The semiconductor device according to claim 1, wherein the lands formed in the semiconductor device are exposed. 4. The semiconductor device according to claim 1, wherein the bump connecting the bent portion of the wiring pattern and the electrode terminal of the semiconductor element is a solder bump or a gold bump. 5. The circuit board according to claim 1, wherein the circuit board has a chip size.
The semiconductor device according to any one of claims 4 to 4. 6. A semiconductor device having a circuit board joined to one surface of a semiconductor element provided with electrode terminals and a wiring pattern of the circuit board electrically connected to electrode terminals of the semiconductor element. In the circuit board, a wiring pattern having a land portion on which an external connection terminal is mounted is formed on one surface side of the insulating film, and one end of the wiring pattern has a side end surface of the insulating film or After bonding the substrate circuit film to one surface of each of the plurality of unit semiconductor elements formed on the wafer using a substrate circuit film bent along the inner wall of the perforated hole, bending the wiring pattern Connecting the unit and the electrode terminal of the unit semiconductor element via a bump, and then cutting the wafer and the film for substrate circuit at predetermined locations to form a plurality of semiconductor devices. The method of manufacturing a semiconductor device according to claim. 7. The method of manufacturing a semiconductor device according to claim 6, wherein the substrate circuit film is bonded to one surface of the unit semiconductor element such that the bent portion of the wiring pattern and the electrode terminal of the unit semiconductor element are close to each other. 8. The method for manufacturing a semiconductor device according to claim 6, wherein the other surface of the insulating film forming the circuit film for the substrate is joined to the one surface of the unit semiconductor element by an adhesive. 9. An insulating film on which a wiring pattern is formed is joined to one surface of a semiconductor element with an adhesive, and a perforated hole in which a land portion of the wiring pattern is exposed on a bottom surface is formed on the insulating film. The method of manufacturing a semiconductor device according to claim 6, wherein the semiconductor device is formed. 10. The method for manufacturing a semiconductor device according to claim 6, wherein a circuit film for a connecting substrate in which a unit substrate circuit film corresponding to a unit semiconductor element is connected is used as the substrate circuit film. . 11. The method of manufacturing a semiconductor device according to claim 6, wherein a solder bump or a gold bump is used as a bump connecting the bent portion of the wiring pattern and the electrode terminal of the semiconductor element. 12. A wiring pattern which is joined to one surface side of a semiconductor element, has a connection part connected to an electrode terminal of the semiconductor element at one end, and has a land part to which an external connection terminal is mounted. A circuit film for a substrate formed on one surface side of an insulating film, wherein a connection portion of the wiring pattern is bent along a side end surface of the insulating film or an inner wall of a perforated hole. Characteristic circuit film for substrates. 13. The circuit film for a substrate according to claim 12, wherein the circuit film for a substrate is a circuit film for a connected substrate in which unit circuit films for the unit substrate corresponding to the unit semiconductor elements are connected.