JPH1012830A - Ferroelectric capacitor structure and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of deterioration due to annealing in a hydrogen gas atmosphere, by making an upper electrode layer in a lamination structure of an electrode layer and a conductive protective layer composed of oxide conductive material. SOLUTION: An upper electrode 8 has the lamination structure of an electrode layer 82 and a protective layer 81. The protective layer 81 is a layer protecting an inner ferroelectric layer 6 from reduction which is to be caused by hydrogen gas passing the electrode layer 82 at the time of heating in a hydrogen gas atmosphere, and composed of oxide conductive material. This material has conductivity, can constitute the electrode 8 of lamination structure when the lamination structure with the electrode layer 82 is formed, is oxide easy for reduction, and can protect the inner ferroelectric layer 6 from reduction by hydrogen gas because the material itself is reduced by the hydrogen gas. When the protective layer 81 is reduced, it acts as an electrode because it is changed to metal having conductivity. Thereby the protective layer 81 effectively functions as a protective electrode layer of the inner ferroelectric layer 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a ferroelectric capacitor structure used as a capacitor of a ferroelectric nonvolatile memory and a method of manufacturing the same.

[0002]

2. Description of the Related Art A ferroelectric memory is a non-volatile memory capable of high-speed rewriting utilizing high-speed reversal of polarization of a ferroelectric thin film and remanent polarization thereof. As a capacitor structure used in a ferroelectric memory, for example, the one shown in FIG. 5 is general. The capacitor 100 includes a lower electrode layer 103 composed of a platinum film or the like, a lead-based compound such as PZT, or SrBi ₂ T on an insulating layer 101 such as silicon oxide.
a ferroelectric layer 105 such as a ₂ O ₉ and an upper electrode layer 107 composed of a platinum film or the like are sequentially laminated;
Further, it has a structure covered with an insulating layer 109.

In a ferroelectric capacitor, a bias voltage is applied between an upper electrode 107 and a lower electrode 103 to cause dielectric polarization in the ferroelectric layer 105 and record information according to the direction of the polarization. That is, data writing and reading use a PE hysteresis loop of a ferroelectric as shown in FIG. When an external electric field is applied to the ferroelectric layer and then the external electric field is removed, the ferroelectric layer exhibits spontaneous polarization. In this case, the remanent polarization of the ferroelectric layer becomes + Pr when a positive external electric field is applied, and becomes -Pr when a negative external electric field is applied. Here, the remanent polarization is + P
In the state of r (point D), “0” is set, and the remanent polarization is −P
The state of r (point A) is set to “1”. “1”,
To determine the state of “0”, an external electric field in, for example, a positive direction is applied to the ferroelectric layer. At this time, if the data is “0”, the polarization of the ferroelectric layer changes from point D to point C. On the other hand, if the data is “1”, the polarization state of the ferroelectric layer changes from point A to point C via point B. When the data is "0", the polarization inversion of the ferroelectric layer does not occur, but when the data is "1", the polarization inversion occurs in the ferroelectric layer. As a result, a difference occurs in the amount of charge stored in the ferroelectric capacitor. This accumulated charge is detected as a signal current. Therefore, in a nonvolatile memory of the type that detects a change in the amount of charge stored in a ferroelectric capacitor, it is important to increase the remanent polarization ± Pr of the ferroelectric layer and maintain the state.

[0004]

However, after forming the capacitor of the ferroelectric nonvolatile memory, forming annealing is performed to recover the characteristics of the deteriorated transistor. This forming anneal is performed at a temperature of 420 to 450 ° C. and an atmosphere of 5% hydrogen + 95 nitrogen.
%, Time is about 1 hour. After this annealing, FIG.
From the initial state shown in (a), as shown in FIG.
r approach each other, and as shown in FIG. 8, the residual polarization value of the ferroelectric capacitor is 31% after forming annealing.
May also deteriorate. Therefore, it is necessary to prevent such deterioration of the characteristics of the ferroelectric capacitor.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a ferroelectric capacitor structure which does not deteriorate by annealing in a hydrogen gas atmosphere and a method of manufacturing the same.

[0006]

According to the present invention, there is provided a ferroelectric capacitor structure having a structure in which a lower electrode layer, a ferroelectric layer, and an upper electrode layer are laminated in this order.
Provided is a ferroelectric capacitor structure, wherein the upper electrode layer has a laminated structure of an electrode layer and a conductive protective layer made of an oxide conductive material.

In order to achieve the above object, the present invention provides a laminated structure of a lower electrode layer, a ferroelectric layer, and a reduction prevention layer made of an oxide conductive material and an electrode layer on an underlayer. A method of manufacturing a ferroelectric capacitor structure, comprising: a step of sequentially laminating upper electrode layers having the same; and a step of performing heat treatment in an atmosphere gas containing hydrogen gas.

The ferroelectric capacitor structure of the present invention has a laminated electrode structure of an electrode layer and a protective layer made of an oxide conductive material as an upper electrode layer. The oxide layer is placed in direct contact with the electrode layer from the viewpoint that the hydrogen gas reduces the ferroelectric layer inside through the upper electrode layer during the forming / annealing, which deteriorates the ferroelectric layer. By forming and reducing the oxide layer itself with hydrogen gas, the internal ferroelectric layer can be protected from hydrogen gas, and by selecting a conductive material as an oxide, a laminated electrode with an electrode layer can be formed. Have been found to be able to function as

Further, a compound having a rutile structure or a perovskite structure has conductivity, and even if reduced by hydrogen,
Since it has conductivity in the form of a metal and has conductivity in any of the oxide and reduced forms, an electrode structure having the function of a protective layer can be formed.

In the method for manufacturing a ferroelectric capacitor according to the present invention, since the laminated structure of the electrode layer and the protective layer is formed as the upper electrode, the ferroelectric layer is formed in the forming annealing after the upper electrode layer is formed. Is not reduced and deterioration can be prevented.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below, but the present invention is not limited to the following embodiments. 1 and 2 are cross-sectional views showing a form of a ferroelectric capacitor structure according to the present invention. The ferroelectric capacitor structure 1a shown in FIG. 1 has a structure in which a lower electrode layer 4, a ferroelectric layer 6, and an upper electrode layer 8 are sequentially stacked on a base layer 2 made of an insulating layer such as silicon oxide. , Upper electrode layer 8
Has a laminated structure of a protective layer 81 and an electrode layer 82 from the ferroelectric layer 6 side. This capacitor 1a is covered with an insulating layer 9. On the other hand, the ferroelectric capacitor structure 1 shown in FIG.
b indicates that the upper electrode layer 8 is formed from the ferroelectric layer 6 side to the electrode layer 82.
The structure is the same as the ferroelectric capacitor structure 1a in FIG.

As the underlayer 2, for example, silicon oxide, alumina, silicon nitride, NSG (Non-doped Silicate G)
lass), BPSG, BSG, semiconductor substrates such as silicon, and the like. The formation method of the underlayer can be formed by, for example, thermal oxidation of a substrate or a CVD method.
Further, the substrate itself may be used.

As the lower electrode layer 4, for example, platinum, platinum
Alloy, iridium (Ir), Ir0 _yEtc.
Can be. In addition, as the lower electrode layer 4,
As an adhesion layer to improve adhesion with silicon etc.
A Ti film or the like is interposed between the underlying layer 2 and the
A laminated electrode structure with a deposition layer can also be used. Of the electrode layer 4
The thickness is, for example, 100 to 200 nm, and the thickness of the adhesion layer is 2
It can be about 0 to 30 nm. Lower electrode layer, dense
The deposition layer is formed, for example, by a sputtering method, MOCVD (with
Metal CVD) or the like.

The type of ferroelectric is PbZr.
_{y Ti 1-y O 3,} PbTiO lead-based compounds such as _3, SrB
Bismuth-based layered structures such as i ₂ Ta ₂ O ₉ and Bi ₄ Ti ₃ O ₁₂ぺ lobskite type, Ba ₁ -z Sr _z TiO ₃ , Ba
MgF _{4 and the} like can be exemplified. These ferroelectrics can be obtained, for example, by MOD method using alkoxide as a raw material, CVD method.
After being deposited by a method, MOCVD, laser ablation, sputtering, or the like, it can be formed by annealing in an atmosphere containing oxygen as necessary. The thickness of the ferroelectric layer 6 is, for example, 200 to 300 nm.
Degree.

The upper electrode 8 is a feature of the present invention, and has a laminated structure of an electrode layer 82 and a protective layer 81. Electrode layer 82
Are platinum as with the electrode layer of the lower electrode 4, a platinum alloy, iridium (Ir), can be composed of Ir0 _y or the like.
The protective layer 81 is a layer that protects the internal ferroelectric layer 6 from being reduced by hydrogen gas passing through the electrode layer 82 when heated in a hydrogen gas atmosphere, and is made of an oxide conductive material. Is done. As the oxide conductive material, for example, an oxide containing an element of Group 8 element in the short period type periodic table can be mentioned, for example, RuO ₂ , IrO ₂ , OsO
Compounds of rutile structure such as _2, SrRuO _3, SrIrO
₃ , a compound having a perovskite structure such as ReO ₃ can be used. These oxides have conductivity and can form the electrode 8 having a laminated structure when the laminated structure with the electrode layer 82 is formed. Further, it is an oxide that is easily reduced, and itself is reduced by hydrogen gas, so that the internal ferroelectric layer can be protected from reduction by hydrogen gas. When the protective layer is reduced, it changes to a conductive metal, and thus functions as an electrode even when reduced. Therefore, it functions effectively as a protective electrode layer of the ferroelectric layer. Due to this function, as shown in FIG. 1, it may be arranged so as to be interposed between the electrode layer 82 and the ferroelectric layer 6.
Alternatively, as shown in FIG. 2, it may be arranged on the electrode layer 82. Note that IrO ₂ is also used as an electrode layer. Therefore, when IrO ₂ is used as a protective layer,
As the electrode layer, a platinum film or an Ir film is selected.

As a method of forming the oxide conductive material, for example, a laser ablation method, a sputtering method, an MOCV
The oxide conductive material layer can be directly formed by Method D. Also, a method of oxidizing a metal layer such as Ru, Ir, etc. by vapor deposition of a metal layer, for example, when annealing a ferroelectric film in an oxygen atmosphere, or by providing a separate oxidation step is also adopted. can do.

The thickness of the protective layer 81 depends on the protection of the ferroelectric layer 6.
Impact on the entire capacitor without losing its effect as a layer
In order to reduce as much as possible,
Preferably. The upper electrode 8 and the lower electrode 4
Each thickness and resistance should be as equal as possible
No. [Example 1] SiO of thermal oxide film on a high resistance silicon substrate
_TwoOf about 300 nm, and then sputtering
Ti and Pt as the lower electrode layers are respectively 30 nm and 20 nm.
0 nm was formed. On top of this, a ferroelectric B
i_TwoSrTa_TwoO₉Was formed to a thickness of 300 nm. After film formation, B
i_TwoSrTa_TwoO₉The crystallization temperature is 7 under oxygen atmosphere.
The temperature was set to 00 to 800 ° C. On top of this, an upper electrode
By sputtering, Ru is 50 nm and Pt is
Films were sequentially formed to a thickness of 100 nm to form a capacitor structure. So
After that, secondary annealing was performed in an oxygen atmosphere. This 2
After the next annealing, Ru of the upper electrode layer is oxidized and R
uO_TwoIt became. FIG. 3A shows the state of the capacitor at this time.
3 shows a ferroelectric hysteresis curve. Then, 420-4
5% H over a temperature range of 50 ° C_Two95% N_Two3 l / m of gas
Forming / annealing under the condition of flowing in flow rate
Was. Ferroelectric hysteresisker after forming annealing
The probe is shown in FIG. As is clear from FIG.
No deterioration in ferroelectric characteristics after forming / annealing
won. [Example 2] SiO of thermal oxide film on a high resistance silicon substrate
_TwoOf about 300 nm is formed by sputtering.
Ti and Pt, which are lower electrode layers, are successively deposited for 30 n each.
m, 200 nm. On this platinum film, MOD method
The ferroelectric Bi_TwoSrTa _TwoO₉300nm
did. At this time, Bi_TwoSrTa_TwoO₉The crystallization temperature of
The temperature was set to 700 to 800 ° C. in an oxygen atmosphere. On this
Further, Ir is added as an upper electrode layer by sputtering to a thickness of 5%.
0 nm and Pt are sequentially formed to a thickness of 100 nm to form a capacitor structure.
Then, secondary annealing was performed in an oxygen atmosphere.
After the second annealing, Ir of the upper electrode layer is oxidized.
And IrO_TwoIt became.

In the second embodiment also,
No degradation of ferroelectric properties after mining / annealing
Was. [Embodiment 3] SiO of thermal oxide film on high resistance silicon substrate
_TwoOf about 300 nm is formed by sputtering.
Ti and Pt, which are lower electrode layers, are successively deposited for 30 n each.
m, 200 nm. On this platinum film, MOD method
The ferroelectric Bi_TwoSrTa _TwoO₉300nm
did. At this time, Bi_TwoSrTa_TwoO₉The crystallization temperature of
The temperature was set to 700 to 800 ° C. in an oxygen atmosphere. On this
Further, Rh is set to 5 by a sputtering method as an upper electrode layer.
0 nm and Pt are sequentially formed to a thickness of 100 nm to form a capacitor structure.
Then, secondary annealing was performed in an oxygen atmosphere.
After the second annealing, Rh of the upper electrode layer is oxidized.
And RhO_TwoIt became.

In the third embodiment as well,
No degradation of ferroelectric properties after mining / annealing
Was. [Embodiment 4] Thermal oxide film of SiO on high resistance silicon substrate
_TwoOf about 300 nm is formed by sputtering.
Ti and Pt, which are lower electrode layers, are successively deposited for 30 n each.
m, 200 nm. On this platinum film, MOD method
The ferroelectric Bi_TwoSrTa _TwoO₉300nm
did. At this time, Bi_TwoSrTa_TwoO₉The crystallization temperature of
The temperature was set to 700 to 800 ° C. in an oxygen atmosphere. On this
Further, SrRu is formed by sputtering as an upper electrode layer.
O_Three50 nm and Pt 100 nm in order.
A second annealing in an oxygen atmosphere.
gave.

In the fourth embodiment as well,
No degradation of ferroelectric properties after mining / annealing
Was. [Embodiment 5] SiO of thermal oxide film on high resistance silicon substrate
_TwoOf about 300 nm is formed by sputtering.
Ti and Pt, which are lower electrode layers, are successively deposited for 30 n each.
m, 200 nm. On this platinum film, MOD method
The ferroelectric Bi_TwoSrTa _TwoO₉300nm
did. At this time, Bi_TwoSrTa_TwoO₉The crystallization temperature of
The temperature was set to 700 to 800 ° C. in an oxygen atmosphere. On this
Further, SrIr is formed as an upper electrode layer by sputtering.
O_Three50 nm and Pt 100 nm in order.
A second annealing in an oxygen atmosphere.
gave.

In the fifth embodiment also,
No degradation of ferroelectric properties after mining / annealing
Was. [Comparative Example] Thermal oxide film of SiO on high resistance silicon substrate_Two
Is formed into a film having a thickness of about 300 nm by a sputtering method.
Ti and Pt, which are lower electrode layers, are successively 30 nm each,
A 200 nm film was formed. On this platinum film, MOD method
Re ferroelectric Bi_TwoSrTa _TwoO₉Is deposited to a thickness of 300 nm.
Was. At this time, Bi_TwoSrTa_TwoO₉The crystallization temperature of acid is
The temperature was set to 700 to 800 ° C. in a raw atmosphere. Update on this
Pt was 10 Pt by sputtering as the upper electrode layer.
0 nm sequentially to form a capacitor structure, and then oxygen
Secondary annealing was performed in an atmosphere. Secondary annealing temperature
Was set to 700 to 800 ° C. in an oxygen atmosphere. FIG.
(A) shows the ferroelectric hysteresis of the capacitor at this time.
Indicate the Then, at a temperature range of 420 to 450 ° C., 5
% H_Two-95% N_TwoConditions for flowing gas at a flow rate of 3 l / min
Forming annealing was performed. Forming
Fig. 7 (b) shows the ferroelectric hysteresis curve after annealing.
Show. As is clear from FIG. 7, forming annie
The ferroelectric properties after the heating have deteriorated.

FIG. 8 is a diagram comparing the change in ferroelectric characteristics of the samples of Example 1 and the comparative example before and after forming annealing. The vertical axis in the figure is a value obtained by normalizing the residual polarization value of the ferroelectric capacitor with a value before forming annealing. From this figure, it is found that the remanent polarization value of the sample of the comparative example is reduced by 31% by the forming annealing, whereas the sample of the first embodiment does not deteriorate.

As described above, in the ferroelectric capacitor structure according to the present invention, by adopting a laminated structure of an electrode layer and a protective layer as the upper electrode layer, a structure in which the characteristics do not deteriorate even after forming annealing in hydrogen gas is obtained. It is recognized that it can be realized. If the characteristics do not deteriorate, the characteristic recovery process required so far can be omitted, which is very effective for improving the throughput.

The capacitor structure of the present invention can be applied to, for example, a capacitor of a ferroelectric nonvolatile memory. FIG. 4 is a cross-sectional view of one embodiment of a 1T / 1C nonvolatile memory. The nonvolatile memory 10 includes a selection transistor T in a region of the substrate 11 separated by the element isolation insulating film 21.
The capacitor Cap is formed while being separated from the substrate 11 via the interlayer insulating film 22, and the capacitor Cap is covered with the interlayer insulating film 23. The capacitor Cap includes a lower electrode layer 4 composed of a buffer layer 41 made of, for example, a Ti film and an electrode layer 42 composed of a platinum film, a ferroelectric layer 6,
And an upper electrode layer 8 having a laminated structure of a protective layer 81 and an electrode layer 82 is sequentially laminated. The lower electrode layer 4 is connected to the source 12 of the selection transistor Tr via the contact wiring 32, and the upper electrode 8 is connected to the plate line 33.
Is connected to Drain 1 of selection transistor Tr
Reference numeral 3 is connected to a bit line (not shown). The gate electrode 31 of the select transistor Tr forms a word line.

In the ferroelectric nonvolatile memory having such a structure, the characteristics of the capacitor do not deteriorate before and after the forming anneal for recovering the deterioration of the transistor. Therefore, a step of recovering the characteristics of the transistor is unnecessary. And the throughput is improved.

[0026]

According to the capacitor structure of the present invention, the characteristic of the capacitor is hardly deteriorated before and after the forming annealing for recovering the deterioration of the transistor.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating one embodiment of a capacitor structure of the present invention.

FIG. 2 is a sectional view showing another embodiment of the capacitor structure of the present invention.

FIG. 3 is a graph showing a ferroelectric hysteresis curve of a capacitor structure prepared in an example.
(B) shows the shape before annealing and the shape after annealing.

FIG. 4 is a sectional view showing an example in which the capacitor structure of the present invention is applied to a ferroelectric nonvolatile memory.

FIG. 5 is a sectional view showing a conventional capacitor structure.

FIG. 6 is a graph showing a hysteresis curve of a ferroelectric substance.

FIGS. 7A and 7B show hysteresis curves of a conventional ferroelectric capacitor structure, wherein FIG. 7A shows a state before forming annealing and FIG. 7B shows a state after forming annealing.

FIG. 8 is a graph in which a remanent polarization value of a ferroelectric capacitor structure is normalized by a value before forming / annealing.

[Explanation of symbols]

1a, 1b: ferroelectric capacitor, 2: base layer, 4: ferroelectric layer, 81: protective layer, 82: electrode layer, 8: upper electrode layer

Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical display location H01L 21/8247 29/788 29/792

Claims (6)

[Claims] 1. A ferroelectric capacitor structure having a structure in which a lower electrode layer, a ferroelectric layer, and an upper electrode layer are stacked in this order, wherein the upper electrode layer is made of a conductive material comprising an electrode layer and an oxide conductive material. A ferroelectric capacitor structure having a laminated structure with a protective layer. 2. The ferroelectric capacitor structure according to claim 1, wherein said oxide conductive material is a compound having a rutile structure or a compound having a perovskite structure. 3. The ferroelectric capacitor structure according to claim 1, wherein the oxide conductive material is an oxide of an element containing a Group 8 element in the short-periodic periodic table. 4. The ferroelectric capacitor structure according to claim 1, wherein the ferroelectric layer has a layered structure in which a perovskite crystal structure is sandwiched by a layer of bismuth oxide. 5. A lower electrode layer, a ferroelectric layer,
And a step of sequentially laminating an upper electrode layer having a laminated structure of a reduction prevention layer made of an oxide conductive material and an electrode layer, and a heat treatment step in an atmosphere gas containing hydrogen gas. A method for manufacturing a dielectric capacitor structure. 6. A lower electrode layer, a ferroelectric layer,
And a step of sequentially laminating an upper electrode layer having a laminated structure of a metal film and an electrode layer, and heating in an atmosphere containing oxygen to crystallize the ferroelectric layer and simultaneously oxidize the metal film to prevent the reduction prevention layer Forming a ferroelectric capacitor structure, and performing a heat treatment in an atmosphere gas containing hydrogen gas.