JPH10126180A - Agc circuit and ic circuit using the agc circuit and transmission device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent overcorrect and to improve the frequency characteristic in an entire range of variable gains by adding a current correction control differential amplifier and a constant current source to a gain control differential amplifier to supply the collector current of a fixed level or higher. SOLUTION: A signal input differential amplifier, consisting of transistors TRs 1 and 2 and a gain control differential amplifier consisting of TRs 3, 4, 5 and 6 have their conventional constitutions. Then a current correction control differential amplifier consisting of TRs 12, 13 and 14 is connected to every emitter of TRs 3, 4, 5 and 6, and the constant current sources 8 and 8 are connected to the emitters of TRs 12, 13, 14 and 15 respectively. The inverted gain control TR input signals, corresponding to each of TRs of the current correction control differential amplifiers are inputted to these TRs. In such a constitution, the collector current I2 of the TR 3 is set at 2∼Ia, even when a gain control signal 102 is minimized. As a result, the frequency characteristic of the TR 3 does not deteriorate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to an AGC (Auto
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology for improving the frequency characteristics of a gain control (GC) circuit, and more particularly to a technology for improving the frequency characteristics of an AGC circuit used in a transmission device or the like.

[0002]

2. Description of the Related Art In recent years, with an increase in the speed of signal transmission, it has become essential to increase the speed of a transmission device for transmitting a signal and an IC in the device.

The speeding up of an IC can be realized by using a high-speed process. However, since the frequency characteristics of a circuit depend on the circuit scale and the circuit configuration, even if a high-speed process is used depending on the circuit configuration, the frequency characteristics are poor. In some cases, the speed cannot be increased.

Therefore, it is important how to design a high-speed circuit configuration.

AGC provided inside a conventional transmission device
FIG. 4 shows an example of the circuit.

FIG. 4 shows transistors 1, 2 serving as a differential amplifier, a constant current source 7, transistors 3-6 serving as a gain controlling differential amplifier, an input signal 101, and a gain control signal 1.
02.

The principle of the AGC circuit will be described briefly.

The current flowing through the constant current source 7 is 4 · I, and the current change of the transistors 1 and 2 with respect to the input signal 101 is i
If (i = −I to + I), the constant current source 7 is connected to the transistors 1 and 2, and a current change i (i = −I to + I) occurs in each transistor. I1 is I1 = 2
(I + i), the collector current (not shown) flowing through the transistor 2 can be expressed as 2 · (I−i).

Next, assuming that the rate of change of the current with respect to the gain control signal 102 is k (k = −1 to +1), the collector terminal of the transistor 1 is connected to the transistor 3 and the transistor 4
And each transistor has (1 + k) / 2
Since a current twice as large flows, the collector current I2 flowing through the transistor 3 is I2 = (1 + k). (I + i), and the collector current flowing through the transistor 4 (not shown) is (1--
k) · (I + i), the collector current flowing through the transistor 5 (not shown) is (1-k) · (I−i), and the collector current flowing through the transistor 6 (not shown) is (1+
k) · (I-i).

Therefore, the current I4 flowing through the load resistor 10
Is the collector current I2 of the transistor 3 = (1 + k).
(I + i) and the collector current of the transistor 5 (not shown) (1-k) · (I−i), respectively.
I4 = 2 (I + ki).

The change i4 of the current I4 flowing through the load resistor 10 with respect to the input signal is i4 = 2 · ki · (2 · I
Is a constant current value).
The C circuit can amplify the input signal 101 based on the value of k generated by the control signal 102 and control the output signal to a predetermined output voltage value.

That is, the conventional AGC circuit inputs the gain control signal 102 to the base of each of the transistors 3 to 6 serving as a gain control differential amplifier, and adjusts the collector current I2 and the like of each of the transistors so as to adjust the output voltage. Control the value.

[0013]

SUMMARY OF THE INVENTION In a conventional AGC circuit,
As described above, the gain control is performed by suppressing the collector current of the transistor. When the gain is maximum (k = 1), the collector current I2 becomes the maximum value 2 (I + i), and the frequency characteristics are secured. In the case of (k = -1), the collector current I2 becomes a value close to the minimum value 0, so that the frequency characteristics deteriorate.

This is because the frequency characteristics of a transistor depend on its collector current, and a small collector current deteriorates the frequency characteristics.

Therefore, when the gain is reduced, the AGC circuit cannot operate at high speed.

In this case, it is conceivable to add a constant current source to each transistor of the gain control differential amplifier to secure a collector current required for high-speed operation. Since the collector current at this time becomes an overcurrent, the frequency characteristics of the transistor are degraded and a desired high-speed operation is hindered.

It is an object of the present invention to provide an AGC for the entire variable gain range.
The purpose is to speed up the circuit. That is, an object is to improve the frequency characteristics at the minimum gain, prevent overcurrent at the maximum gain, and speed up the AGC circuit over the entire variable gain range.

Another object of the present invention is to increase the speed of an IC circuit and a transmission device by applying the above-mentioned AGC circuit.

[0019]

In order to achieve the above object, the present invention provides a first differential amplifier operated by an input voltage; a constant current source connected to the first differential amplifier; An AGC circuit including a second and a third differential amplifier for controlling a current from a constant current source flowing through a first differential amplifier to output a predetermined output voltage, wherein the second and third differential amplifiers Fourth and fifth differential amplifiers for supplying a predetermined current to the transistors of the three differential amplifiers are provided.

That is, the transistors included in the fourth and fifth differential amplifiers (current correction differential amplifiers) are replaced by the transistors included in the second and third differential amplifiers (gain control differential amplifiers). By supplying the collector current, the collector current flowing through the transistors of the second and third differential amplifiers (the differential amplifier for gain control) is set to 2 · Ia when the gain is minimum to 2 · (I + i) when the gain is maximum, It secures current when the gain is minimum and prevents overcurrent when the gain is maximum.

In this case, the collector currents of the transistors of the fourth and fifth differential amplifiers (current correction differential amplifiers) are obtained by subtracting the current Ia from the separately provided constant current source from the second and third differential amplifiers. Like the amplifier (differential amplifier for gain control), (1 ±
k) Use the one that has been doubled.

Further, another object of the present invention is to provide a first differential amplifier operating by an input voltage, a constant current source connected to the first differential amplifier, and a first differential amplifier connected via the first differential amplifier. The second and third differential amplifiers that output a predetermined output voltage by controlling the current flowing from the constant current source that flows through the second and third differential amplifiers have a predetermined current. An AGC circuit including fourth and fifth differential amplifiers to be supplied, a peak holding circuit for holding the output voltage value of the AGC circuit, and an amplifier circuit for amplifying the output voltage value held by the peak holding circuit. This is achieved by negatively feeding back the amplified output voltage value from the amplifying circuit to the inputs to the second and third differential amplifiers of the AGC circuit. An IC circuit that maintains a constant value can be realized.

Alternatively, a preamplifier for converting an optical signal sent via a transmission line into an electric signal, a first differential amplifier operated by the electric signal converted by the preamplifier, and the first differential amplifier A constant current source connected to the first and second differential amplifiers that output a predetermined output voltage by controlling the current from the constant current source flowing through the first differential amplifier; And an AGC circuit including fourth and fifth differential amplifiers for supplying a constant current to a transistor included in the third differential amplifier, and a digital circuit that operates based on an output signal of the AGC circuit. This makes it possible to cope with high speed.

In this case, the output signal from the AGC circuit includes a peak holding circuit for holding the amplitude value of the output voltage of the AGC circuit, and an amplifier circuit for amplifying the output voltage value held by the peak holding circuit. The output voltage can be kept constant by making a negative feedback to the inputs to the second and third differential amplifiers of the AGC circuit via the AGC circuit.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings.

FIG. 1 shows an example of an AGC circuit according to the present invention.

Transistors 1 and 2 serving as differential amplifiers, and transistors 3, 4, 5 serving as differential amplifiers for gain control,
6, constant current sources 7, 8, load resistors 10, 11, input signal 1
01, a gain control signal 102, transistors 12, 13, 14, and 15 serving as a current correction control differential amplifier, and a rectifying diode 9.

The transistors 12 to 15 serving as current correction control differential amplifiers constitute two current correction control differential amplifiers, each of which is provided with a constant current source 8.

Current correction control transistors 12 to 15
Are transistors 3 of the gain control differential amplifier, respectively.
The collector terminal of the transistor of the differential amplifier for current correction control is connected to the emitter terminal of the transistor of the differential amplifier for gain control.

A gain control signal 102 is input to the base terminals of the transistors 12 to 15 of the current correction control differential amplifier. For example, the gain signal 102 input to the transistor 12 corresponds to the transistor 3
, A signal obtained by inverting the gain signal 102 is input.

The current flowing through the transistors 12 to 15 of the differential amplifier for current correction control is equal to (1) of the current flowing through the constant voltage source 7 or the constant voltage source 8 as in the case of the transistors 3 to 6 of the gain control differential amplifier. ± k) / 2 times, and k changes in response to the gain control signal 102.

The rectifier diode 9 applies the current flowing from the constant current source 8 to the transistors 3 to 6 of the gain control differential amplifier and the transistors 12 to 15 of the current correction control differential amplifier in a 1: 1 ratio. It is provided to respond.

Next, the operation principle of the AGC circuit shown in FIG. 1 will be described.

The current flowing through the constant current source 7 is 4 · I, and the current change of the transistors 1 and 2 with respect to the input signal 101 is i
If (i = −I to + I), the constant current source 7 is connected to the transistors 1 and 2, and a current change i (i = −I to + I) occurs in each transistor. I1 is I1 = 2 · (I
+ I), the collector current (not shown) flowing through the transistor 2 can be expressed as 2 · (I−i).

Next, the current flowing through the constant current source 8 is 2 · I
a, the change rate of the current with respect to the gain control signal 102 is k
If (k = −1 to +1), the constant current source 8 is connected to the transistor 12 and the transistor 13, and a current of (1 + k) / 2 times flows through each transistor. I3 = (1-
Similarly, the collector current (not shown) flowing through the transistor 13 is (1 + k) · Ia, and the collector current (not shown) flowing through the transistor 14 is (1)
+ K) · Ia and the collector current (not shown) flowing through the transistor 15 can be expressed as (1−k) · Ia.

As for the gain control transistors 3 to 6, the collector terminal of the transistor 12 and the collector terminal of the transistor 1 are connected to the emitter terminals, and (1 + k) / 2 times (1-
k) / 2 times the current flows, so that the collector current I2 flowing through the transistor 3 is I2 = (1 + k) · (I + i)
+ (1-k) · Ia, and similarly, the transistor 4
(1 + k) · (I
+ I) + (1 + k) · Ia, and the collector current (not shown) flowing through the transistor 5 is (1-k) · (I + i) +
(1 + k) · Ia, the collector current (not shown) flowing through the transistor 6 is (1−k) · (I + i) + (1−k)
-It can be expressed as Ia.

At this time, the collector current of the transistors 4 and 5 is reduced by the rectifying diode 9 to the transistors 12 and 15.
And the collector currents of the transistors 3 and 6 do not flow to the transistors 13 and 14.

Therefore, the current I4 flowing through the load resistor 10
Is the collector current I2 of the transistor 3 = (1 + k).
(I + i) and the collector current of the transistor 5 (not shown) (1-k) · (I−i), respectively.
I4 = 2 (I + k.i + Ia).

The change i4 of the current I4 flowing through the load resistor 10 with respect to the input signal is i4 = 2 · ki · (2 · ki
I, 2 · Ia is a constant current value), the AGC circuit of the present invention amplifies the input signal 101 based on the value of k generated by the control signal 102 and controls the input signal 101 to a predetermined output voltage value. can do.

When the gain control signal 102 is maximum (k = + 1), the current I2 flowing through the transistor 3 becomes I2
2 = 2 · (I + i), the maximum current flows through the load resistor 10, and the circuit operates as a normal differential amplifier (the current of the transistor 6 is also 2 · (I + i), and the current of the transistors 4 and 5 is Is 2 · Ia). The gain of the circuit at this time is equal to the gain of the differential amplifier, and this is the maximum gain.

Further, by decreasing the value of the gain control signal 102, the collector current of the transistor 3 and the current flowing through the load resistance decrease, and the voltage drop at the load resistance 10 decreases, so that the gain decreases. When the gain is minimum, that is, when the gain control signal 102 is minimum (k = −
1) The current I2 flowing through the transistor 3 is I2 = 2 ·
Ia, and the minimum current flows through the load resistor 10 (the current of the transistor 6 is also 2 · Ia, and the current of the transistors 4 and 5 is 2 · (I + i)).

As described above, the gain control transistor 3,
Since a collector current of 2 · Ia or more always flows through 4, 5, and 6, the frequency characteristics when the gain is minimum can be improved. Thus, high-speed circuit operation can be performed even when the gain is minimum.

Also, even when the gain is maximum, the transistor is operated by the collector current of 2 · (I + i) which is equivalent to that of the conventional AGC circuit, so that the collector current does not become an overcurrent.

As a result, the frequency characteristic in the entire range of the variable gain can be improved and the speed of the AGC circuit can be increased.

Next, FIG. 2 shows an IC circuit according to the present invention.

FIG. 2 includes an AGC circuit 20, a peak holding circuit 21, an amplifier circuit 22, an input signal 101, a gain control signal 102, and an output signal 103. Note that the circuit shown in FIG. 1 is used for the AGC circuit 20.

The peak holding circuit 21 holds the amplitude value of the output signal 103 amplified by the AGC circuit 20.

The amplifying circuit 22 amplifies the amplitude value of the output signal held by the peak circuit 20 and provides a negative feedback as a gain control signal of the AGC circuit 20.

As described above, the output signal 103 of the AGC circuit is negatively fed back as its gain control signal. When the amplitude of the output signal 103 of the AGC circuit 20 is large, the gain control signal 102 is small and the amplitude of the output signal 103 is small. At times, by controlling the gain control signal 102 to be large, an output signal 103 having a constant amplitude can be obtained. This converts the output signal 103 of the AGC circuit into the peak holding circuit 21,
What is necessary is just to invert the signal through the amplifier circuit 22 and use the inverted signal as the gain control signal of the AGC circuit.

Thus, the input signal 101 of the AGC circuit 20
Output signal 10 with high speed and constant amplitude even if the amplitude of
3 can be transmitted.

Next, FIG. 3 shows a transmission apparatus according to the present invention.

FIG. 3 shows an AGCIC circuit 32, a transmission line 30,
It comprises a preamplifier 31 and a digital circuit 33. The AGCIC circuit 32 has, for example, the configuration shown in FIG.

The transmission line 30 transmits, for example, an optical signal.
The preamplifier 31 converts a transmitted optical signal into an electric signal. The AGC IC circuit 32 outputs the input signal as an output signal having a predetermined amplitude. The digital circuit 33 performs predetermined processing and outputs the result.

In such a configuration, the operation is as follows.

First, an optical signal is input to the transmission device via the transmission line 30, and the input optical signal is converted into an electric signal by the preamplifier 31. The length of the transmission line 30 is arbitrarily determined by a user who uses the transmission line 30, and the amount of signal attenuation changes accordingly. Accordingly, since the amplitude of the input signal also changes, the output amplitude is made constant by changing the gain for an arbitrary input signal by the AGCIC. Note that the digital circuit 33 normally operates with respect to a signal having a constant amplitude, and malfunctions unless the reference value is satisfied. Although the operating speed of the transmission device is determined by the frequency characteristics of each circuit, the frequency characteristics of the AGCIC 32 in the input section are particularly important.

In the transmission apparatus, since the AGCIC 32 has improved frequency characteristics in the entire range of the variable gain, high-speed operation becomes possible, and high-speed operation of the transmission apparatus can be realized.

That is, in a transmission device that requires high-speed operation, frequency characteristics from the minimum gain to the maximum gain of the AGCIC 32 are ensured, so that a signal having almost constant amplitude can be transmitted to the digital circuit 33. The digital circuit 33 does not malfunction. That is, a transmission device using the present AGCIC can operate at high speed without malfunction.

[0058]

As described above, according to the present invention, it is possible to reduce the AG in the entire variable gain range.
High-speed C circuits, IC circuits, and transmission devices can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an AGC circuit with improved frequency characteristics according to an embodiment of the present invention.

FIG. 2 is a circuit configuration diagram of an AGCIC according to an embodiment of the present invention, in which frequency characteristics are improved and output amplitude is kept constant.

FIG. 3 is a configuration diagram of a transmission apparatus according to an embodiment of the present invention, in which the frequency characteristics are improved and the output amplitude is kept constant.

FIG. 4 is a circuit configuration diagram of a conventional AGC circuit.

[Explanation of symbols]

1, 2,... Transistors for differential amplifier, 3, 4, 5, 6,.
Gain control transistors 7, 8, constant current source 9, rectifier diode 10, 11, collector resistance, 12, 1
3, 14, 15 ... current correction control transistors, 20 ...
AGC circuit, 21: peak holding circuit, 22: amplifier circuit,
30: transmission line, 31: preamplifier IC, 32: AGCI
C, 33: digital circuit, 101: input signal, 102
... Gain control signal, 103 ... Output signal

Claims (4)

[Claims] 1. A first differential amplifier operating by an input voltage, a constant current source connected to the first differential amplifier, and a current from a constant current source flowing through the first differential amplifier. And an AGC circuit comprising a second and a third differential amplifier for outputting a predetermined output voltage by supplying a predetermined current to a transistor of the second and third differential amplifiers. An AGC circuit comprising a fourth and a fifth differential amplifier. 2. A first differential amplifier operating by an input voltage, a constant current source connected to the first differential amplifier, and a current from the constant current source flowing through the first differential amplifier. Controlling the second and third differential amplifiers to output a predetermined output voltage, and supplying a predetermined current to the transistors of the second and third differential amplifiers. An IC circuit comprising: an AGC circuit including a differential amplifier; a peak holding circuit that holds an output voltage value of the AGC circuit; and an amplifier circuit that amplifies the output voltage value held by the peak holding circuit. An IC circuit characterized in that the amplified output voltage value from the amplifier circuit is negatively fed back to the inputs to the second and third differential amplifiers of the AGC circuit. 3. A preamplifier for converting an optical signal transmitted via a transmission line into an electric signal, a first differential amplifier operated by the electric signal converted by the preamplifier, and the first differential amplifier A constant current source connected to the first and second differential amplifiers that output a predetermined output voltage by controlling the current from the constant current source flowing through the first differential amplifier; An AGC circuit including fourth and fifth differential amplifiers for supplying a predetermined current to a transistor included in the third differential amplifier, and a digital circuit operating based on an output signal of the AGC circuit. A transmission device, comprising: 4. An output signal from the AGC circuit is supplied to the AGC circuit.
Second and third differential amplifiers of the AGC circuit via a peak holding circuit for holding the amplitude value of the output voltage of the GC circuit, and an amplifier circuit for amplifying the output voltage value held by the peak holding circuit 5. The transmission device according to claim 4, wherein the input is fed back negatively.