JPH10126176A - Transmission circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify and miniaturize a transmission circuit device by preparing a power amplifier circuit which amplifies the signals transmitted via a transmission line and a branch line, consisting of only a passive element which sets free the signal of a prescribed level from a signal line. SOLUTION: An FET(field effect transistor) 108 included in a signal line controls the gains from a signal input terminal 101 through a signal output terminal 102. A matching circuit 111 consists of the passive elements such as a capacitor, an inductor, etc., to operate for impedance matching of signals to be transmitted to the terminal 102 from the terminal 101, when the FET 108 is turned on by the voltage supplied from a power control terminal 104 and then to operate for the impedance matching of an attenuator and a path that makes the cut electric power fore from the signal line to GND, when the FET 108 is turned off respectively. Thus, the electric power can be controlled in a matched state, and a simple and compact circuit is available with a small chip area in comparison to the use of an active circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission circuit device used for adjusting the gain of a high-frequency circuit whose transmission power fluctuates.

[0002]

2. Description of the Related Art In radio communication such as cellular communication, a signal level changes every moment due to a change in a distance between a base station and a mobile station (a terminal such as a mobile phone) or an effect of fading in a transmission path. ing. In general, the terminal absorbs the fluctuation of the level of the received signal that fluctuates by a gain adjusting means such as an amplifier or an attenuator that can adjust the gain, adjusts the level to a constant level, and transmits the signal to the demodulator. Like that.

In transmission, in order to supply a signal of a fixed level to a base station, a signal is adjusted to a desired level by a similar gain adjusting means and then transmitted as a signal output of a terminal.

[0004] These gain adjustments are generally performed when the signal level is low. It is technically simpler to increase the signal level and then attenuate the signal level. However, this causes a large power loss, and is not suitable for a device such as a portable terminal that wants to reduce power consumption as much as possible. Therefore, the gain adjustment on the transmission side is performed between the output of the baseband signal and the input of the auxiliary power amplifier (driver amplifier).

FIG. 7 is a block diagram illustrating a conventional example. In this transmission circuit device, a signal sent from an IF block 708 having a frequency mixer 701 is converted into a variable attenuator (valve attenuator) in an RF block 709.
702, the matching circuit 703, the auxiliary power amplifier 7
04, a matching circuit 705, and a power amplifier 706 to output from an antenna 707.

FIG. 8 is a circuit diagram illustrating a conventional example, and shows the configuration of a variable attenuator applied to the transmission circuit device shown in FIG. That is, the signal transmission path between the terminals 801 and 802 is turned on / off by the transistor 808 operating based on the voltage from the power adjustment terminal 804 to perform power adjustment, and the transistor 816 in the branch path connecting the signal transmission path and GND is connected. Are turned on / off by the reverse operation of the transistor 808 based on the voltage from the power adjustment terminal 804 to adjust the input / output matching to 50Ω. In this circuit, the electric capacitances 805, 810, 813, 818 are DC cut, so that the electric resistances 806, 809, 811, 812,
Reference numerals 814 and 817 are provided for impedance adjustment.

[0007]

However, a variable attenuator used in such an RF block must have low distortion and have input and output terminals matched to, for example, 50Ω. For this reason, the circuit constant is relatively large, the chip area is large for the function, and the integration ratio with another IC (for example, integration with an auxiliary power amplifier) is hindered. Further, it is disadvantageous in cost as compared with a discrete using a PIN diode. For example, the general problem of integration in the circuit shown in FIG.
The electric capacity 805, 810, 813,
818 is large, and the gate width of the transistors 808 and 816 is large to reduce distortion. This is a factor that hinders miniaturization of devices such as portable terminals that need to adjust the gain of transmission power.

[0008]

SUMMARY OF THE INVENTION The present invention is a transmission circuit device made to solve such a problem. That is, the present invention provides at least one transistor arranged in a signal line for gain adjustment from an input terminal to an output terminal, and a branch for releasing a signal of a predetermined level from the signal line based on the operation of the transistor. A transmission circuit device comprising a line and a power amplification circuit that amplifies a signal transmitted through the transmission line without escaping to the branch line,
This branch line is composed of only passive elements.

In the present invention, since the branch line for performing the gain adjustment is composed only of the passive elements, the circuit configuration is simpler than the case where the active elements are provided, and the power adjustment can be performed while maintaining the matching. . That is, when at least one transistor disposed in the signal line is ON, the branch line formed by the passive element operates as a matching circuit, and when the transistor is OFF, the power cut off by this transistor is used. This works as a matching circuit for a line and an attenuator that escape from the transmission line to GND or the like.

[0010]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a transmission circuit device according to the present invention. FIG. 1 is a circuit diagram (part 1) illustrating a transmission circuit device according to the present embodiment. This circuit includes a transistor 108 composed of an FET (field effect transistor) provided in a signal line for the purpose of gain adjustment from a signal input terminal 101 to a signal output terminal 102 and a signal of a predetermined level by the operation of the transistor 108. Matching circuit 111 to escape
And

The present embodiment is characterized in that the matching circuit 111 is entirely constituted by passive elements. In this circuit, the electric capacitances 105 and 110 are DC cut.
The electric resistors 106 and 109 are provided for impedance adjustment.

The matching circuit 111 is composed of passive elements such as an electric capacity and an inductor,
When the transistor 108 is turned on by the voltage from the power supply terminal 4 (potential difference from the power adjustment terminal 103), the signal input terminal 1
01 operates for impedance matching in signal transmission from the signal output terminal 102 to the signal output terminal 102. When the transistor 108 is turned off, the path cut off by the transistor 108 from the signal line to GND and the impedance matching of the attenuator are performed. Work for.

As described above, by configuring the matching circuit 111 only with passive elements, power adjustment can be performed with a simpler circuit than with the case of using active elements while maintaining the matching. By forming the semiconductor substrate of gallium arsenide or the like on a semiconductor substrate, the chip area can be reduced and integration with other circuits can be easily performed.

FIG. 2 is a circuit diagram (part 2) for explaining the transmission circuit device of the present embodiment. In this transmission circuit device, as an application of the circuit shown in FIG. 1, a matching circuit 206 composed of a passive element is arranged between a power source having low impedance (here, a power adjustment terminal 203) and a transmission path. In this circuit, the electric capacitances 205 and 210 are DC
For cutting, the electric resistance 209 is provided for impedance adjustment.

The operation is the same as that of the example shown in FIG. 1. When the transistor 208 is turned on by the voltage from the power adjustment terminal 204 (potential difference from the power adjustment terminal 203), the signal is sent from the signal input terminal 201 to the signal output terminal 202. When the transistor 208 is turned off, the transistor 208 operates for impedance matching of the path cut off by the transistor 208 from the signal line to the power adjustment terminal 203 and the attenuator. .

As shown in FIG. 1 and FIG.
11 and 206 may be connected to GND or connected to a power source with low impedance.

FIG. 3 is a circuit diagram for explaining the first embodiment, which realizes integration (integration) of a variable amplifier and an auxiliary amplifier by applying the circuit shown in FIG. In the circuit diagram shown in FIG. 3, the variable amplifier includes a first matching circuit 305, a second matching circuit 315, and a third matching circuit 31.
6. Transistors 309 and 31 arranged in series on the transmission line from signal input terminal 301 to signal output terminal 302
1. Electric capacitances 306 and 313 for DC cut, and electric resistances 307 and 312 for impedance adjustment
Consists of In the first embodiment, the variable amplifier and the auxiliary amplifier 314 are integrated.

In this circuit, two-stage transistors 309 and 311 are arranged in the transmission line in order to increase the power adjustment range, and GND corresponding to each transistor 309 and 311 is provided.
The two-stage matching circuits 315 and 316 are arranged to release the signal. Note that two or more stages of transistors and matching circuits can be arranged to further increase the power adjustment range.

The operation of the circuit is substantially the same as that of the transmission circuit device shown in FIG. 1, and the voltage of the power adjustment terminal 304 (the potential difference from the power adjustment terminal 303) causes the transistor 30 to operate.
When 9 and 311 are turned on, the matching circuits 305 and 31
5, 316 are from the signal input terminal 301 to the signal output terminal 30
When the transistors 309 and 311 are turned off, the matching circuits 315 and 316
It operates for the path for allowing the power cut off at 9 and 311 to escape from the signal line to GND and the impedance matching of the attenuator.

In particular, in this circuit, the value (capacity) of the electric capacitance 306 can be reduced by performing matching by three matching circuits 305, 315, and 316 each including a passive element, and the auxiliary amplifier 314 is integrated. by doing,
The matching at the electric capacitance 313 becomes unnecessary, and the value (capacity) can be reduced.

As described above, the matching circuits 301, 315, 3
By using a passive element as 16, the circuit can be simplified as compared with the case of using an active element, and the electric capacity in other parts can be reduced, and the area for forming the circuit can be reduced. .

FIG. 4 is a circuit diagram showing a specific example of the first embodiment shown in FIG. 3, and is mainly applied when transmitting a 935 MHz signal. That is, the first matching circuit 428, the second matching circuit 429, and the third matching circuit 430 shown in FIG. 4 correspond to the first matching circuit 305, the second matching circuit 315, and the third matching circuit shown in FIG. 316, and the transistors 412, 414 shown in FIG. 4 respectively correspond to the transistors 309, 311 shown in FIG. Also,
The auxiliary amplifier 431 shown in FIG.
Corresponds to 14.

Further, the capacitances 409 and 41 shown in FIG.
6 respectively correspond to the electric capacitances 306 and 313 shown in FIG.
The electric resistances 410, 411, 413, and 415 shown in FIG. 4 correspond to the electric resistances 307, 308, 310, and 312 shown in FIG.

In the specific example shown in FIG. 4, the first matching circuit 4
28 includes an inductor 407 and an electric resistor 408, a second matching circuit 429 includes an electric capacitance 417 and an inductor 418, and a third matching circuit 430 includes an electric capacitance 419 and an inductor 420. .

The auxiliary amplifier 431 includes transistors 422 and 425, electric capacitances 423 and 426, and electric resistances 421, 424 and 427, and is based on voltages from a gate bias terminal 405 and a drain bias terminal 406. Perform signal amplification.

The operation of the circuit is the same as that of the transmission circuit device shown in FIG.
When 14 turns ON, matching circuits 428, 429, 430
Operates for impedance matching in signal transmission from the signal input terminal 401 to the signal output terminal 402, and when the transistors 412 and 414 are turned off, the matching circuit 4
29, 430 operate for a path for allowing the power cut off by the transistors 412, 414 to escape from the signal line to GND and for impedance matching of the attenuator.

In particular, in this circuit, the value (capacity) of the electric capacitance 409 can be reduced by performing matching by three matching circuits 428, 429, and 430 each including a passive element, and the auxiliary amplifier 431 is integrated. by doing,
The capacitance 416 is the transistor 42 of the auxiliary amplifier 431.
2 is sufficient, and it is not necessary to match to 50Ω, and the value (capacity) can be reduced.

FIG. 5 is a diagram showing a characteristic simulation result in the transmission circuit device in FIG. Vgs on the horizontal axis in this figure is the voltage (potential difference between the power adjustment terminals 404 and 403) applied from the power adjustment terminal 404 to the gates of the transistors 412 and 414 shown in FIG. 4, and the vertical axis on the left is the gain (Gain) for Vgs. ), The vertical axis on the right is Vgs
Is shown as a voltage standing wave ratio (VSWR). From this simulation result, the fluctuation of VSWR from the minimum value to the maximum value of the gain is small (1.2 to 1.6),
It can be seen that matching is achieved.

FIG. 6 is a circuit diagram showing a specific example of the second embodiment. The transmission circuit device according to the second embodiment is mainly applied when transmitting a 1441 MHz signal.

In this circuit, two transistors 614 and 616 provided in series in the transmission path from the signal input terminal 601 to the signal output terminal 602 and the first matching circuit 63
4, in addition to the second matching circuit 635 and the third matching circuit 636, a transistor 624 which performs a switching operation for releasing a signal from the transmission path from the signal input terminal 601 to the signal output terminal 602 to GND is provided. The electric capacitances 611, 621, 618, and 626 are provided for DC cut, and the electric resistances 612, 617, 622, and 625 are provided for impedance adjustment.

The first matching circuit 634 includes an inductor 609
And a second matching circuit 63
5 includes an electric capacity 619 and an inductor 620, and the third matching circuit 636 includes an electric capacity 627 and an inductor 628.

The auxiliary amplifier 637 is connected to the first amplifier shown in FIG.
It has a circuit configuration similar to that of the embodiment, and includes transistors 630 and 633, electric capacitances 631 and 638, electric resistances 629, 632, and 639. The voltage from the gate bias terminal 605 and the drain bias terminal 606 The signal is amplified based on the signal.

The operation of the circuit is as follows.
Transistors 614 and 616 are turned on by the voltage from
, The transistor 624 is turned off by the voltage from the power adjustment terminal 607, and the matching circuits 634, 6
35 and 636 are from the signal input terminal 601 to the signal output terminal 6
02 operates for impedance matching in the signal transmission to the signal transmission circuit 02. When the transistors 614 and 616 are turned off, the transistor 624 is turned on and the matching circuit 635,
636 operates for a path for allowing the power cut off by the transistors 614 and 616 to escape from the signal line to GND and impedance matching of the attenuator.

In particular, in this circuit, since the frequency of the signal flowing through the transmission path is as high as 1441 MHz, the transistor 6
When the transistors 14 and 616 are ON, the transistor 62
4 is turned OFF, the branch line connected from the transmission path to GND is reliably cut off, and the signal is efficiently transmitted to the auxiliary amplifier 637.
To be sent to

Also in the circuit configuration of the second embodiment, the value (capacity) of the electric capacitance 611 can be reduced by performing matching in each of the matching circuits 634, 635, and 636.
Further, by integrating the auxiliary amplifier 637, the electric capacity 618 may be a capacity enough to match the transistor 630 of the auxiliary amplifier 637, and it is not necessary to match the resistance to 50Ω, and the value (capacity) is reduced. Will be able to do it.

In the first embodiment, 935M is mainly used.
In the second embodiment, an example of a circuit for transmitting a signal having a frequency of 1441 MHz has been described. However, the present invention is not limited to this example. Even in such a case, a matching circuit or the like may be configured by an electric capacity, an electric resistance, and an inductor suitable for transmitting or attenuating a signal of the frequency.

[0037]

As described above, the transmission circuit device according to the present invention has the following effects. That is, since the branch line for releasing a signal of a predetermined level from the transmission line is configured by a passive element, the circuit configuration can be simplified as compared with the case where an active element is used, and a circuit is formed on a semiconductor substrate. In this case, the chip area can be reduced. Further, integration with other circuits can be easily achieved, and downsizing of a device including the transmission circuit device can be achieved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram (part 1) for explaining the present embodiment;

FIG. 2 is a circuit diagram (part 2) for explaining the embodiment;

FIG. 3 is a circuit diagram illustrating a first embodiment.

FIG. 4 is a circuit diagram showing a specific example of the first embodiment.

FIG. 5 is a diagram showing a characteristic simulation result.

FIG. 6 is a circuit diagram showing a specific example of the second embodiment.

FIG. 7 is a block diagram illustrating a conventional example.

FIG. 8 is a circuit diagram illustrating a conventional example.

[Explanation of symbols]

Reference Signs List 101 signal input terminal 102 signal output terminal 102, 110 electric capacity 104 power adjustment terminal 106, 107, 109 electric resistance 108 transistor 111 matching circuit

Claims (5)

[Claims] At least one transistor disposed in a signal line for gain adjustment from an input terminal to an output terminal, and a branch for releasing a signal of a predetermined level from the signal line based on the operation of the transistor. A transmission circuit device comprising a line and a power amplifier circuit for amplifying a signal transmitted through the transmission line without escaping to the branch line, wherein the branch line is configured only by passive elements. Characteristic transmission circuit device. 2. The transmission circuit device according to claim 1, wherein the branch line is a matching circuit for input and output. 3. The transmission circuit device according to claim 1, wherein said branch line and said power amplifier circuit are formed on the same substrate. 4. The transmission circuit device according to claim 3, wherein said substrate is a semiconductor substrate. 5. The transmission circuit device according to claim 3, wherein said substrate is a gallium arsenide semiconductor substrate.