JPH10108009A - Image-processing method and its device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the image-processing method and its device where spatial filter processing is applied to an n-bit multi-value image data, the processed data are converted into binary or multi-value image data, and the converted image data are converted into data expressable using dots providing a higher resolution that that of the converted image data. SOLUTION: Multi-value data, outputted from a scanner reading an image whose one pixel is expressed in n-bit are received by line buffers 201, 202, where the data are shifted in and stored. The line buffers 201, 202 are configured by using lower-order 8-bit and high-order 6-bit of a same address in a memory, and the multi-value data stored in the line buffers 201, 202 and the received multi-value image data are latched by a latch group 203, in which the data are executed for spatial filter processing through the multiplication in each 3×3 Laplacian filter matrix.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image processing method and an image processing apparatus, which receive multi-valued image data in which one pixel is represented by n bits, and adjusts the image data according to a desired number of gradations and pixel depth. Binarization of n-bit multi-valued image data or m (n> n)
m> 2) The present invention relates to an image processing method for performing a binarization process and an apparatus therefor.

[0002]

2. Description of the Related Art In a facsimile or the like which can read and transmit a document image by a scanner, when the image data is read by the scanner, it is necessary to transmit the read image data or simply make a copy. The image data is always read at a predetermined resolution, and the image data is binarized. Also, as for the number of gradations of the error diffusion processing which is a pseudo halftone processing generally used in a facsimile apparatus, for example, 64 gradations of 6 bits are fixedly adopted in the case of copying or transmission. I was

In recent years, a recording apparatus capable of performing high-resolution recording in an LBP (laser beam printer) or the like has been provided at a low cost, so that multi-value recording such as four-value recording can be easily performed. It is becoming. For example,
A recording device having a resolution of 1200 dpi (dots / inch) in the main scanning direction has a resolution of 400 dpi in the main scanning direction.
When the image data of i is recorded, the number of small dots of 1200 dpi (three in this case) is made to correspond to the density value of the input image in accordance with the density value of the input image data, thereby recording in four values. Can be realized. Of course 400d
When performing binary recording at pi, 1200 dpi for black
All three small dots of i correspond to black, and 12 for white
All three small dots of 00 dpi should correspond to white.

In recent years, copiers and facsimile machines have become more complex, and facsimile machines have been required to perform high-quality printing of 256 gradations or more during copying. For this reason, when an original image is read by the scanner of the facsimile apparatus, when the read image data is transmitted, for example, binary image data of 64 tones is generated by the binarization process and a copy is taken. Therefore, in order to maximize the recording characteristics (resolution, gradation, etc.) of the printer unit, it is required to generate image data of, for example, 256 gradations by m-value processing. In such image processing, binary error diffusion processing is widely used as binarization image processing. Binary error diffusion processing is extended as m-value conversion processing, and output values are converted into m-valued image processing. Currently, m-value error diffusion processing is widely adopted, and at present, these functions are separately implemented according to the purpose of each device.

[0005]

However, in the above-described facsimile apparatus and the like, a binarization processing circuit for performing a binarization process for using the read image for communication, and a multi-value processing for copying the read image are provided. If the multi-value processing circuit for performing the above is constituted by separate circuits, there is a disadvantage that the facsimile apparatus becomes very expensive.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional example, and an image in which an image quality of an output image is enhanced by switching an output pattern of m-value error diffusion in a specific density region of input image data. It is an object to provide a processing method and an apparatus therefor.

Another object of the present invention is to provide an image processing method and apparatus capable of suppressing the memory capacity of a line buffer for extracting reference pixel data in the sub-scanning direction for filtering.

Another object of the present invention is to switch the output range of the luminance-density conversion and to inhibit the conversion to the density affecting the output in association with the subsequent binarization or multi-value processing. Accordingly, it is an object of the present invention to provide an image processing method and an apparatus for preventing deterioration of the quality of an output image.

Another object of the present invention is to provide dot-expanding of m-valued image data, where the m-valued input image data is symmetrical even and odd-numbered pixels. An object of the present invention is to provide an image processing method and apparatus capable of improving the quality of an image recorded using the dots by arranging the dots as described above.

It is a further object of the present invention to determine whether or not a pixel of interest has an intermediate value in m-value input image data. If the pixel has an intermediate value, adjacent pixels located on the left and right of the pixel of interest are determined. To provide an image processing method and apparatus capable of improving the reproducibility of an edge portion included in an image by determining the arrangement of dots based on a comparison result between an adjacent pixel and a pixel of interest. is there.

[0011]

In order to achieve the above object, an image processing method according to the present invention comprises the following steps. That is, an image input step of inputting multi-valued image data in which one pixel is represented by n bits, a filter step of performing a spatial filter process on the multi-valued image data input in the image input step, A process of converting each pixel data of the image data into binary or m (m <n) values for the image data filtered by A dot arrangement step of converting the image data into an array of dots having a higher resolution than the resolution of the image data, and changing the arrangement direction of the dots in accordance with a density gradient of a pixel adjacent to a target pixel of the image data. .

In order to achieve the above object, an image processing apparatus according to the present invention has the following arrangement. That is, 1
Image input means for inputting multi-valued image data whose pixels are represented by n bits, filter means for performing spatial filtering on the multi-valued image data input by the image input means, and filter processing by the filter means Processing means for converting each pixel data of the image data into a binary value or an m (m <n) value for the obtained image data, wherein the filter means covers a plurality of lines in the sub-scanning direction. Storage means for storing each pixel data to be stored at the same address.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

FIG. 1 is a functional block diagram showing the entire functions of the image processing apparatus according to the present embodiment.

Reference numeral 100 denotes a scanner unit, which converts a document image into a CCD image.
(Solid-state image sensor) or the like, and converts the read analog image signal into a digital signal using, for example, an 8-bit A / D converter, and outputs 8-bit (256 gradations) image data per pixel. Also, this scanner unit 100
At the same time as the image reading, such as shading correction,
Correction processing of a CCD (solid-state imaging device) and an optical system is performed. Reference numeral 200 denotes a spatial filter processing unit;
, The image data of which one pixel is represented by 8 bits is input, and the image data is subjected to a two-dimensional spatial filter operation, thereby compensating for the resolution of the image data. Here, if scaling is required, scaling can be performed between the scanner unit 100 and the spatial filter processing unit 200 by a linear interpolation operation (not shown). Reference numeral 300 denotes a luminance / density conversion unit which converts image data (luminance data) whose resolution has been compensated for by the spatial filter processing unit 200 into density data using, for example, a look-up table.
The look-up table of the brightness / density conversion unit 300 stores the image processing apparatus according to the present embodiment in accordance with the image processing mode such as dark / light image and binary / quaternary image processing described later. The table data is downloaded from the control unit 110 (FIG. 2). The look-up table uses data that has been corrected based on the LOG conversion curve while further taking into account the recording characteristics of the printer 700.

Reference numeral 400 denotes a binary and quaternary processing unit which receives the density data output from the luminance / density conversion unit 300,
The data is output after being coded or quaternized. 500 is D
An image memory composed of a RAM, an SRAM, or the like, in which image data that is read by the scanner unit 100 and is generated by binarization or quaternization processing is composed of 2 bits or 1 bit, or not shown. Image data input via a communication line or the like is stored as an image file. 60
0 is a binary / quaternary developing unit, and the recording resolution in the main scanning direction is 1
400 dpi for printer 700 which is 200 dpi
i binary image data or 400 dpi quaternary image data is input, and the optimum 1200
The small dots of dpi are arranged and output to the printer 700. The printer 600 has, for example, a resolution of 1200 dpi.
And prints the image data on a recording medium (recording paper or the like) using the binary data (0 or 1) developed by the binary / quaternary developing unit 600.

In the present embodiment, the multi-level error diffusion processing is described in the case of quaternary processing. However, the present invention is not limited to this. Needless to say, m-value processing can be generally performed.

FIG. 2 is a block diagram showing a basic configuration of the image processing apparatus according to the present embodiment. Portions common to those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

Reference numeral 110 denotes a control unit for controlling the entire apparatus described above.
RAM 121, which is used as a work area at the time of execution of the processing by 120 and temporarily stores various data;
A program memory 122 for storing a control program and data of the PU 120 is provided. The look-up table (LUT) 123 stores a table used for the above-described luminance / density conversion. Reference numeral 124 stores a Laplacian filter constant and the like used in the spatial filter processing unit 200. A display unit 111 displays a document image read by the scanner 100 and an image subjected to various processes. Reference numerals 201 and 202 denote line buffers used in a spatial filter process to be described later. In the present embodiment, RAMs each of which can store 16-bit data at one address.
Are used in common. Reference numeral 203 denotes line buffers 201 and 202 described later.
And a latch circuit group for latching output values such as.

The spatial filter processing unit 200 shown in FIG.
The processing is achieved by the control unit 110, the line buffers 201 and 202, the latch group 203, and the like, and the processing of the luminance / density conversion unit 300 is realized by the CPU 120 of the control unit 110. Further, in the present embodiment, the quaternary / binary processing unit 400 and the binary / quaternary expansion unit 600 are configured by hardware, but may be realized by a program executed by the CPU 120.

[Embodiment 1] Hereinafter, the features of the respective processing units according to Embodiment 1 of the present invention will be mainly described in detail.

<Spatial Filter Processing Unit 200> Normally, in order to perform spatial filter processing on image data, a line buffer for the number of reference lines or (reference line number-1) is required. Conventionally, such a line buffer is constituted by an external SRAM or the like, and a large number of SRAMs having a bit width of 8 bits are prepared. For this reason, when the input data is 8 bits, there is no particular problem in terms of apparatus cost even if the reference line buffer is entirely formed of an 8-bit memory. However, recent advances in IC technology have made it easier to incorporate an SRAM used as an external reference buffer. However, when such a line buffer is incorporated, the memory capacity is directly reflected as a manufacturing cost, and therefore, it is necessary to reduce the memory capacity. For this reason, in the present embodiment, both the maintenance of the performance of the apparatus and the reduction of the apparatus cost are achieved by reducing the significant figures of the reference buffer to such an extent that the influence of the operation is small.

FIG. 3A is a diagram showing an example of a matrix of a Laplacian filter used for resolution compensation which is relatively frequently used, and FIG. 3B is for explaining a line buffer used for the matrix operation. FIG.

In order to refer to the image data (pixel data) for three lines and perform the arithmetic processing for the spatial filter processing, two 8-bit line buffers are required to simultaneously refer to the pixels in the sub-scanning direction. Required. In this embodiment, the number of bits of line 1 which is relatively less affected by the operation is reduced from 8 bits to 6 bits, so that the balance between the performance of the apparatus and the cost of the apparatus is maintained. Thus, when storing B4 size image data at 400 dpi, the memory capacity can be reduced by 8192 bits.

FIG. 4 is a block diagram showing a configuration of a line buffer and a latch group of the spatial filter processing section 200.

The line buffers 201 and 202 are line buffers for delaying pixel data in the sub-scanning direction and simultaneously referring to three lines of pixel data. The latch group 203 delays the pixel data in the main scanning direction. Data for spatial filtering is extracted from these latch groups.

In the present embodiment, one of the image data
Pixels are represented by 8 bits, and the line buffers 201 and 20
2 is composed of one RAM (16 bits / 1 address), and the lower (0-7) bits (8 bits) of the RAM are delayed by one line in the line buffer 202, and the upper (8-13) bits are stored in the line buffer 202. (6 bits) is allocated to the line buffer 201 for delaying the second line.

The input pixel data (8 bits) is directly latched in a latch circuit group 203a corresponding to line 3 of the latch group 203, and the output data of the line buffer 202 is latched in a latch circuit group 203b corresponding to line 2. (8 bits) are latched, and the latch circuit group 203c
, The output data (6 bits) of the line buffer 201 is latched.

FIG. 5 is a timing chart showing a memory access in the spatial filter processing section 200 of the present embodiment.

The image data (DATIN) input in synchronization with the rise of the clock (DCLK) is stored in the designated addresses (A1 to An) of the line buffers 201 and 202 in synchronization with the rise of the clock (DCLK). Is done. The access in FIG. 5 is a diagram showing the access timing to the data stored in the line buffer, where RD indicates the read timing and WR indicates the write timing. For example, at the read (RD) timing 210 in FIG. 5, the data (D1) stored at the address “A1” of the line buffer (RAM) is shifted by two bits (I
D1) is read out (indicated by RDDAT), and at the next write timing (WR) 211, the data (ID1) is read out after being shifted by 2 bits and the original data (D1) is combined and becomes the same. It is stored at the address (A1). As a result, the original pixel data (D1) is placed in the lower bits (0 to 7) of the address (A1), and the data (ID1) shifted by 2 bits is placed in the upper bits of the address (A1). (8-13). In this way, the read address and the write address are made the same, and the RAM (line buffer) is updated by read modified write. By repeating such an operation, the pixel data delayed by one line to the lower bit (0 to 7) position (corresponding to the line buffer 202) of the RAM becomes the upper bit (8 to 13) position (8 to 13) of the same address. (Corresponding to the line buffer 201) stores pixel data delayed by two lines.

The image data delayed by the amount of lines read from the line buffers 201 and 202 and the input image data (DATIN) are sequentially taken into the latch group 203 in synchronization with the rise of the clock (DCLK). The latch group 203 sequentially shifts the data read from the line buffers 201 and 202 and the input image data in synchronization with the rising edge of the clock (DCLK).
Thereby, two-dimensional (3 × 3) image data is extracted.

Here, among the data latched by the latch group 203, each data indicated by X, A, B, C, and D in FIG. 4 corresponds to the X, A, and X of the spatial filter in FIG. B, C,
D corresponds to each position. In the operation of the actual spatial filter, the values corresponding to A and B are the upper 6
Since only the bit is a value, "00" is inserted into the lower two bits after bit shifting, and the arithmetic processing is performed as 8-bit data.

Filter = X << 2 − ((A << 2) + (B << 2) + C + D); The above expression represents the operation of the spatial filter of the present embodiment in C language. Things. X shifts left by 2 bits (× 4) because the filter coefficient is “4”, and A and B shift left by 2 bits to treat 6-bit data in the same manner as other 8-bit data. In an actual device, for example, when such an operation is realized by hardware, such a bit shift is realized by shifting the bit position in the wiring from the latch circuit group 203 to the adder. The spatial filter value obtained here is further added to the data of X, and the resolution is compensated.
Pixels are output as 8-bit image data. When such an operation is realized by software,
This can be easily realized by executing and adding a register shift instruction.

<Luminance / Density Conversion Unit 300> The luminance / density conversion unit 300 receives 8-bit luminance data of one pixel whose resolution has been compensated by the spatial filter processing unit 200, and converts the luminance data into density data with reference to a lookup table. And output.
As described above, normally, the brightness / density conversion table is LOG
The data obtained by further correcting the recording characteristics of the printer 700 is used for the conversion.

In this embodiment, the respective modes of the binarization processing and the quaternization processing are described here.
Conversion to density data is performed so that the data width required by the binarization processing unit 400 is obtained.

First, in this embodiment, when performing the binary error diffusion processing, all white data is "0" and all black data is "6".
Data processing is performed as 3 ″ (6 bits).

FIG. 6A is a diagram showing a characteristic example of luminance-density conversion for a binary error diffusion process.

In the case of binary error diffusion, image data of 8 bits, that is, "0" to "255" is input and converted into 6 bits, that is, density data of "63" to "0". Output. Further, when performing the quaternary error diffusion processing, data processing is performed with all white data being "0" and all black data being "255".

FIG. 6B is a diagram showing a characteristic example of luminance-density conversion for the quaternary error diffusion processing. Here, image data of 8 bits, that is, “0” to “255” is input, converted into density data of 8 bits, that is, “255” to “0”, and output.

Further, depending on the performance of the printer 700,
When an output pattern having a specific density is recorded, the quality of the recorded image may be reduced (image may be rough). For example,
When image data of 256 gradations in which one pixel is represented by 8 bits is used to perform print output by performing quaternary error diffusion processing, an image of an output pattern of density data having a density of about "31" tends to be rough. . This is thought to be because the output data is in a checkered state of “0” and “1” due to the error diffusion characteristics in the image data of density “31”, and the recording characteristics of the printer 700 cannot follow this checkered data. Can be Therefore, in such a case, a brightness-density conversion table is created by skipping image data of a density (here, density “31”) that makes the recorded image rough.

FIG. 6C shows that the density "3"
FIG. 14 is a diagram illustrating an example of characteristics of a luminance-density conversion table created by skipping 1 ″.

<Binary and quaternary processing section 400> First, m
An algorithm of the quaternary error diffusion processing will be described as the value conversion processing. The difference between binary error diffusion and quaternary error diffusion is
The point is that an error is calculated from three threshold values and four output densities. The error diffusion in four values is similar to the error diffusion in two values, and the output pixel density (here, DENT3 = 255, D
(ENT2 = 170, DENT1 = 85, DENT0 = 0)
And the correction density X′ij (sum of the pixel density Xij and the error diffusion amount) as a new error, as shown in FIG. It spreads. In the processing related to the distribution of errors to adjacent pixels, similarly, the correction density X′ij is expressed as follows: X′ij = Xij + SUM (Ekl × αkl) / SUM (αkl) Denotes a weighting coefficient for error distribution, and Ekl denotes an error generated before the processing pixel.

Next, the signal level of the corrected density X'ij is determined by three thresholds using the following equations (1) to (4), and the recording output signal level (OUTPUT) and error (E) are determined. To determine.

Here, each of the thresholds is TH1 = (DE
NT1 + DENT0) / 2, TH2 = (DENT2 + DEN)
T1) / 2 and TH3 = (DENT3 + DENT2) / 2.

If X'ij> TH3, then error E = X'ij−DENT3 at output pixel density OUTPUT = 3 (1) If TH3> = X'ij> TH2, error E = X at output pixel density OUTPUT = 2 'ij-DENT2 ... (2) If TH2> = X'ij> TH1, then output pixel density OUTPUT = 1 and error E = X'ij-DENT1 ... (3) If TH1> = X'ij then output pixel density OUTPUT = 0 and error E = X′ij−DENT0 (4) New error E = X′ij− (DENT3, D
ENT2, DENT1, DENT0) are weighted as shown in FIG. By repeating this, the 8-bit input image data (0 to 255) is converted into any one of four values (0 to 3) and output.

In the case of the binary error diffusion processing,
The density for calculating the error of the value error diffusion is BDENT1 = 6.
3, BDENT0 = 0 and threshold value BTH1 = (BDEN
T1 + BDENT0) / 2, the following equation (5),
As shown in (6), the error (E) determined according to the output pixel density (OUTPUT) is diffused as a new error by weighting shown in FIG.

If X′ij> BTH1, the output pixel density is OUTPUT = 1 and the error is E = X′ij−BDENT1 (5) If BTH1> = X′ij, the output pixel density is OUTPUT = 0 and the error is E = X′ij −BDENT0 (6) In the present embodiment, focusing on the fact that the error distribution calculation is common in the binary error diffusion and the quaternary error diffusion processing, the error distribution calculation processing block and the error buffer access block are used. The common use makes it possible to simultaneously achieve four-level error diffusion and two-level error diffusion while preventing an increase in the scale of the device. More specifically, the error distribution operation circuit is constituted by quaternary error diffusion effective bits having a large number of effective bits.
The size of the error buffer memory is suppressed by performing the clamping process to the number of effective bits of the value pixel diffusion. In the present embodiment, the error buffer is set to 6 bits, and the error amount calculated when the error buffer is stored in the error buffer is “−32” to “+
31 ".

FIG. 8 is a block diagram showing an example of an error diffusion circuit for commonly performing the binary error diffusion and the quaternary error diffusion processing in this embodiment.

Reference numerals 401 to 403 denote latch circuits, which hold error data to be weighted, distributed and diffused, and update the data in synchronization with the pixel clock. 404-407
Is an adder, which is output from an error distributor 411 described later.
The data to which the error generated at the time of processing each pixel is distributed is added. 408, a clamp processing circuit;
Is "-32" when the output data of "-32" or less,
In the case of “+31” or more, each is clamped to “31”, and 6-bit signed data (“−32” to “3
1 ") and output to the image memory 500.
Is a comparator, which compares the error density value corrected by the error data output from the adder 407 with a threshold value according to each processing mode of binary or quaternary error diffusion, and calculates an output value and an error operation. A signal 415 for selecting an expression is output. An error calculator 410 receives the signal 415 from the comparator 409 and the addition result from the adder 407,
A new error amount of the pixel of interest determined thereby is calculated and output. Reference numeral 411 denotes an error distribution unit.
Is weighted with a weighting coefficient corresponding to FIG.
405 and 406.

The data flow in the quaternary / binarization processing unit 400 will be described by taking a quaternary error diffusion process as an example. In the case of binary error diffusion, the process is performed in the same manner as the quaternary error diffusion process described below, except that the threshold value and the arithmetic expression for calculating a new error are changed.

First, the input image data 414 is added to the output (diffused error data) of the latch 403 in the adder 407, and the result is added to the comparator 409 and the error calculator 41.
Output to 0. In the comparator 409, the above equations (1) to
As shown in (4), the quaternary output value is determined by comparing the corrected pixel data, which is the output data of the adder 407, with each of the threshold values TH1 to TH3, and at the same time, a new error amount calculation formula is selected. The selection signal 415 is output to the error calculator 410. The error calculator 410 has a subtraction circuit (not shown) corresponding to the above equations (1) to (4), and the above equations (1) to (4)
Is selected according to the selection signal 415 from the comparator 409, and a new error is output.

Note that a new error amount may be calculated by switching the value to be subtracted by the selection signal 415 from the comparator 409 to the subtractor provided in the error calculator 410.

The new error amount output from error calculator 410 is weighted by error distributor 411 in accordance with FIG. 7, and the result is added to each of adders 404 and 40.
6, 409 and the latch 401. Where "W
The weighted error of "3" is latched by the latch 401, whereby the weighted error of "W2" of the error generated by calculating the error of the next pixel is added to the adder 404.
Is added by The output of the adder 404 is latch 4
02 and further added by the adder 405 to the weighted error of “W1” of the error generated by calculating the error of the next pixel. The output of the adder 405 is the amount of error diffused to the next line of the processing line, and is output by the clamp circuit 408 with a sign of “−32” to “31”.
It is output after being clamped to bit data. The output of the clamp processing circuit 408 is temporarily stored in an error buffer in order to delay one line of data, and is read out when processing the next line.

The adder 406 adds the read value from the error buffer delayed by one line and the weighted error amount of “W 4”, and latches the addition result in the latch 4.
Latch to 03. The latch 403 outputs the sum of the diffused errors as a correction amount. Thereafter, the adder 407
And the addition is sequentially performed with the input image data 414, so that the quaternized image data is output from the comparator 40.
9 is output.

As described above, the input image data 414 is binarized in the binary error diffusion mode,
In the value error diffusion mode, the data is quaternized and output as binary data or quaternary data. At this time, the number of effective bits of each latch and each adder is configured according to the number of effective bits of the quaternary error diffusion processing.

<Binary / quaternary developing unit 600> The binary / quaternary developing unit 600 outputs image data having a resolution of 400 dpi in the main scan to a printer 700 capable of performing binary recording with a resolution of 1200 dpi. According to 120
The image data is converted to 0 dpi “0” (white) and “1” (black) image data.

When the input data is quaternary image data, the quaternary value is made to correspond to the number of three small dots of 1200 dpi. First, when the four values are "0", all the small dots of 1200 dpi output the value of "0". Next, in the case of four-valued "1", one of three small dots of 1200 dpi is output as "1" and the remaining two are output as "0". Similarly, in the case of quaternary “2”, two out of three small dots of 1200 dpi are output as “1” and the remaining one is output as “0”, and the quaternary data is “3”. In this case, all three small dots of 1200 dpi are output as "1".

When the input image data is binary 400
In the case of image data of dpi, three small dots of 1200 dpi are put together, and when the input binary data is "0", three dots are collected.
If all the small dots are "0" and the binary input data is "1", all three small dots are output as "1" and the binary 400 dpi image data is developed. . The data composed of “0” and “1” thus developed is printed by the printer 700.

In this embodiment, a case will be described in which binary and quaternary image data are expanded at 400 dpi in the main scanning as input image data. As described above, image data having a resolution of 400 dpi in the main scanning direction is divided into 12 in the main scanning direction.
Printer 700 capable of binary recording with a resolution of 00 dpi
, The input quaternary image data is
By making it correspond to the number of three small dots of 0 dpi, 4
It is possible to record image data having a value of 400 dpi. When the input data is binary 400 dpi image data, three small dots of 1200 dpi are collectively set to “0”.
Alternatively, by setting it to “1”, 400 dp in binary data
It becomes possible to record the image data of i.

First, the arrangement rule of small dots in the present embodiment will be described.

FIG. 9A shows the image data of 255 gradations, which is quaternized by a quaternary error diffusion process, and small dots are arranged on the quaternized image data regularly from the left in accordance with the image density. FIG. 7 is a graph showing a relationship between density data and a recording density in the case where the above-mentioned processing is performed.

Normally, the printer 700 such as LBP turns on / off the irradiation by the semiconductor laser depending on whether the input image data is “1” or “0”, and the point at which the laser light is turned on. Are recorded in black. At this time, the dot diameter of the laser light is circular, and the dot diameter is selected so that the dots slightly overlap each other in order to represent all black. Therefore, for on / off data having a high frequency such that black and white alternate,
The image is recorded as an image composed of black and easily collapsed dots. For this reason, as shown in FIG. 9A, the recording density with respect to the density of the image data is extremely nonlinear.

In consideration of the characteristics of the printer 700 as described above, in the present embodiment, when arranging small dots,
As shown below, in the case of an even pixel, the arrangement pattern 0
(pattern0) is selected and black dots “1” are arranged from the right. In the case of an odd-numbered pixel, arrangement pattern 1 (pattern1) is selected and black dots “1” are arranged from the left. By developing into small dots in this manner, the frequency component of the output data is suppressed, and a pattern in which black and white alternate can be eliminated. At the same time, the black dots are arranged so as to be continuous as much as possible, so that the collapse of the image due to the protrusion of the dot system is suppressed.

Even Pixel Odd Pixel (Arrangement Pattern 0) (Arrangement Pattern 1) Pixel Density 0 000 000 1 001 100 2 011 110 3 111 111 FIG. 9 (B) shows image data of 255 gradations by four-level error diffusion. FIG. 9 is a graph showing the relationship between image density data and recording density when quaternary data is further developed into small dots using the symmetrical pattern and printed.

FIG. 9B differs from FIG. 9A in that the relationship between the density of the image data and the recording density is much more linear than in FIG. 9A. Thus, when dots are developed and recorded using the above arrangement pattern, an image having more excellent gradation characteristics can be recorded.

However, when such an arrangement pattern is used, halftone expression is not a problem, but in a character or line drawing, sharpness of a recorded image is poor at an edge portion depending on whether an edge portion pixel is an even number or an odd number. Could be.

FIG. 10A is a diagram showing an example in which a low density portion of an edge is an odd pixel in the main scanning direction, so that a pseudo line is generated at the edge portion.

In this embodiment, the following exception processing is performed to prevent such a problem at the edge portion. That is, in the present embodiment, when inputting m-valued image data, the pixel density of interest ranges from “1” to “(m−
1) take the intermediate value of "", and the pixels on both sides are calculated by the equations (7) and (8).
It is determined whether or not is satisfied. And if you meet,
A fixed pattern is selected regardless of the even or odd number. That is, the pixel of interest is compared with the densities of the left and right pixels to detect that the pixel is the edge of the image. In the case of an edge portion, small dots are arranged according to the inclination direction of the pixel density, thereby improving the reproducibility at the edge portion. Here, DATn-1 indicates pixel data on the right side of DATn, and DATn + 1 indicates pixel data on the left side of DATn.

DATn-1 <DATn <DATn + 1 → placement pattern 0 (7) DATn-1>DATn> DATn + 1 → placement pattern 1 (8) FIG. FIG. 14 is a diagram illustrating an output example when exception processing is further introduced into pattern development.

According to this, it can be seen that a good result is obtained without generating a pseudo line at the edge portion of the image.

Next, with reference to FIG. 11, a specific configuration example of the binary / quaternary developing unit 600 of the present embodiment will be described in detail.

FIG. 11 is a block diagram showing a configuration of a circuit for determining the arrangement of small dots in the binary / quaternary developing section 600.

In order to synchronize the image output with the horizontal synchronizing signal of the printer 700, the image data input here is temporarily buffered in a line buffer (not shown) and then synchronized with the horizontal synchronizing signal. This is image data read from the line buffer. Reference numeral 601 denotes a decoder, which is a target pixel value (DATn), a pixel value (DATn-1, DTAn + 1) before and after the target pixel in the main scanning direction, and an output value 61 of a 1-bit toggle counter for counting an input pixel value.
0 is input. The output value of this toggle counter 61
By 0, it is determined whether the pixel is an even-numbered pixel or an odd-numbered pixel.

The logic of the decoding in the decoder 601 is such that a selection signal SEL for determining whether to select either the arrangement pattern 0 or the arrangement pattern 1 is transmitted to the selector 602 according to a logical expression described in the following C language. Output. The selector 602 selects a small dot pattern in accordance with the density value of the target pixel DATn and the value of the selection signal SEL, and selects a parallel-to-serial conversion circuit (P / S) 603.
Output to The parallel-to-serial conversion circuit 603 converts the input 3-bit data into serial data at a desired speed required by the printer 700, and converts the data into, for example, laser beam on / off data.
Output to

[0075] As described above, according to the present embodiment, the spatial filter processing unit 200 can reduce the number of bits of the line buffer for extracting the reference data in the sub-scanning direction. The output range of the luminance-density conversion is switched according to the binarization, and the error data stored in the error buffer by the error diffusion is clamped to the number of significant digits of the error buffer at the time of binarization in the quaternary processing. This makes it possible to use a common block for processing, and to generate image data that makes the most of the recording capability of the printer.

As described above, according to the present embodiment, when the m-valued image data is dot-expanded and output to the printer 700, in the m-value input image data, even-numbered pixels By arranging small dots in a pattern that is symmetrical in the case of pixels and odd-numbered pixels, the gradation recording characteristics of the printer device can be significantly improved. Further, it is determined whether or not the target pixel has an intermediate value in the m-value input image data. If the target pixel has the intermediate value, the adjacent pixels located on the left and right of the target pixel are referred to, By determining the arrangement of the small dots based on the comparison result between the target pixel and the target pixel, it is possible to provide an image recording with improved reproducibility of the edge portion included in the image.

[Other Embodiments] Next, an algorithm of a quaternization method according to another embodiment of the present invention will be described. In the case of binarization, since binarization is performed by a known binary error diffusion method, description thereof is omitted here. In this embodiment, processing is performed to switch the pixel density and error calculation method of the output image data so as to suppress the occurrence of isolated black dots in a density area where the printer 700 has poor followability.

A quaternizing process according to another embodiment of the present invention is as follows.
It is based on quaternary error diffusion. As described above, the problem with the low-cost printer 700 is that the threshold value TH1 = (D
ENT1: 85 + DENT0: 0) / 2 => 42. Therefore, in this other embodiment, first, a comparison unit is provided for identifying whether or not the input image data has a density causing image unevenness. According to the comparison result of the comparing means, if the pixel density of the input image data is within a specific density range, as shown in the following equations (9) and (10),
A threshold value DENT1 = 85 is set for comparison with the corrected density obtained by adding the error diffused to the input image data. When the corrected density is larger than the threshold value, the value of the output pixel is set to "2", and the error calculated for this pixel is obtained by subtracting DENT2 = 170 from the corrected density. If the corrected density is equal to or less than the threshold, the output pixel value is set to "0", and the error calculated for this pixel is obtained by subtracting DENT0 = 0 from the correction udon.

As a result, the quaternary output pattern in the specific density region where the conventional image unevenness occurs is the same as the conventional density “1”.
And a pattern of density “0” is changed to a pattern of density “2” and density “0.” With this, when developing and outputting quaternary data in this density area, an isolated pixel of 1200 dpi is not generated. As a result, a dot pattern is generated within the range of the followability of the printer 700, and the gradation characteristics are improved.

If the input image data is out of the specific density range, the same four-level error diffusion processing as in the prior art may be performed.
The threshold value, the output value, and the generated error at that time are given by Equation (1)
1) to (14).

When the density of the input pixel is DTH1 <Xij <DTH2
If X'ij> DENT1, then output pixel density OUTPUT = 2 and error E = X'ij−DENT2… (9) If DENT1> = X'ij, output pixel density OUTPUT = 0 and error E = X'ij− DENT0 ... (10) When the density of the input pixel is DTH1≥Xij≤Xij If X'ij> TH3, then the output pixel density is OUTPUT = 3 and the error is E = X'ij-DENT3 ... (11) TH3> = X'ij> If TH2, the output pixel density is OUTPUT = 2 and the error is E = X'ij-DENT2 ... (12) If TH2> = X'ij> TH1, the output pixel density is OUTPUT = 1 and the error is E = X'ij-DENT1 ... (13) If TH1> = X'ij, then the output pixel density is OUTPUT = 0 and the error is E = X'ij-DENT0 (14) FIG.
FIG. 13 is a diagram illustrating an example in which a patch pattern of density data of 0 to 255 is recorded using a value development process, and the density is measured using a densitometer. As is clear from FIGS. 12A and 12B, the gradation characteristics are improved near the density “42”.

A description will be given of a circuit example of a quaternary error diffusion process according to another embodiment with reference to FIG. Note that FIG.
In FIG. 3, the same parts as those in FIG.
The description is omitted.

The latch circuits 401 to 403 hold error data that is weighted, distributed and diffused, and the data is updated in synchronization with the pixel clock. Adders 404-4
Reference numeral 07 performs addition of data output from the error distributor 411 to which errors generated during processing of each pixel are distributed.
The comparator 416 detects whether the pixel density of the input image data 414 is in a specific density area (here, -40 or more and 44 or less). The comparator 409 compares the input pixel density value corrected by the diffused error data with respect to the input pixel output from the adder 407 with a threshold value, and selects an output value in the error calculator 410 and a calculation formula for error calculation. The signal 415 is output. An error calculator 410 receives the signal 415 from the comparator 409 and the addition result from the adder 407, and calculates and outputs a new error amount of the pixel of interest determined thereby. The error distributor 411 weights the new error output from the error calculator 410 with the weighting factor corresponding to FIG. 7 and distributes the weighted error to the adders 404, 405, and 406.

The data flow in the quaternary / binarization processing section 400 will be described.

First, the input image data 414 is added to the output (diffused error data) of the latch 403 in an adder 407, and a comparator 409 and an error calculator 41 are added.
Output to 0. The comparator 416 detects whether the density of the input pixel is in a specific density area. In the comparator 409, based on the comparison result of the comparator 416, as shown in the above equation (9) (10) or (11) to (14), the corrected pixel data which is the output data of the latch 403 and each of the threshold values TH1 to TH1 The quaternary output value is determined by comparison with TH3 or DENT1, and at the same time, a selection signal 415 for selecting a new error amount calculation formula is output to the error calculator 410. In this error calculator 410, the above equations (11) to (1)
4) [Equation (9) is equivalent to Equation (12), and Equation (10) is equivalent to Equation (1).
The same subtraction formula as in 3) is used], and which of the above equations (11) to (14) is used is selected from the comparator 416 and the comparator 409. Selection is made according to the signals 415 and 417, and a new error is output.

Note that the selection signals 415 and 415 from the comparators 409 and 416 are supplied to the subtractor provided in the error calculator 410.
By switching the value to be subtracted by 417, a new error amount may be calculated.

The new error amount output from error calculator 410 is weighted by error distributor 411 according to FIG. 7, and the result is added to each of adders 404 and 40.
6, 409 and the latch 401. Where "W
The weighted error of "3" is latched by the latch 401, whereby the weighted error of "W2" of the error generated by calculating the error of the next pixel is added to the adder 404.
Is added by The output of the adder 404 is latch 4
02 and further added by the adder 405 to the weighted error of “W1” of the error generated by calculating the error of the next pixel. The output of the adder 405 is temporarily stored in an error buffer to delay the data by one line, and is read out when the next line is processed.

The adder 406 adds the read value from the error buffer delayed by one line and the weighted error amount of “W 4”, and latches the addition result in the latch 4.
Latch to 03. The latch 403 outputs the sum of the diffused errors as a correction amount. Thereafter, the adder 407
And the addition is sequentially performed with the input image data 414, so that the quaternized image data is output from the comparator 40.
9 is output.

The configuration of the subsequent binary / quaternary developing unit 600 is as described above with reference to FIG.

As described above, by switching the output pattern of the m-value error diffusion in the specific density area of the input image data, m
Even when the quantified data is dot-expanded, the generation of a dot pattern with low density and high frequency components is suppressed, and even with a cost-effective printer, recording with excellent gradation characteristics can be performed without causing image roughness. It can be carried out.

FIGS. 14 to 18 show flowcharts in the case where the above-described functions are realized by software. A control program for executing these processes is stored in the program memory 122 and executed under the control of the CPU 120. You.

FIG. 14 is a flowchart showing the spatial filter processing in this embodiment.

First, in step S1, input image data (8 bits) is sequentially stored in the line buffers 201 and 202 in synchronization with a clock (DCLK). Here, as described above, the line buffer 201 is shifted rightward by 2 bits and stored as 6-bit data. Thus 2
The line image data is stored in the line buffers 201 and 202.
After that, pixel data of 3 lines × 3 pixels are latched in the latch group 203 in synchronization with the input of the image data of the next line, and are multiplied by the filter matrix (step S).
2). The value thus obtained is added to the pixel of interest, and pixel data subjected to the filter operation is output (step S
3). The filter operation expression at this time is represented by filter = X << 2 − ((A << 2) + (B << 2) + C + D).

FIG. 15 is a flowchart showing a luminance-density conversion process.

This luminance-density conversion processing is performed in the following four values / 2
In the binarization processing, it is determined depending on whether the binarization is performed with a binary value or a quaternary value. That is, if it is determined in step S11 that the processing is to be performed in binary, the process proceeds to step S12, and a process of converting all white of the 8-bit data to "0" and converting all black to "63" density data is performed. If it is determined in step S11 that quaternary processing is to be performed, the flow advances to step S13 to perform processing for converting all whites of 8-bit data to "0" and all blacks to "255" density data. In step S14, the printer 7
If there is a density (density value "31" in the above example) at which image roughness occurs at 00, conversion to that density value is not performed. Note that such luminance-density conversion is preferably performed using a look-up table.

FIG. 16 is a flowchart showing the binary / quaternary conversion process. This process is performed using a binary or quaternary error diffusion process.

First, in step S21, the corrected density X'ij of the target pixel Xij is obtained. When the error one line before is stored in the error buffer, the correction density is determined using the value stored in the error buffer. Next, the process proceeds to step S22, where it is determined whether to perform the binary or quaternary error diffusion. When performing the quaternary error diffusion, the process proceeds to step S23, and the above equations (1) to (4) are performed.
As shown by, an output level (OUTPUT) and an error (E) are obtained by using three thresholds. When performing binary error diffusion, the process proceeds to step S24, and the output pixel value (OUTPUT) and error (E) are determined based on the threshold (BTH1) as shown in the above-described equations (5) and (6).

When the error is determined in this way, step S2
The process proceeds to step S5, where the weighted addition shown in FIG. 7 is executed, and the obtained error (E) is clamped to 6-bit data (step S26). Then, the process proceeds to step S27,
The obtained error (E) is stored in the error buffer and delayed by one line, and the delayed error is referred to in the error diffusion processing of the pixel of the next line.

FIG. 17 is a flowchart showing processing for developing binary / quaternary data into binary data (expressed by small dots).

In FIG. 17, the density gradient of the image is obtained, and the arrangement of the small dots is determined according to the density gradient. That is, in step S31, m-value image data is input, and it is determined whether the density gradient of pixels located on the left and right sides (main scanning direction) of the destination pixel of the image data is upward or downward (step S32). ), The pattern 0 (dots are developed from the right side) is selected (step S33), and the pattern 1 (dots are developed from the left side) is selected (step S33). Step S34).

In the case where there is no concentration gradient,
The arrangement of small dots is determined depending on whether the pixel of interest is an odd-numbered pixel or an even-numbered pixel. That is, in step S32, m-value image data is input, and it is checked whether or not the destination pixel of the image data has a density gradient. If there is no density gradient, whether the pixel of interest is an odd-numbered pixel or an even-numbered pixel is determined. (Step S35).
If it is an odd-numbered pixel, pattern 1 (dots are developed from the left) is selected (step S36). If it is an even-numbered pixel, pattern 0 (dots are developed from the right) is selected (step S37). ).

FIG. 18 is a diagram showing a binary signal according to another embodiment of the present invention.
It is a flowchart which shows a quaternary process.

First, in step S51, it is determined whether or not the input image data falls within a specific density range having a density that causes image unevenness in the printer 700. If it is determined that the density is out of the specific density range, the process proceeds to step S22 in FIG. 16 to execute the above-described processing.

If it is determined that the density is within the specific density range, the flow advances to step S52 to obtain a corrected density value by adding the error diffused to the input image data.
Compare with a threshold for comparison. Here, when the corrected density value is larger, the process proceeds to step S53, and the output pixel density (OUT
PUT) is set to “2”, and the error at that time is obtained. If the corrected density value is smaller, the process proceeds to step S54, where the output pixel density (OUTPUT) is set to "0", and the error at that time is obtained.
When the processing of step S53 or step S54 is completed, the process proceeds to step S25 of FIG. 16 to execute the above-described processing.

The present invention can be applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), but can be applied to a device including one device (for example, a copying machine, a facsimile machine). Etc.).

Further, an object of the present invention is to provide a storage medium storing a program code of software for realizing the functions of the above-described embodiments to a system or an apparatus, and to provide a computer (or CPU) of the system or apparatus.
Or MPU) reads and executes the program code stored in the storage medium.

In this case, the program code itself read from the storage medium implements the functions of the above-described embodiment, and the storage medium storing the program code constitutes the present invention.

Examples of the storage medium for supplying the program code include a floppy disk, hard disk, optical disk, magneto-optical disk, CD-ROM, and CD.
-R, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used.

When the computer executes the readout program code, not only the functions of the above-described embodiment are realized, but also the OS (Operating System) running on the computer based on the instruction of the program code. ) Performs part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

Further, after the program code read from the storage medium is written in the memory provided in the function expansion board inserted into the computer or the function expansion unit connected to the computer, the program code is read based on the instruction of the program code. The case where the CPU of the function expansion board or the function expansion unit performs part or all of the actual processing, and the function of the above-described embodiment is realized by the processing.

As described above, according to the present embodiment, the number of bits of the line buffer for extracting the reference data in the sub-scanning direction in the spatial filter processing unit is reduced, and furthermore, according to the binarization and quaternization, By switching the output range of the luminance / density conversion, the error data stored in the error diffusion by the error diffusion in the quaternary processing is clamped to the number of significant digits of the error buffer in the binarization. By sharing blocks, it is possible to generate image data that maximizes the capabilities of the recording system during copying.

[0112]

As described above, according to the present invention, the image quality of the output image can be improved by switching the output pattern of the m-value error diffusion in the specific density area of the input image data. .

Further, according to the present invention, there is an effect that the memory capacity of the line buffer for extracting the reference pixel data in the sub-scanning direction for the filter processing can be suppressed.

According to the present invention, the output range of the luminance-density conversion is switched in association with the subsequent binarization or multi-level conversion processing, and the conversion to the density which affects the output is prohibited. Thus, there is an effect that deterioration of the quality of the output image can be prevented.

Further, according to the present invention, when the m-valued image data is dot-developed, the pixels of the m-value input image data are symmetrical in the case of the even-numbered pixels and the odd-numbered pixels. By arranging the dots, there is an effect that the quality of an image recorded using the dots can be improved.

Further, according to the present invention, it is determined whether or not the pixel of interest has an intermediate value in the input image data of m values, and if the pixel has the intermediate value, adjacent pixels adjacent to the left and right of the pixel of interest are determined. By determining the dot arrangement based on the comparison result between the adjacent pixel and the target pixel with reference to the above, there is an effect that the reproducibility of the edge portion included in the image can be improved.

Further, according to the present invention, it is possible to express multi-value image data having a certain resolution by dots having a higher resolution and to record a high-quality image corresponding to the multi-value image data. is there.

[0118]

[Brief description of the drawings]

FIG. 1 is a functional block diagram illustrating a functional configuration of an image processing apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of an image processing apparatus according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating an example (A) of coefficients of a spatial filter and a correspondence (B) with each line buffer in the present embodiment.

FIG. 4 is a block diagram illustrating a configuration of a spatial filter processing unit according to the present embodiment.

FIG. 5 is a timing chart for explaining the timing of memory access in the spatial filter processing unit according to the present embodiment.

FIG. 6 is a diagram showing a luminance-density conversion characteristic (A) of the binary error diffusion processing unit and luminance-density conversion characteristics (B) and (C) of the quaternary error diffusion processing unit according to the present embodiment. is there.

FIG. 7 is a diagram illustrating weighting of error distribution in binary and quaternary error diffusion processing according to the present embodiment.

FIG. 8 is a block diagram illustrating a configuration of a binary and quaternary error diffusion processing unit according to the present embodiment.

FIG. 9 is a diagram illustrating an example of recording characteristics of quaternary data according to the present embodiment.

FIGS. 10A and 10B are diagrams illustrating generation of a pseudo line at an edge portion of image data, and FIG. 10B illustrating an example in which the generation of the pseudo line is suppressed according to the embodiment;

FIG. 11 is a block diagram illustrating a configuration of a binary / quaternary developing unit according to the present embodiment.

FIG. 12 shows a correspondence relationship between a density of data that has been developed in four values and a recording density in the related art (A) and a correspondence relationship between the density of data that has been developed in four values and the recording density in the present embodiment (B). FIG.

FIG. 13 shows binary and four values according to another embodiment of the present invention.
FIG. 3 is a block diagram illustrating a configuration of a value error diffusion processing unit.

FIG. 14 is a flowchart illustrating a spatial filter process in the image processing apparatus according to the present embodiment.

FIG. 15 illustrates luminance in the image processing apparatus according to the present embodiment.
It is a flowchart which shows a density conversion process.

FIG. 16 is a diagram illustrating a binary image in the image processing apparatus according to the present embodiment;
It is a flowchart which shows a quaternary process.

FIG. 17 is a diagram illustrating a binary image in the image processing apparatus according to the present embodiment;
It is a flowchart which shows a quaternary expansion process.

FIG. 18 illustrates a second example of the image processing apparatus according to another embodiment of the present invention.
It is a flowchart which shows a value / quaternization process.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 100 Scanner 120 CPU 121 RAM 122 Program memory 123 Look-up table (LUT) 124 Laplacian filter value 200 Spatial filter 201, 202 Line buffer 203 Latch group 300 Brightness-density conversion part 400 4-value / binarization processing part 401, 402 , 403 Latch 404, 405, 406, 407 Adder 408 Clamp circuit 409, 416 Comparator 410 Error calculator 411 Error allocator 500 Image memory 600 Binary / quaternary expansion unit 700 Printer

Claims (28)

[Claims] An image input means for inputting multi-valued image data in which one pixel is represented by n bits, a filter means for performing a spatial filter process on the multi-valued image data input by the image input means, With respect to the image data filtered by the filter means, each pixel data of the image data is converted into a binary or m
(M <n) value processing means, wherein the filter means includes storage means for storing each pixel data corresponding to the sub-scanning direction at the same address over a plurality of lines. apparatus. 2. The image processing apparatus according to claim 1, wherein the image data output from the filter unit is luminance data, and further includes a luminance / density conversion unit that converts the luminance data into density data and outputs the data to the processing unit. 2. The image processing device according to 1. 3. The storage means stores pixel data of one line at n bits per pixel and pixel data of another line at p (p <n) bits per pixel. The image processing device according to claim 1. 4. The brightness / density conversion means, when a binarization process is selected by the processing means, the output value range is 0 to 4.
The conversion is performed so that the density data becomes 63 (6 bits), and when the m-value processing is selected, the output value range is 0 to 255.
3. The image processing apparatus according to claim 2, wherein the image data is converted into density data (8 bits). 5. The processing unit executes m-value error diffusion processing, and an arithmetic processing unit and an error buffer for executing error distribution of the m-value error diffusion and binary error diffusion are commonly used. The image processing apparatus according to claim 1, wherein: 6. An arithmetic processing for error distribution, wherein said processing means clamps data calculated and stored in an error buffer to the number of significant digit bits of stored data generated in a binary error diffusion processing. The image processing apparatus according to claim 5, wherein: 7. The image processing apparatus according to claim 5, wherein the value of m in said processing means is 4. 8. The image processing apparatus according to claim 5, wherein the value of m in said processing means is 4, and the number of bits of data in the error buffer is 6 bits. 9. The brightness / density conversion unit according to claim 2, wherein when the processing unit performs the quaternization process, the brightness / density conversion unit ignores density data of a specific density and performs the brightness / density conversion. Image processing device. 10. An image input means for inputting multi-valued image data in which one pixel is represented by n bits, a filter means for performing a spatial filtering process on the multi-valued image data input by the image input means, With respect to the image data filtered by the filter means, each pixel data of the image data is converted into a binary or m
(M <n) value processing means, and the image data binarized or m-valued by the processing means,
Dot arrangement means for converting into an array of dots having a higher resolution than the resolution of the image data, wherein the dot arrangement means is symmetrical in the case of even-numbered pixels and in the case of odd-numbered pixels. An image processing apparatus, wherein 11. The image processing apparatus according to claim 10, wherein the value of m is 4, and the dot arrangement unit converts the m-valued image data into an array of three dots. . 12. An image input means for inputting multi-valued image data in which one pixel is represented by n bits, a filter means for performing a spatial filtering process on the multi-valued image data input by the image input means, With respect to the image data filtered by the filter means, each pixel data of the image data is converted into a binary or m
(M <n) value processing means, and the image data binarized or m-valued by the processing means,
Dot arrangement means for converting into an array of dots having a higher resolution than the resolution of the image data, wherein the dot arrangement means arranges the dots in a direction in which the dots are arranged in accordance with a density gradient of a pixel adjacent to a pixel of interest in the image data. An image processing apparatus characterized in that the image processing is different. 13. The value of m is 4, and the dot arrangement means converts the m-valued image data into an array of three dots, and shifts the dots to the right when the density gradient rises to the right. 13. The image processing apparatus according to claim 12, wherein the dots are arranged from the left side when the density gradient is lower right. 14. An image input means for inputting multi-valued image data in which one pixel is represented by n bits, and the density of each pixel of the multi-valued image data input by the image input means is within a predetermined density range. Determining means for determining whether or not the multi-valued image data is converted to m-valued (m <n) -valued image data according to the determination result of the determining means; And an error allocating means for weighting the error obtained by the converting means and allocating the error to peripheral pixels of a target pixel of the multi-valued image data. Processing equipment. 15. An image inputting step of inputting multi-valued image data in which one pixel is represented by n bits, and the multi-valued image data input in the image inputting step corresponds to a sub-scanning direction over a plurality of lines. A step of storing each pixel data at an address of the same memory; a filtering step of performing a spatial filtering process on the multi-valued image data stored in the memory; and an image data filtered by the filtering step. Each pixel data of the image data is binary or m
(M <n) an image processing method. 16. The image processing method according to claim 15, wherein the image data outputted by the filtering step is luminance data, and further comprising a step of converting the luminance data into density data and outputting the same to the processing step. Image processing method. 17. The memory according to claim 1, wherein the memory stores pixel data of one line at n bits per pixel, and stores pixel data of another line at p (p <n) bits per pixel. Item 16. The image processing method according to Item 15. 18. When the binarization processing is selected in the processing step, the output value is converted into density data having a range of 0 to 63 (6 bits), and when the m-value processing is selected. 17. The image processing method according to claim 16, wherein the image data is converted into density data whose output value range is 0 to 255 (8 bits). 19. In the processing step, an m-value error diffusion process is executed, and an arithmetic processing unit and an error buffer for executing the error distribution of the m-value error diffusion and the binary error diffusion are commonly used. The image processing method according to claim 15, wherein: 20. In the processing step, in the arithmetic processing for the error distribution, the data calculated and stored in the error buffer is clamped to the number of significant digits of the stored data generated in the binary error diffusion processing. 20. The image processing method according to claim 19, wherein: 21. The image processing method according to claim 19, wherein the value of m in said processing step is 4. 22. The image processing method according to claim 19, wherein the value of m in the processing step is 4, and the number of bits of the data in the error buffer is 6 bits. 23. The image processing method according to claim 16, wherein, when performing the quaternization processing in the processing step, the luminance density conversion is performed ignoring density data of a specific density. 24. An image inputting step of inputting multi-valued image data in which one pixel is represented by n bits, a filtering step of performing a spatial filtering process on the multi-valued image data input in the image inputting step, With respect to the image data filtered by the filtering step, each pixel data of the image data is converted into a binary or m
(M <n) a processing step of binarizing, and the image data binarized or m-valued in the processing step,
The dots are converted into an array of dots having a higher resolution than the resolution of the image data, and are arranged so that the arrangement of the dots of the image data is symmetric between the case of the even-numbered pixels and the case of the odd-numbered pixels. An image processing method comprising: an arranging step. 25. The image processing method according to claim 24, wherein the value of m is 4, and in the dot arranging step, the m-valued image data is converted into an array of three dots. . 26. An image inputting step of inputting multi-valued image data in which one pixel is represented by n bits, a filtering step of performing a spatial filtering process on the multi-valued image data input in the image inputting step, With respect to the image data filtered by the filtering step, each pixel data of the image data is converted into binary or m
(M <n) a processing step of binarizing, and the image data binarized or m-valued in the processing step,
A dot arrangement step of converting the image data into an array of dots having a higher resolution than the resolution of the image data, and changing the arrangement direction of the dots in accordance with the density gradient of a pixel adjacent to the pixel of interest in the image data. Image processing method. 27. The value of m is 4, and in the dot arrangement step, m-valued image data is converted into an array of three dots, and when the density gradient rises to the right, the dots are shifted to the right. 27. The image processing method according to claim 26, wherein the dots are arranged from the left side when the density gradient is lower right. 28. An image inputting step of inputting multivalued image data in which one pixel is represented by n bits, and the density of each pixel of the multivalued image data input in the image inputting step is within a predetermined density range. Determining whether or not the multi-valued image data is converted into m (m <n) -valued image data in accordance with a result of the determination in the determining step; And an error distribution step of weighing the error obtained in the conversion step and allocating the error to peripheral pixels of a target pixel of the multi-valued image data. Image processing method.