JPH10104559A - Optical waveguide device - Google Patents

Optical waveguide device

Info

Publication number
JPH10104559A
JPH10104559A JP25811096A JP25811096A JPH10104559A JP H10104559 A JPH10104559 A JP H10104559A JP 25811096 A JP25811096 A JP 25811096A JP 25811096 A JP25811096 A JP 25811096A JP H10104559 A JPH10104559 A JP H10104559A
Authority
JP
Japan
Prior art keywords
electrode
optical waveguide
layer
conductive layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25811096A
Other languages
Japanese (ja)
Inventor
Yuji Kishida
裕司 岸田
Koji Takemura
浩二 竹村
Ryuji Yoneda
竜司 米田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP25811096A priority Critical patent/JPH10104559A/en
Publication of JPH10104559A publication Critical patent/JPH10104559A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a device with excellent reliability capable of suppressing a temp. drift with simple constitution by forming a conductive layer with specific resistance smaller than a specified value on a surface of a pyroelectric substrate and electrically connecting the conductive layer to an electrode layer. SOLUTION: A light modulator S1 consists of the pyroelectric substrate 1, a dielectric layer 3, the conductive layer 5 and electrodes (GND electrode 10a, signal electrode 10b, GND electrode 10c). The pyroelectric substrate 1 on whose one main surface an optical waveguide 2 is formed, and the dielectric layer 3 is formed on one area containing this optical waveguide 2. The conductive layer 5 is formed on a belt like groove 9 formed on the dielectric layer 3 along the optical waveguide 2, and whose specific resistance is smaller than 10<6> Ω.cm. The conductive layer 5 is connected to the electrode layer electrically. This conductive layer 5 forms the groove 9 arriving at the surface of the pyroelectric substrate 1 between the signal electrode 10b and the GND electrode 10a, and between the signal electrode 10b and the GND electrode 10c to be formed on the pyroelectric substrate 1 surface.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、光通信分野で用い
られる光変調器,光スイッチ等の光導波路デバイスに関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical waveguide device such as an optical modulator and an optical switch used in the optical communication field.

【0002】[0002]

【従来の技術とその課題】次世代大容量光通信の実用化
にともない、高速光変調器,光スイッチ等の光制御デバ
イスが必要とされている。特に、ニオブ酸リチウム(L
iNbO3 )等から成る強誘電体基板の電気光学効果を
利用した導波路型光制御デバイス(以下、光導波路デバ
イスという)は、低挿入損失で且つ高速動作が可能であ
るため大変有望視されている。
2. Description of the Related Art With the practical use of next-generation large-capacity optical communication, optical control devices such as high-speed optical modulators and optical switches are required. In particular, lithium niobate (L
A waveguide-type optical control device (hereinafter, referred to as an optical waveguide device) using the electro-optic effect of a ferroelectric substrate made of iNbO 3 ) or the like is very promising because of its low insertion loss and high-speed operation. I have.

【0003】従来、この種の強誘電体基板を用いた光導
波路デバイスでは、基板の表面に形成された光導波路に
最も有効に電界が作用する基板方位としてZカットが主
に採用されてきた。
Conventionally, in an optical waveguide device using a ferroelectric substrate of this type, Z-cut has been mainly employed as a substrate orientation in which an electric field acts most effectively on an optical waveguide formed on the surface of the substrate.

【0004】ところが、強誘電体の特性として焦電性が
あるため、温度変化により分極の方位であるc面、すな
わち基板の(001)面に静電気が生じ、特性に経時変
化を与えるといった問題があった。すなわち、光導波路
に電界を印加するための複数の電極が基板表面を覆う部
分において、基板の分極に対応した電荷が誘起されるの
に対して、電極が基板表面を覆わない部分では、基板の
分極に対応した電荷が基板表面に容易に供給されない。
このため、温度変化により基板の分極が変化すると電極
が基板表面を覆わない部分で電荷の不均一が生じ,光導
波路にこのような不均一な電荷による電界が印加され
て、温度ドリフトが生ずるというものである(例えば、
信学技報、OQE86-44 p115-121 佐脇他を参照)。
However, since the ferroelectric material has pyroelectricity, static electricity is generated on the c-plane, which is the direction of polarization, that is, the (001) plane of the substrate due to a temperature change, and the characteristics change over time. there were. That is, in a portion where a plurality of electrodes for applying an electric field to the optical waveguide cover the substrate surface, a charge corresponding to the polarization of the substrate is induced, whereas in a portion where the electrode does not cover the substrate surface, a portion of the substrate is covered. The charge corresponding to the polarization is not easily supplied to the substrate surface.
For this reason, when the polarization of the substrate changes due to a temperature change, non-uniformity of charge occurs in a portion where the electrode does not cover the surface of the substrate, and an electric field due to such non-uniform charge is applied to the optical waveguide, thereby causing a temperature drift. (For example,
See IEICE Technical Report, OQE86-44, p115-121, Sawaki et al.).

【0005】そこで、この問題を解決する方策として、
以下に示すものが提案されている。図5は光導波路デバ
イスJ1において、焦電性の基板51の表面に形成され
た光導波路52の入射方向に対して直交する方向で切断
した断面図であるが、基板51の一主面にバッファー層
53,半導電性膜54,電極55が順次積層された構造
となっている。ここで、電極55が基板51の表面を覆
わない部分をITO等、ある程度導電性を有し且つ電極
間に電界が印加できる程度の抵抗率を有する半導電性膜
54で覆い、電極55と接続させることにより、温度変
化により生じる基板51の表面電荷を均一化するもので
ある(例えば、特公平5−78016号公報を参照)。
Therefore, as a measure for solving this problem,
The following are proposed: FIG. 5 is a cross-sectional view of the optical waveguide device J1 cut in a direction orthogonal to the incident direction of the optical waveguide 52 formed on the surface of the pyroelectric substrate 51. It has a structure in which a layer 53, a semiconductive film 54, and an electrode 55 are sequentially laminated. Here, the portion where the electrode 55 does not cover the surface of the substrate 51 is covered with a semiconductive film 54 such as ITO having a certain degree of conductivity and having a resistivity sufficient to apply an electric field between the electrodes. By doing so, the surface charge of the substrate 51 generated by the temperature change is made uniform (for example, see Japanese Patent Publication No. 5-78016).

【0006】[0006]

【発明が解決しようとする課題】しかしながら,このよ
うな半導電性膜は実質的な導通を阻止する抵抗値を有す
るものの、電圧を印加する電極間を導体で接続するた
め、直流から低周波の電圧印加時には電圧が有効に印加
されないといった問題があった。また導通を阻止するた
めの抵抗と基板の表面電荷を速やかに均一にするための
導通を兼ね備えるという相矛盾する条件を制御する必要
があるため、作製時に抵抗値を制御するのが厳しく、ま
た経時変化により特性が変動するといった問題があっ
た。また、半導電性膜がマイクロ波電界が作用する領域
に近接しているため、マイクロ波伝送路の誘電損失を生
じさせ、ひいては電極の周波数特性を悪化させるといっ
た問題があった。
However, although such a semiconductive film has a resistance value for preventing substantial conduction, it connects between electrodes to which a voltage is applied by a conductor, so that a direct current to a low frequency is applied. There has been a problem that voltage is not applied effectively when voltage is applied. In addition, it is necessary to control inconsistent conditions of providing resistance for preventing conduction and conduction for quickly uniformizing the surface charge of the substrate, so that it is strict to control the resistance value during fabrication, There was a problem that the characteristics fluctuated due to the change. Further, since the semiconductive film is close to the region where the microwave electric field acts, there is a problem that a dielectric loss of the microwave transmission line is caused, and the frequency characteristics of the electrode are deteriorated.

【0007】そこで、本発明は上述した諸問題を克服
し、簡便な構成であるとともに製造プロセスが容易で、
しかも温度ドリフトを極力抑えることが可能な優れた光
導波路デバイスを提供する。
Therefore, the present invention overcomes the above-mentioned problems and has a simple structure and a simple manufacturing process.
Moreover, an excellent optical waveguide device capable of minimizing temperature drift is provided.

【0008】[0008]

【課題を解決するための手段】上記課題を解決する光導
波路デバイスは、焦電性基板の表層に形成された光導波
路上に、誘電体層及び電極層を順次積層して成る光導波
路デバイスであって、焦電性基板の表面に比抵抗値が1
6 Ω・cmより小さい導電層を形成させるとともに、該
導電層を電極層に電気的に接続させたことを特徴とす
る。
An optical waveguide device for solving the above problems is an optical waveguide device comprising a dielectric layer and an electrode layer sequentially laminated on an optical waveguide formed on a surface layer of a pyroelectric substrate. And the specific resistance value is 1 on the surface of the pyroelectric substrate.
Together to form 0 6 Ω · cm smaller conductive layer, characterized in that is electrically connected to the conductive layer on the electrode layer.

【0009】また、導電層の一部は誘電体層とほぼ同一
平面内にあり、電極層の側端面から所定距離だけ隔てて
形成されていてもよいし、また、導電層の一部が焦電性
基板表層の一領域に形成された溝の内壁に形成されてい
てもよい。また、この光導波路デバイスの製造方法は、
焦電性基板に光導波路を形成する工程と、焦電性基板上
に誘電体層と半導体もしくは導体からなる導電層とを同
時にパターン形成する工程と、下地電極と厚膜電極と順
次積層させてパターン形成する工程とからなる。
Further, a part of the conductive layer is substantially in the same plane as the dielectric layer, and may be formed at a predetermined distance from a side end face of the electrode layer. It may be formed on the inner wall of a groove formed in one region of the surface layer of the conductive substrate. In addition, the method for manufacturing the optical waveguide device includes:
A step of forming an optical waveguide on the pyroelectric substrate, a step of simultaneously patterning a dielectric layer and a conductive layer made of a semiconductor or a conductor on the pyroelectric substrate, and sequentially laminating a base electrode and a thick film electrode. And forming a pattern.

【0010】[0010]

【発明の実施の形態】本発明に係る第一の実施例を光導
波路デバイスのひとつである光変調器について図面に基
づき説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment according to the present invention will be described with reference to the drawings for an optical modulator which is one of optical waveguide devices.

【0011】まず、光変調器の概略構成について説明す
る。図1(a)〜(c)に示すように、光変調器S1
は、一主面に光導波路2が形成された例えばニオブ酸リ
チウム、タンタル酸リチウムから成る焦電性基板(以
下、基板という)1と、この基板1の光導波路2を含む
一領域上に形成されたSiO2 ,Al2 3 等から成る
バッファ層である誘電体層3と、光導波路2に沿って誘
電体層3に形成された帯状の溝9に形成された、Siや
SiOx (シリコンリッチの酸化シリコン)から成る半
導体、もしくはCr,Ti,Ni,Mo,Au,Pt,
Ag,Cu,Al,Nb,及びこれら元素を含む合金、
酸化物、または導電性ポリマー等から成り、比抵抗値が
106 Ω・cmより小さい導電層5と、誘電体層3の一領
域上に光導波路2に沿って形成され、下地電極層6,7
上に厚膜電極層であるメッキ層8を積層させて成る電極
層であるCPW(コプレーナウェーブガイド)電極10
(グラウンド(以下、GND)電極10a,信号電極1
0b,GND電極10c)とから構成される。
First, a schematic configuration of the optical modulator will be described. As shown in FIGS. 1A to 1C, the optical modulator S1
Is formed on a pyroelectric substrate (hereinafter, referred to as a substrate) 1 made of, for example, lithium niobate or lithium tantalate having an optical waveguide 2 formed on one principal surface, and formed on one region of the substrate 1 including the optical waveguide 2. A dielectric layer 3 as a buffer layer made of SiO 2 , Al 2 O 3, etc., and a strip-shaped groove 9 formed in the dielectric layer 3 along the optical waveguide 2. (Rich silicon oxide) or Cr, Ti, Ni, Mo, Au, Pt,
Ag, Cu, Al, Nb and alloys containing these elements,
A conductive layer 5 made of an oxide or a conductive polymer and having a specific resistance of less than 10 6 Ω · cm; and a base electrode layer 6 formed on one region of the dielectric layer 3 along the optical waveguide 2. 7
A CPW (coplanar waveguide) electrode 10 which is an electrode layer formed by laminating a plating layer 8 as a thick film electrode layer thereon.
(Ground (hereinafter referred to as GND) electrode 10a, signal electrode 1
0b, GND electrode 10c).

【0012】ここで、導電層5は、信号電極10bとG
ND電極10aとの電極間、及び信号電極10bとGN
D電極10cとの電極間において、基板1の表面に達す
る溝を形成しその基板表面上に形成されている。また、
導電層5の両端部においては、導電層5は信号電極10
bと接続されており、これにより導電層5に電荷の供給
を行い、より一層温度ドリフトを抑制することができる
が、比抵抗値が106Ω・cm以上となると温度ドリフト
の抑制が困難となる。
Here, the conductive layer 5 is formed between the signal electrode 10b and the G electrode.
Between the ND electrode 10a and the signal electrode 10b and the GN
A groove reaching the surface of the substrate 1 is formed between the electrode and the D electrode 10c and formed on the substrate surface. Also,
At both ends of the conductive layer 5, the conductive layer 5 is
b, thereby supplying electric charge to the conductive layer 5 and further suppressing the temperature drift. However, when the specific resistance value is 10 6 Ω · cm or more, it is difficult to suppress the temperature drift. Become.

【0013】このように、簡便な作製工程でCPW電極
10内を伝搬するマイクロ波電界に与える誘電損失の影
響を低減することができ、高周波伝送特性を改善するこ
とができる。
As described above, the effect of dielectric loss on the microwave electric field propagating in the CPW electrode 10 can be reduced by a simple manufacturing process, and the high-frequency transmission characteristics can be improved.

【0014】一般にCPW型電極では、マイクロ波がG
ND電極10a,GND電極10c間に閉じこめられて
伝搬する。その際、上記電極間近傍の導電性は媒質の等
価的なtanδに直接影響を与え誘電体損失の要因とな
る。本発明は従来例と比較して温度ドリフトを抑制する
ための導電層5をマイクロ波の電磁界領域から遠ざけた
ことにより、より誘電損失を低減できるようにしたもの
である。その効果の度合いは、電極設計(信号電極10
bの幅;電極幅w、電極間距離g、GND電極10a,
信号電極10b,GND電極10cの厚さ;電極層厚
d,誘電体層厚tで示される)において、誘電体層厚t
を厚くするか、または電極間隔gを狭く設計したときに
より顕著となり、しかも導電層5に用いられる材料の選
択の自由度を広げることができる。
Generally, in a CPW type electrode, microwave
The light is confined and propagated between the ND electrode 10a and the GND electrode 10c. At this time, the conductivity in the vicinity of the electrode directly affects the equivalent tan δ of the medium, which causes a dielectric loss. In the present invention, the dielectric loss can be further reduced by moving the conductive layer 5 for suppressing temperature drift away from the microwave electromagnetic field region as compared with the conventional example. The degree of the effect depends on the electrode design (signal electrode 10
b width: electrode width w, distance g between electrodes, GND electrode 10a,
(Thickness of signal electrode 10b and GND electrode 10c; indicated by electrode layer thickness d and dielectric layer thickness t).
This becomes more remarkable when the thickness is increased or the electrode gap g is designed to be narrow, and the degree of freedom in selecting the material used for the conductive layer 5 can be increased.

【0015】なお、本実施例においては光導波路デバイ
スとして光変調器について説明したがこれに限定される
ものではなく、光スイッチ等の各種焦電性基板上に光導
波路や電極等を形成させた各種光導波路デバイスに適用
が可能であり、本発明の要旨を逸脱しない範囲で適宜変
更し実施が可能である。
In this embodiment, an optical modulator has been described as an optical waveguide device. However, the present invention is not limited to this. An optical waveguide, an electrode, and the like are formed on various pyroelectric substrates such as an optical switch. The present invention can be applied to various optical waveguide devices, and can be appropriately modified and implemented without departing from the gist of the present invention.

【0016】[0016]

【実施例】【Example】

〔実施例1〕次に、光変調器S1の具体的且つ代表的な
作製方法について図面に基づいて説明する。
[Embodiment 1] Next, a specific and representative manufacturing method of the optical modulator S1 will be described with reference to the drawings.

【0017】図2(a)に示すように、両面鏡面研磨さ
れたオプティカルグレードのニオブ酸リチウム単結晶
(Zカット;カット面すなわち表面が(001) 面)の基板
1上に、リフトオフ法を用いてTi薄膜パターン21を
形成した後、図2(b)に示すように、このTi薄膜パ
ターン21から基板1に約1050℃で熱拡散せしめ光
導波路2を形成した。
As shown in FIG. 2A, a lift-off method is used on a substrate 1 of an optical grade lithium niobate single crystal (Z cut; cut surface, ie, surface is (001) surface) which has been mirror-polished on both sides. After the formation of the Ti thin film pattern 21, the optical waveguide 2 was formed by thermally diffusing the Ti thin film pattern 21 from the Ti thin film pattern 21 to the substrate 1 at about 1050 ° C. as shown in FIG.

【0018】次に、図2(c)に示すように、基板1上
にバッファ層となるSiO2 薄膜の誘電体層3を約2μ
m厚にスパッタリングにより積層させ、抵抗率を向上さ
せる目的で約700℃の熱処理を施した。さらに、図2
(d)に示すように、導電層5となるパターン上の誘電
体層3をエッチングするためのフォトリソグラフィーを
行った。このときフォトレジストパターン22の断面形
状をパターンエッジ部で逆テーパ形状にした。そして、
図2(e)に示すように、SiO2 薄膜のエッチングを
行った後、図2(f)に示すように、Ti薄膜23を約
0.02μm厚に真空蒸着して、次いでリフトオフを行
い、誘電体層3および導電層5のパターン形成を同時に
所定の位置に行った。
Next, as shown in FIG. 2C, a dielectric layer 3 of a SiO 2 thin film serving as a buffer layer is formed on the substrate 1 by about 2 μm.
An m-thick layer was formed by sputtering, and a heat treatment at about 700 ° C. was performed for the purpose of improving the resistivity. Further, FIG.
As shown in (d), photolithography for etching the dielectric layer 3 on the pattern to be the conductive layer 5 was performed. At this time, the cross-sectional shape of the photoresist pattern 22 was formed into an inversely tapered shape at the pattern edge. And
After etching the SiO 2 thin film as shown in FIG. 2E, a Ti thin film 23 is vacuum-deposited to a thickness of about 0.02 μm as shown in FIG. The pattern formation of the dielectric layer 3 and the conductive layer 5 was simultaneously performed at a predetermined position.

【0019】次に、図2(g)に示すように、CPW電
極10のリフトオフ用のフォトリソグラフィーにより、
導電層5上にフォトレジスト24を積層した後、図2
(h)に示すように、第1の下地電極層6としてクロム
(Cr)を厚さ0.05μm、第2の下地電極層7とし
て金(Au)を厚さ0.5μmを順次蒸着し、図2
(i)に示すように、リフトオフすることによりCPW
電極10の下地電極パターンを形成した。また、第1の
下地電極層6の電極引き出し部に帯状の導電層5と電極
層10bとの電気的コンタクトをとるための引き出し部
を形成した。
Next, as shown in FIG. 2G, photolithography for lift-off of the CPW electrode 10 is performed.
After the photoresist 24 is laminated on the conductive layer 5, FIG.
As shown in (h), chromium (Cr) is deposited as the first base electrode layer 6 to a thickness of 0.05 μm and gold (Au) is deposited to a thickness of 0.5 μm as the second base electrode layer 7 in order. FIG.
As shown in (i), by lifting off, CPW
A base electrode pattern of the electrode 10 was formed. Further, a lead portion for making electrical contact between the strip-shaped conductive layer 5 and the electrode layer 10b was formed in the electrode lead portion of the first base electrode layer 6.

【0020】次に、図2(j)に示すように、フォトリ
ソグラフィーにより電極部分以外をフォトレジスト25
で覆い、図2(k)に示すように、第2の下地電極層7
上に金のメッキ層8を積層して、最終的に図2(l)に
示すように、マッハツェンダー干渉計型の光(強度)変
調器S1を作製した。
Next, as shown in FIG. 2 (j), a photoresist 25 except for the electrode portion is formed by photolithography.
, And as shown in FIG.
A gold plating layer 8 was laminated thereon, and finally a Mach-Zehnder interferometer type light (intensity) modulator S1 was manufactured as shown in FIG.

【0021】次に、作製した光変調器S1の温度ドリフ
ト特性結果について説明する。
Next, the result of the temperature drift characteristic of the manufactured optical modulator S1 will be described.

【0022】ここで、温度ドリフトΔDは図3に示すよ
うにΔD=(ΔV/Vπ)×100で定義される。従来
例よりも緩和時間が短くなるのは導電層5に導体である
Tiを用いたため、焦電効果により生じた電荷を急速に
均一化できたことが考えられる。一方、電極のS21特性
を従来例と比較すると、従来例に比して幾分か帯域制限
を受けているが、十分、実用上問題ない特性が得られて
いる。
Here, the temperature drift ΔD is defined by ΔD = (ΔV / Vπ) × 100 as shown in FIG. It is considered that the reason why the relaxation time is shorter than in the conventional example is that the electric charge generated by the pyroelectric effect could be rapidly uniformed because the conductive layer 5 was made of Ti, which is a conductor. On the other hand, when the S21 characteristic of the electrode is compared with that of the conventional example, the band is somewhat limited as compared with the conventional example, but a characteristic that is sufficient and has no practical problem is obtained.

【0023】本実施例においては、導電層5に真空蒸着
により成膜したTi薄膜を用いたが、成膜方法は真空蒸
着以外にもスパッタリング等他の成膜方法を用いても同
様の効果が得られる。また、材料はTi以外にもSiや
SiOx (シリコンリッチの酸化シリコン)から成る半
導体もしくはCr,Ti,Ni,Mo,Au,Pt,A
g,Cu,Al,Nb,これらの元素を含む合金、酸化
物、または導電性ポリマーを用いても同様の効果が得ら
れる。電極設計により、導体もしくは半導体材料の中で
種々、最適な抵抗率を有する材料を選択すれば良い。そ
の場合の設計の方針としてバッファー層の膜厚は1.5
μm以上、電極幅8μm以下、導電層の抵抗率106 Ω
・cm以下、導電層の膜厚とパターン幅はいずれの成膜
法や材料を用いたときでも、膜厚は高周波の特性上バッ
ファー層の膜厚の1/10以下が望ましい。また、パタ
ーンは電極間隔の半分以上を占める必要がある。以上の
ような方法で、光変調器を作製すれば温度ドリフト特
性、高周波特性ともに良好な特性を得ることができる。
In this embodiment, a Ti thin film formed by vacuum deposition on the conductive layer 5 is used. However, the same effect can be obtained by using other film formation methods such as sputtering other than vacuum deposition. can get. The material is not limited to Ti, but may be a semiconductor made of Si or SiOx (silicon-rich silicon oxide) or Cr, Ti, Ni, Mo, Au, Pt, A
Similar effects can be obtained by using g, Cu, Al, Nb, an alloy containing these elements, an oxide, or a conductive polymer. Depending on the electrode design, various materials having an optimum resistivity may be selected from the conductor or the semiconductor material. As a design policy in that case, the thickness of the buffer layer is 1.5
μm or more, electrode width 8 μm or less, resistivity of conductive layer 10 6 Ω
Cm or less, and the thickness and pattern width of the conductive layer are desirably 1/10 or less of the thickness of the buffer layer due to high frequency characteristics, regardless of which film forming method or material is used. Further, the pattern needs to occupy at least half of the electrode interval. If an optical modulator is manufactured by the above-described method, favorable characteristics can be obtained for both temperature drift characteristics and high-frequency characteristics.

【0024】〔実施例2〕次に本発明に係る他の実施例
を図4(a)〜(l)に示す。本実施例でも、図4
(l)に示すように、一主面に光導波路2及び光導波路
2に沿って帯状の溝9が形成された例えばニオブ酸リチ
ウム、タンタル酸リチウムから成る焦電性基板(以下、
基板という)1と、この基板1の光導波路2を含む一領
域上に形成されたSiO2 ,Al2 O3 等から成る誘電
体である誘電体層3と、その他領域上に形成されたSi
やSiOx (シリコンリッチの酸化シリコン)から成る
半導体、もしくはCr,Ti,Ni,Mo,Au,P
t,Ag,Cu,Al,Nb,これらの元素を含む合
金、酸化物、または導電性ポリマーから成る、比抵抗値
が106 Ω・cmより小さい導電層5と、誘電体層3の一
領域上に光導波路2に沿って形成された下地層上に厚膜
電極層を積層させて成る電極層であるCPW電極10
(GND電極10a,信号電極10b,GND電極10
c)とから構成される。
Embodiment 2 Next, another embodiment according to the present invention will be described with reference to FIGS. Also in this embodiment, FIG.
As shown in (l), a pyroelectric substrate (hereinafter, referred to as lithium niobate or lithium tantalate) having an optical waveguide 2 and a strip-shaped groove 9 formed along the optical waveguide 2 on one principal surface is formed.
A dielectric layer 3 made of SiO2, Al2 O3 or the like formed on one area including the optical waveguide 2 of the substrate 1 and Si formed on another area.
Or a semiconductor made of SiOx (silicon-rich silicon oxide) or Cr, Ti, Ni, Mo, Au, P
a conductive layer 5 made of t, Ag, Cu, Al, Nb, an alloy, an oxide or a conductive polymer containing these elements and having a specific resistance of less than 10 6 Ω · cm; and one region of the dielectric layer 3 A CPW electrode 10 which is an electrode layer obtained by laminating a thick film electrode layer on a base layer formed on the optical waveguide 2
(GND electrode 10a, signal electrode 10b, GND electrode 10
c).

【0025】また、導電層5は光導波路2に沿って形成
された帯状の溝9の表層に形成され、信号電極10bと
電気的に接続されている。これにより導電層5に電荷の
供給を行い、温度ドリフトを抑制し、かつCPW電極1
0内を伝搬するマイクロ波電界に与える誘電損失の影響
を極力低減することができ、さらに高周波伝送特性を著
しく改善することができる。
The conductive layer 5 is formed on the surface of the strip-shaped groove 9 formed along the optical waveguide 2, and is electrically connected to the signal electrode 10b. Thus, electric charges are supplied to the conductive layer 5, the temperature drift is suppressed, and the CPW electrode 1 is supplied.
The effect of dielectric loss on the microwave electric field propagating inside 0 can be reduced as much as possible, and the high-frequency transmission characteristics can be significantly improved.

【0026】実施例1で述べたとおり、温度ドリフト改
善するためにCPW電極10近傍に形成される導電層5
は、電極間近傍に誘電体損失を与える要因となる。本実
施例は実施例1にも増して導電層5をマイクロ波の電磁
界領域から遠ざけたことにより,さらに誘電損失を低減
できる。その効果は電極設計(信号電極10bの幅;電
極幅w,電極間11aの幅;電極間隔g,電極間11b
の幅;電極間隔g,GND電極10a,信号電極10
b,GND電極10cの厚さ;電極層厚d,バッファー
層厚T1 ,溝9の深さT2 で示される)において、バッ
ファー層厚dを厚くするか、溝9の深さT2 を深くする
か、または電極間隔gを狭く設計したとき、より顕著と
なり、導電層5に用いられる材料の選択の自由度を広げ
ることができる。
As described in the first embodiment, the conductive layer 5 formed near the CPW electrode 10 to improve the temperature drift
Is a factor that gives a dielectric loss near the electrodes. This embodiment can further reduce the dielectric loss by separating the conductive layer 5 from the microwave electromagnetic field region as compared with the first embodiment. The effect is electrode design (the width of the signal electrode 10b; the electrode width w, the width of the electrode 11a; the electrode gap g, the electrode 11b
Width; electrode spacing g, GND electrode 10a, signal electrode 10
b, the thickness of the GND electrode 10c; indicated by the electrode layer thickness d, the buffer layer thickness T1, and the depth T2 of the groove 9), whether the buffer layer thickness d is increased or the depth T2 of the groove 9 is increased. Alternatively, when the electrode spacing g is designed to be narrow, it becomes more remarkable, and the degree of freedom in selecting the material used for the conductive layer 5 can be increased.

【0027】次に、光変調器S2の具体的且つ代表的な
作製方法について説明する。図4(a)に示すように、
両面鏡面研磨されたオプティカルグレードのニオブ酸リ
チウム単結晶(Zカット;カット面すなわち表面が(00
1) 面)の基板1上に、リフトオフ法を用いてTi薄膜
パターンを形成した後、そして、図4(b)に示すよう
に、このTi薄膜パターンから基板1に約1050℃で
熱拡散せしめ光導波路2を形成した。
Next, a specific and typical manufacturing method of the optical modulator S2 will be described. As shown in FIG.
Optical grade lithium niobate single crystal polished on both sides (Z cut;
1) After forming a Ti thin film pattern on the surface 1 of the substrate 1 by a lift-off method, and as shown in FIG. 4B, the Ti thin film pattern is thermally diffused to the substrate 1 at about 1050 ° C. The optical waveguide 2 was formed.

【0028】次に、図4(c)に示すように、基板1上
にSiO2 薄膜の誘電体層3を約2μm、スパッタリン
グにより積層させ、抵抗率を向上させる目的で約700
℃の熱処理を施した。
Next, as shown in FIG. 4C, a dielectric layer 3 of an SiO 2 thin film is laminated on the substrate 1 by sputtering to a thickness of about 2 μm, and the dielectric layer 3 is formed to a thickness of about 700 μm for the purpose of improving the resistivity.
The heat treatment of ° C was performed.

【0029】次に、図4(d)に示すように、光導波路
2の形成法と同様、リフトオフ法を用いてTi薄膜パタ
ーン26を光導波路2に沿って形成し、そのTi薄膜パ
ターン26をマスクにしてRIE(リアクティブ・イオ
ン・エッチング)法により、図4(e)に示すように、
誘電体層3及び基板1に帯状の溝9を形成した。そし
て、図4(f)に示すように、RIEに用いたTi薄膜
26をエッチング除去した後、図4(g)に示すよう
に、帯状の溝9以外の部分にフォトレジストを形成し、
図4(h)に示すように、リフトオフ法により帯状の溝
9の内面にTi薄膜パターンを膜厚約0.02μm程度
に形成し導電層5を形成した。この方法により、簡単な
工程で精度よく、帯状の溝9,誘電体層3,導電層5の
パターン形成を行うことができる。
Next, as shown in FIG. 4D, a Ti thin film pattern 26 is formed along the optical waveguide 2 by using a lift-off method as in the method of forming the optical waveguide 2, and the Ti thin film pattern 26 is formed. By using RIE (reactive ion etching) as a mask, as shown in FIG.
A strip-shaped groove 9 was formed in the dielectric layer 3 and the substrate 1. Then, as shown in FIG. 4 (f), after the Ti thin film 26 used for RIE is removed by etching, as shown in FIG. 4 (g), a photoresist is formed on a portion other than the strip-shaped groove 9, and
As shown in FIG. 4H, a Ti thin film pattern was formed on the inner surface of the strip-shaped groove 9 to a thickness of about 0.02 μm by a lift-off method, and the conductive layer 5 was formed. According to this method, the pattern formation of the strip-shaped groove 9, the dielectric layer 3, and the conductive layer 5 can be performed accurately with a simple process.

【0030】次に、図4(i)に示すように、誘電体層
3の上にCPW電極10のリフトオフ用のフォトリソグ
ラフィーを行うために、導電層5上にフォトレジスト2
9を積層し、その後、図4(j)に示すように、第1の
下地電極6としてクロム(Cr)を厚さ0.05μm、
第2の下地電極7として金(Au)を厚さ0.5μmを
順次蒸着し、リフトオフすることによりCPW電極10
の下地電極パターンを形成した。また、下地電極6の電
極引き出し部に帯状の導電層5と電極層10bとの電気
的コンタクトをとるための引き出し部を形成した。
Next, as shown in FIG. 4I, in order to perform photolithography for lift-off of the CPW electrode 10 on the dielectric layer 3, a photoresist 2
Then, as shown in FIG. 4 (j), chromium (Cr) was used as the first under electrode 6 to a thickness of 0.05 μm,
A second underlayer electrode 7 is formed by sequentially depositing gold (Au) with a thickness of 0.5 μm and lifting off the CPW electrode 10.
Was formed. Further, a lead portion for making electrical contact between the strip-shaped conductive layer 5 and the electrode layer 10b was formed in the electrode lead portion of the base electrode 6.

【0031】次に、図4(k)に示すように、フォトリ
ソグラフィーによりCPW電極10以外の部分をフォト
レジスト30で覆い、下地電極層7上に金のメッキ層8
を積層し、最終的に図4(l)に示すように、マッハツ
ェンダー干渉計型の光(強度)変調器を作製した。
Next, as shown in FIG. 4K, a portion other than the CPW electrode 10 is covered with a photoresist 30 by photolithography, and a gold plating layer 8 is formed on the underlying electrode layer 7.
And finally a Mach-Zehnder interferometer type light (intensity) modulator was manufactured as shown in FIG. 4 (l).

【0032】この実施例によっても、従来例よりも緩和
時間が短くなった。これは導電層5に導体であるTiを
用いたため、焦電効果により生じた電荷を急速に均一化
することができたことが考えられる。一方、電極のS21
特性を従来例と比較すると、従来例より幾分か帯域制限
を受けているが、実用上十分に問題がない特性が得られ
ている。本実施例においては、導電層5に真空蒸着によ
り成膜したTi薄膜を用いたが、成膜方法は真空蒸着以
外にもスパッタリング等他の成膜方法を用いても同様の
効果が得られる。また、材料はTi以外にもSiやSi
Ox (シリコンリッチの酸化シリコン)から成る半導体
もしくはCr,Ti,Ni,Mo,Au,Pt,Ag,
Cu,Al,Nb,これらの元素を含む合金、酸化物、
または導電性ポリマーを用いても同様の効果が得られ
る。電極設計により、導体もしくは半導体材料の中で種
々、最適な抵抗率を有する材料を選択すれば良い。その
場合の設計の方針としてバッファー層の膜厚は1.5μ
m以上、電極幅8μm以下、導電層の抵抗率106 Ω・
cm以下、導電層の膜厚とパターン幅はいずれの成膜法
や材料を用いたときでも、膜厚は高周波の特性上バッフ
ァー層の膜厚の1/10以下が望ましい。また、パター
ンは電極間隔の半分以上を占める必要がある。以上のよ
うな方法で光変調器を作製すれば、温度ドリフト特性、
高周波特性ともに良好な特性を得ることができる。
Also in this embodiment, the relaxation time is shorter than in the conventional example. This is considered to be because the charge generated due to the pyroelectric effect could be rapidly uniformed because Ti, which is a conductor, was used for the conductive layer 5. On the other hand, the electrode S21
When the characteristics are compared with those of the conventional example, the band is somewhat limited compared to the conventional example, but characteristics that are practically satisfactory are obtained. In this embodiment, a Ti thin film formed by vacuum evaporation is used for the conductive layer 5, but the same effect can be obtained by using other film formation methods such as sputtering other than vacuum evaporation. In addition to Ti, the material is Si or Si.
Ox (silicon-rich silicon oxide) semiconductor or Cr, Ti, Ni, Mo, Au, Pt, Ag,
Cu, Al, Nb, alloys containing these elements, oxides,
Alternatively, the same effect can be obtained by using a conductive polymer. Depending on the electrode design, various materials having an optimum resistivity may be selected from the conductor or the semiconductor material. In this case, the thickness of the buffer layer is 1.5 μm as a design policy.
m, electrode width 8 μm or less, resistivity of conductive layer 10 6 Ω ·
cm or less, and the thickness and pattern width of the conductive layer are desirably 1/10 or less of the thickness of the buffer layer in terms of high frequency characteristics, regardless of which film formation method or material is used. Further, the pattern needs to occupy at least half of the electrode interval. If the optical modulator is manufactured by the above method, the temperature drift characteristic,
Good characteristics can be obtained together with high-frequency characteristics.

【0033】[0033]

【発明の効果】以上の説明から明らかなように、本発明
の光導波路デバイスによれば、きわめて簡便な構成、簡
便な製造プロセスでもって、周囲の急激な温度変化があ
っても、信号電極−グラウンド電極間に生じる電界が光
導波路に作用することが極力防止され、実質上ほぼ問題
にない程度に温度ドリフトを抑えることができ、信頼性
の非常に優れた光導波路デバイスを提供できる。
As is evident from the above description, according to the optical waveguide device of the present invention, the signal electrode can be formed with a very simple configuration and a simple manufacturing process even if there is a sudden change in the surrounding temperature. It is possible to prevent an electric field generated between the ground electrodes from acting on the optical waveguide as much as possible, to suppress the temperature drift to a level that causes substantially no problem, and to provide an optical waveguide device with extremely excellent reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)は、本発明に係る光導波路デバイスの一
例を示す平面図、(b)は(a)のb−b線拡大断面
図、(c)は(a)のc−c’線断面図。
1A is a plan view showing an example of an optical waveguide device according to the present invention, FIG. 1B is an enlarged cross-sectional view taken along line bb of FIG. 1A, and FIG. 'Line sectional view.

【図2】(a)〜(l)はそれぞれ実施例1の製造工程
を説明する断面図である。
FIGS. 2A to 2L are cross-sectional views illustrating manufacturing steps of Example 1. FIGS.

【図3】温度ドリフトの定義を説明する図。FIG. 3 is a diagram illustrating the definition of temperature drift.

【図4】(a)〜(l)はそれぞれ実施例2の製造工程
を説明する断面図である。
FIGS. 4 (a) to (l) are cross-sectional views illustrating manufacturing steps in Example 2. FIGS.

【図5】従来の光導波路デバイスの一例を示す断面図。FIG. 5 is a sectional view showing an example of a conventional optical waveguide device.

【符号の説明】[Explanation of symbols]

1 ・・・ 基板 2 ・・・ 光導波路 3 ・・・ 誘電体層 4,8 ・・・ フォトレジスト 5 ・・・ 導電層 9 ・・・ 溝 S1,S2 ・・・ 光導波路デバイス 10 ・・・ CPW電極(電極層) DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Optical waveguide 3 ... Dielectric layer 4,8 ... Photoresist 5 ... Conductive layer 9 ... Groove S1, S2 ... Optical waveguide device 10 ... CPW electrode (electrode layer)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 焦電性基板の表層に形成された光導波路
上に、誘電体層及び電極層を順次積層して成る光導波路
デバイスであって、前記焦電性基板の表面に比抵抗値が
106 Ω・cmより小さい導電層を形成させるとともに、
該導電層を前記電極層に電気的に接続させたことを特徴
とする光導波路デバイス。
1. An optical waveguide device comprising a dielectric layer and an electrode layer sequentially laminated on an optical waveguide formed on a surface layer of a pyroelectric substrate, wherein the surface of the pyroelectric substrate has a specific resistance value. To form a conductive layer smaller than 10 6 Ω · cm,
An optical waveguide device, wherein the conductive layer is electrically connected to the electrode layer.
JP25811096A 1996-09-30 1996-09-30 Optical waveguide device Pending JPH10104559A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25811096A JPH10104559A (en) 1996-09-30 1996-09-30 Optical waveguide device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25811096A JPH10104559A (en) 1996-09-30 1996-09-30 Optical waveguide device

Publications (1)

Publication Number Publication Date
JPH10104559A true JPH10104559A (en) 1998-04-24

Family

ID=17315648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25811096A Pending JPH10104559A (en) 1996-09-30 1996-09-30 Optical waveguide device

Country Status (1)

Country Link
JP (1) JPH10104559A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7133580B2 (en) 2002-11-19 2006-11-07 Fujitsu Limited Optical waveguide device and manufacturing method therefor
JP2012068679A (en) * 2011-12-19 2012-04-05 Sumitomo Osaka Cement Co Ltd Optical waveguide element
CN110320683A (en) * 2018-03-29 2019-10-11 住友大阪水泥股份有限公司 Optical modulator
WO2022071309A1 (en) * 2020-09-30 2022-04-07 住友大阪セメント株式会社 Optical waveguide element and optical modulator

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7133580B2 (en) 2002-11-19 2006-11-07 Fujitsu Limited Optical waveguide device and manufacturing method therefor
JP2012068679A (en) * 2011-12-19 2012-04-05 Sumitomo Osaka Cement Co Ltd Optical waveguide element
CN110320683A (en) * 2018-03-29 2019-10-11 住友大阪水泥股份有限公司 Optical modulator
WO2022071309A1 (en) * 2020-09-30 2022-04-07 住友大阪セメント株式会社 Optical waveguide element and optical modulator

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