JPH0997477A - Automatic equalizer and digital signal reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the power consumption by reducing the number of bits for multiplication for calculating tap coefficients of automatic equalization and curtailing the circuit scale. SOLUTION: A signal sequence from an analog/digital converter is sent to a transversal filter 12 to apply convolutional computation to tap coefficients and to send the result to a transmission sequence predicting circuit 20 to output prediction transmission data. An error calculating circuit 27 subtracts the output of the filter 12 from that of the circuit 20 to determine the prediction error, and a tap coefficient calculating circuit 30' calculates each tap coefficient of the transversal filter 12 so as to minimize this prediction error. A multiplication circuit 51 of the circuit 30' extracts MSB, namely, the sign bit by a MSB extracting circuit 54 to send it to multipliers 52a to 52e to multiply it by the sequence of input signals. For multipliers 52a to 52e, 1×8bit multipliers are used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic equalizer for adaptively waveform-equalizing an input signal obtained by digital transmission and a digital signal reproducing apparatus equipped with such an automatic equalizer. is there.

[0002]

2. Description of the Related Art In recent years, for example, DAT (Digital
In a digital signal recording / reproducing apparatus such as an audio tape recorder, an automatic equalizer has been used on the reproducing side.

FIG. 7 shows an example of a digital signal recording / reproducing apparatus using such an automatic equalizer.

A transmission data sequence {w (n)} corresponding to a signal to be recorded is input to the input terminal 201 of FIG. 7, and a recording including an electromagnetic conversion system such as the above DAT as a transmission path. It is supplied to the reproduction system 202. The impulse response sequence of the recording / reproducing system 202 is {g
(n)}. Recording / playback system 202 to automatic equalizer 203
Let {q (n)} be the input signal sequence sent to the transversal filter 204. This input signal sequence is {q
(n)} corresponds to a signal obtained by sampling the RF signal reproduced from the recording medium in the recording / reproducing system 202 at the channel clock timing by A / D conversion or the like.

The output signal sequence {v (n)} of the transversal filter 204 is converted into a predicted transmission sequence {w (n) '} by the transmission sequence prediction circuit 205 in the automatic equalizer 203,
The prediction error signal sequence {e (n) '} is obtained by sending to the subtractor 206 and subtracting the output signal sequence {v (n)}. Based on this prediction error signal sequence {e (n) ′}, the tap coefficient calculation circuit 207 calculates the tap coefficient of the transversal filter 204, and sends this tap coefficient to the transversal filter 204. The output signal sequence {v (n)} from the transversal filter 204 is sent to the detection circuit 208 as the output of the automatic equalizer 203, data detection is performed, and the detected data is output terminal 20.
It is taken out from 9.

Here, since the input signal sequence {q (n)} is equal to the convolution integral of the transmission data sequence {w (n)}, it is expressed by the following equation (1).

[0007]

[Equation 1]

The output signal v (n) of the transversal filter 204 is the input signal q (n) and the tap coefficient c of the filter.
Since it is equal to the convolution integral with _k (n), it is expressed as the following equation (2).

[0009]

[Equation 2]

In the equation (2), K represents the number of taps of the transversal filter 204.

Substituting this equation (2) into the above equation (1),

[0012]

(Equation 3)

In the equation (3), the sum of the impulse response of the transmission line is infinite and the sum is from -∞ to ∞, but in reality, this length is finite.

Next, the difference between the transmission data w (n) and the output signal v (n) of the transversal filter 204, that is, the error e (n) is calculated by the following equation (4).

E (n) = w (n) −v (n) (4) The theoretical error is expressed by equation (4), but actually the transmission data w (n) is known in advance. Therefore, the predicted transmission data w (n) ′ is actually obtained based on the temporary detection result of the output signal v (n) of the transversal filter 204, and the prediction error e (n) is calculated by the following equation (5). 'Calculate.

E (n) ′ = w (n) ′ − v (n) (5) where the output signal v of the transversal filter 204 is
An example of (n) is shown in (A) of FIG. 8 and this output signal v (n)
An example of the predicted transmission data w (n) ′ obtained by the transmission sequence prediction circuit 205 based on the above is shown in FIG. That is, the white circle (O) in FIG. 8A indicates the output signal v (n) obtained by A / D converting the reproduction RF waveform from the recording / reproduction system, and the white circle in FIG. 8B. (◯) indicates the predicted transmission data w (n) ′. The thick line in (A) of FIG. 8 indicates the prediction error e (n) ′ (= w from the subtractor 206.
(n) '-v (n)) is shown.

The transmission sequence prediction circuit 205 is shown in FIG.
As shown in, a signal sequence having a waveform that would be obtained without noise during transmission, for example, during recording / reproduction, equalization error, etc. is generated, and is used for obtaining the above error. The waveform of FIG. 8 shows an example of transmission by the so-called partial response class I (PRI) system. Since taking the three values in the case of this PRI, the standard amplitude, for example + 1V, 0V, when a -1 V, the detection threshold (+ V _th, -V _th) in the transmission series prediction circuit 205 respectively + 0.5V, -0 It will be 0.5V. The standard amplitude (+1) in FIG. 8 is the envelope of the RF waveform of the reproduced signal that is ideally equalized without noise, the standard amplitude (0) is 0 V,
The standard amplitude (-1) is the envelope x (-1) of the RF waveform of the reproduced signal that is ideally equalized without noise.

The tap coefficient calculation circuit 207 in the automatic equalizer 203 adjusts the tap coefficient so as to minimize the prediction error e (n) '.

[0019]

In the inside of the tap coefficient calculation circuit 207, the prediction error e (n) 'from the subtractor 206 and the input signal q (n) to the transversal filter 204 are calculated as described above. A process of multiplying by the number of taps is required. If the bit length or the bit width of the input signal q (n) and the prediction error e (n) ′ is n bits, n × n multiplication is required, but since a multiplier is generally large in circuit scale, When there is a desire to reduce power consumption, it is necessary that the multiplication bit number of the multiplier at the time of tap coefficient calculation is small.

The present invention has been made in view of the above circumstances, and reduces the circuit scale of the multiplication circuit used for calculating the tap coefficient of the filter in the automatic equalizer to reduce the power consumption. An object of the present invention is to provide an automatic equalizer and a digital signal reproducing device that can reduce the price of the device.

[0021]

In order to solve the above-mentioned problems, an automatic equalizer according to the present invention has a filter means for convoluting an input signal sequence and a tap coefficient, and an output from the filter means. On the other hand, a prediction unit that outputs a prediction signal of original data based on a predetermined threshold value, an error calculation unit that calculates a prediction error based on the output from the prediction unit, and the output from the filter unit, and And a tap coefficient calculation means for correcting the tap coefficient of the filter means by switching at least two correction amounts based on the prediction error from the error calculation means.

In this case, the correction amount switching control signal is
It is possible to use one of the MSB (most significant bit: sign bit) of the prediction error from the error calculating means, the MSB of the input signal series, or the multiplication result thereof.

Further, in the digital signal reproducing apparatus according to the present invention, the output from the analog / digital converting means for converting the signal read from the recording medium on which the digital signal is recorded into the digital signal is sent to the automatic equalizer. Supply,
Detect the original data based on the output from the automatic equalizer,
It has at least a configuration for correcting the error of the detected data.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Some preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an automatic equalizer as a first embodiment of the present invention. In FIG. 1, an input terminal 11 of the automatic equalizer has a digital input signal q (n) obtained by A / D converting a signal reproduced from a recording medium.
Is supplied. This input signal q (n) is sent to the transversal filter 12. The transversal filter 12 is a filter unit that performs a convolution operation of the input signal sequence and the tap coefficient, and in the example of FIG.
The transversal filter of a tap is shown. That is, in the transversal filter 12 of FIG. 1, the input signal q (n) and the delay circuits 13a, 13b, 13
The signals q (n-1), q (n-2), sequentially delayed by c and 13d,
q (n-3) and q (n-4) are multipliers 14a, 14b and 1 respectively.
4c, 14d, 14e, and are respectively multiplied by tap coefficients c ₀ (p), c ₁ (p), c ₂ (p), c ₃ (p), c ₄ (p), and each multiplication result is The filter output signal v (n) is obtained by sending the sums to the adders 15a to 15d. The output signal v (n) from the transversal filter 12 is sent to the output terminal 16 as the output of the automatic equalizer.

The output signal v (n) is sent to the transmission sequence prediction circuit 20 and the error calculation circuit 27 in the automatic equalizer. The transmission sequence prediction circuit 20 performs multi-valued detection, for example, ternary detection, on the output signal v (n) by the provisional detection circuit 21 using a predetermined threshold value, and sends the multi-valued detection to the selector 23 to obtain the predicted transmission data of standard amplitude. Output w (n) '. Error calculation circuit 2
7 is the output signal v from the predicted transmission data w (n) '.
(n) is subtracted by the subtractor 28 to obtain the prediction error e
(n) 'is calculated.

Prediction error e (n) 'from the error calculation circuit 27
Are sent to the tap coefficient calculation circuit 30. The tap coefficient calculation circuit 30 calculates the tap coefficients c ₀ (p) to c _{4 of the} transversal filter 12 based on the prediction error e (n) ′.
(p) is calculated, and various configurations are conceivable depending on the tap coefficient adjustment algorithm. In the example of FIG. 1, the configuration according to the algorithm of the maximum gradient method, which is one of them, is shown. Tap coefficient calculation circuit 30 'of FIG.
Is composed of a multiplication circuit 51, an integration circuit 32, and a tap coefficient correction circuit 33 ', and the integration circuit 32 and the tap coefficient correction circuit 33' are controlled by a control circuit 35.

The tap coefficient calculation circuit 30 'shown in FIG.
The number of multiplication bits of the multiplication circuit 51 is reduced, which reduces the circuit scale of the multiplication circuit 51.

Here, in order to explain the basics of tap coefficient calculation, an example of an automatic equalizer using a general tap coefficient calculation circuit 30 is shown in FIG.

The tap coefficient calculation circuit 30 of the automatic equalizer shown in FIG. 2 comprises a multiplication circuit 31, an integration circuit 32, and a tap coefficient correction circuit 33. The integration circuit 32 and the tap coefficient correction circuit 33. Are controlled by the control circuit 35.

The multiplication circuit 31 multiplies the prediction error e (n) 'from the error calculation circuit 27 by a constant μ, and the output from the multiplier 36, which is the input signal q from the input terminal 11. (n) and sequentially delayed signals q (n-1), q (n-2),
Multipliers 37a, 3 for multiplying q (n-3), q (n-4) respectively
7b, 37c, 37d, 37e. As shown in FIG. 2, each of the signals q (n-1) to q (n-4) has delay circuits 38a, 38b, 38 for sequentially delaying the input signal q (n).
c and 38d are provided.

The integrating circuit 32 is provided with adders 41a, 41b, 41c and 4 to which outputs from the multipliers 37a, 37b, 37c, 37d and 37e of the multiplying circuit 31 are respectively supplied.
1d, 41e and their respective adders 41a, 41b, 4
Flip-flops (FF) 42a, 42b, 42c, 4 to which outputs from 1c, 41d, 41e are respectively supplied.
2d and 42e, and each flip-flop 42a, 4e
The outputs from 2b, 42c, 42d, and 42e are supplied to the adders 41a, 41b, 41c, 41d, and 41e, respectively, for cumulative addition. The enable signal EN and the clear pulse CLR from the control circuit 35 are supplied to these flip-flops 42a, 42b, 42c, 42d, and 42e.

The tap coefficient correction circuit 33 includes an integration circuit 32.
Of the adders 41a, 41b, 41c, 41d, and 41e, respectively, of the adders 43a, 43b,
43c, 43d, 43e and their respective adders 43a,
Flip-flops (FF) 44a, 44b, to which outputs from 43b, 43c, 43d, 43e are supplied, respectively.
44c, 44d, 44e, and outputs from the flip-flops 44a, 44b, 44c, 44d, 44e are adders 43a, 43b, 43c, 43d, 43, respectively.
It is supplied to e for cumulative addition. These flip-flops 44a, 44b, 44c, 44
The load pulse LD from the control circuit 35 is supplied to d and 44e.
Is supplied.

The tap coefficient calculation circuit 30 having such a configuration
Will be described, that is, the maximum gradient method algorithm.

Tap coefficient c for each clock timing
_In order to sequentially correct _k (n) by the maximum gradient method, the following equation (6) utilizing partial differentiation of the predetermined evaluation function D by the tap coefficient c _k (n) is used.

[0036]

[Equation 4]

In this equation (6), μ is a constant,
The value of μ is determined by a trade-off between accurate convergence to the optimum point and speed of convergence. That is, when μ is increased, the amount of change per coefficient correction increases, so that the time required for convergence decreases, but the convergence to the optimum point deteriorates.

By the way, in the equation (6),
That is, this means that the tap coefficient c _k (n) is updated for each sample of data, but when the tap coefficient is updated every N times, the tap coefficient updated every N clocks is set. The above equation (6) can be rewritten as the following equation (7) by expressing it as c _k (p).

[0039]

(Equation 5)

Similarly, the above equation (2) is converted into the following (8)
Can be rewritten as an expression.

[0041]

(Equation 6)

A more specific algorithm is determined by what is selected as the evaluation function D of the above equation (7). Here, an example using the generally-used least squares method (hereinafter referred to as the LMS method) will be described. The evaluation function D of this LMS method is, as shown in the following expression (9),
The mean square error of the prediction error e (n) 'is used.

[0043]

(Equation 7)

In the equation (9), the number of data to be averaged is N. Substituting equation (9) into equation (8) above,

[0045]

(Equation 8)

When the partial differential of the evaluation function D of the equation (10) by the i-th tap coefficient c _i (p) is calculated, the following equation (11) is obtained.

[0047]

[Equation 9]

The i in the equation (11) is converted into k and substituted into the equation (7) to obtain the following equation (12) representing the tap coefficient changing algorithm.

[0049]

(Equation 10)

This equation (12) integrates the result of the input signal q (nk) to the transversal filter 12 and the prediction error e (n) 'N times, and corrects it for the tap coefficient c _k (p). It is meant to be a value.

The calculation of the second term on the right side of the equation (12) is performed by the multiplication circuit 31 and the integration circuit 32, and the addition of the second term and the first term is performed by the tap coefficient correction circuit 33. In this way, the tap coefficient calculation circuit 30 calculates the tap coefficient for automatic equalization.

By the way, in the embodiment of the present invention shown in FIG. 1, instead of the above equation (12), the following (1
The tap coefficient is corrected using the algorithm shown in equation (3).

When c _k (p + 1) = c _k (p) + d S _k ≧ 0 When c _k (p + 1) = c _k (p) −d S _k <0 (13) However, S _{k in the} equation (13) is the term of Σ in the equation (12), that is,

[0054]

[Equation 11]

That is. Further, the correction amount d of the tap coefficient correction unit in the equation (13) is a constant for correcting the tap coefficient c _k (p) once, and for example, the LSB (least significant bit) of the coefficient is set as the unit correction amount d do it.

In this equation (13), the correction amount of the tap coefficient per one time is d regardless of whether S _k is large or small. That is, the S _k is used only as binary information indicating whether the next tap coefficient should be increased or decreased by d.

Generally, when the automatic equalization circuit converges,
The above S _k does not change any more, but in this method, it always changes by d, so that the coefficient in the converged state alternates between the converged value + d and the converged value −d. But,
If the correction amount d is sufficiently smaller than the absolute value of the coefficient, even if the tap coefficient always fluctuates by ± d, the influence on the equalization characteristic of the system is negligibly small and it does not matter.

In the above equation (13), since S _k is used only as the binary information of the next coefficient increase / decrease, only the code of at least one value may be taken out before the multiplication. The condition judgment in this case is

[0059]

(Equation 12)

Any one of Se _k , Sq _k , and Sqe _k shown in FIG.

This is because the multiplication result of these expressions has a quantization error that occurs when the code is taken out or rounded to the code, but the quantization error which is a random noise component should be integrated or averaged. Disappears, and only the original signal component of S _k that increases or decreases the coefficient remains in the integration result. Therefore, Se _k , Sq _k , Sqe
_{This is because k} can be used for the condition determination of the above equation (13).

In order to realize the algorithm shown in the equation (13) as described above, the tap coefficient calculation circuit 3 of FIG.
In 0 ', the above Se _k is used for the condition judgment. That is, the MSB of the prediction error e (n) 'in the multiplication circuit 51.
(The most significant bit: sign bit) is taken out by the MSB extraction means 54, and the multipliers 37a, 37b, 3 of FIG.
Multipliers 52a, 52 corresponding to 7c, 37d, 37e
b, 52c, 52d, 52e. Also, FIG.
The delay circuits 53a, 53b, 53c, and 53d in FIG. 3 correspond to the delay circuits 38a, 38b, 38c, and 38d in FIG. The MSB extracting means 54 can be easily realized by connecting only the MSB of the data bus of the error calculating circuit 27 to the multipliers 52a to 52e without providing a separate circuit.

The integrating circuit 32 to which the outputs from the multipliers 52a to 52e of the multiplying circuit 51 are sent is the same as the integrating circuit 32 of FIG. 2, but the following tap coefficient correction circuit 33 'is used.
Is a selector switch 45a, 45b, 45c, 45 for taking out the MSB (most significant bit: sign bit) of each output from the integrating circuit 32 and switching between the above + d and -d.
d, 45e are respectively controlled, and these changeover switches 45a, 45b, 45c, 45d,
The output from 45e is added to the adders 43a, 43b, 43c, 4
It is sent to 3d and 43e respectively.

The other structure of FIG. 1 is the same as that of FIG. Therefore, the tap coefficient correction algorithm by the tap coefficient calculation circuit 30 'of FIG. 1 is expressed by the following equation (14).

When c _k (p + 1) = c _k (p) + d Se _k ≧ 0 When c _k (p + 1) = c _k (p) −d Se _k <0 (14) Here, assuming that the word length or word width of the input signal q (n) and the output signal v (n) is 8 bits, each of the multipliers 37a to 37e in the configuration of FIG. 2 becomes an 8 × 8 bit multiplier. However, according to the configuration of FIG. 1, each of the multipliers 52a to 52a
Since e is a 1 × 8 bit multiplier, the circuit scale can be reduced. Therefore, power saving of the device can be easily achieved, and
Inexpensive supply is also possible.

Next, a specific example of a digital signal reproducing apparatus using the automatic equalizer as shown in FIG. 1 will be described with reference to the drawings.

FIG. 3 shows a digital audio tape recorder (DAT) as an example of a device to which the above-described automatic equalizer is applied.

In FIG. 3, an audio signal to be recorded is converted into a digital signal by an A / D converter 101, an error correction parity adding circuit 102 adds error correction parity, and 8/10 conversion is performed. 8 in circuit 103
The bit data is converted into a 10-channel bit signal for recording, amplified by the recording amplifier 104, and becomes recording data or transmission data w (n).

This transmission data w (n) is used in the recording / reproducing system 11
0 is sent to the recording head 111 and recorded on the recording tape 112, and the recorded contents are reproduced from the recording tape 112 by the reproducing head 113. The signal from the reproducing head 113 is amplified by the reproducing amplifier 114 and is temporarily equalized by the temporary equalizing circuit 115. From the recording head 111 to the provisional equalization circuit 115
Is used as a recording / reproducing system 110, and a recording tape 112
When a magnetic tape is used for each head 111, 11
For example, a rotary magnetic head is used for the recording / reproducing system 11
0 is an electromagnetic conversion system. The impulse response of the transmission path of the recording / reproducing system 110 is g (n).

The signal from the temporary equalizing circuit 115 of the recording / reproducing system 110, a so-called RF signal, is sent to the A / D converter 121, sampled at the channel clock timing and quantized to be converted into a digital signal. Is
It is sent to the input terminal 11 of the automatic equalizer 10 as an input signal q (n). As the automatic equalizer 10, the automatic equalizer configured as shown in FIG. 1 can be used.

From the output terminal 16 of the automatic equalizer 10, as described with reference to FIG. 1, the adaptively waveform-equalized output signal v (n) is taken out and sent to the detection circuit 123. In the detection circuit 123, transmission data detection using a threshold value is performed, the obtained data is sent to the error correction circuit 125, subjected to error correction processing, converted into an analog audio signal by the D / A converter 126, and output. It

As the recording / reproducing system 110, Ach,
A specific example of the operation in the case of using an electromagnetic conversion system having a rotary magnetic head for alternately recording and reproducing two channels of Bch will be described with reference to FIG.

The switching pulse SWP of FIG. 4 is a pulse for switching between Ach and Bch of the rotary magnetic head, and each head reproduces from the magnetic tape only for about 1/4 of one cycle. A signal like the reproduction signal RF of 4 is obtained. FIG. 4 shows an operation example of the Ach, which is a stable portion of the reproduced signal, such as a period T _{SI from} time t _{2 to} t ₃ excluding unstable portions before and after in the reproduced signal of the Ach. The process for automatic equalization is performed.

The clear pulse CLR and the enable signal EN of FIG. 4 are supplied from the control circuit 35 of FIG. 1 to the flip-flops 42 of the integrating circuit 32 in the tap coefficient calculating circuit 30 '.
a to 42e, and a clear pulse CLR
Is the fall timing t of the switching pulse SWP
₁ and the enable signal EN is the reproduction signal RF.
_Is active, that is, "L", only during the stable period T _SI . Therefore, the output from the integrating circuit 32 in FIG. 1 becomes as shown in the integrating circuit output SI in FIG.
The integration operation is performed only during the enable period T _SI .

Number of integrations N within this enable period T _SI
S is the period T _SI divided by the channel clock period T _ch (N _S = T _SI / T _ch ). As a specific example, the channel clock frequency f _ch is 9.4 MHz, the channel clock period T _ch is about 106 ns, and the period in which the reproduction signal of Ach is output, that is, about 1/4 of the head rotation period.
Is 7.5 ms, and 1/2 of the central part, that is, 3.75 ms, is the enable period T _SI ,
Since T _SI / T _ch is about 3.75 ms / 106 ns,
The number of integration times N _S is about 35377 times.

[0076] integration result obtained by the integrating operation is sent to the tap coefficient correction circuit 33 of FIG. 1 ', the time t ₃
The load pulse LD is issued at a time t ₄ later than that, and the flip-flops 44 a to 4 a of the tap coefficient correction circuit 33 are output.
4e is loaded with + d or -d selected according to the MSB of the integration result, so that the Ach coefficient KA of FIG. 4 corresponding to the tap coefficients c ₀ (p) to c ₄ (p) of Ach is loaded.
Will be switched at the time t ₄ . In addition,
The load pulse LD is a pulse for correcting the tap coefficient c _k (p), and the tap coefficient correction should be performed in a section where the reproduction RF signal of the Ach is not output. Therefore, in the example of FIG. It is generated immediately after the output of the reproduction signal is finished.

By the way, when the equalization error is large, a large coefficient correction is required at a time, so the value of S _k becomes large. However, in the algorithm shown in (14), the correction value per time is d. However, it does not matter in practice, though it will take some convergence time. That is, for example, if the bit length of the tap coefficient is 8 bits, d is LSB, and the initial value of the coefficient is 0, the maximum value of the coefficient is 128.
Therefore, the coefficient will be converged by a maximum of 128 times of coefficient correction, but the time required for the coefficient correction of the 128 circuits is applied to the DAT and corrected once per one rotation of the rotary drum. Even at this time, one revolution is 30 ms and 128 revolutions are only 3.81 seconds, which is practically acceptable.

Next, FIG. 5 shows an essential part of the second embodiment of the present invention, in which the condition judgment is made by the above Sq _k ,
The tap coefficient is corrected by the following equation (15).

When c _k (p + 1) = c _k (p) + d Sq _k ≧ 0 When c _k (p + 1) = c _k (p) −d Sq _k <0 ... (15) That is, the multiplication circuit 61 of FIG. 5 uses the prediction error e (n) ′ from the error calculation circuit 27 for the multipliers 37a and 37a of FIG.
multipliers 62a corresponding to b, 37c, 37d, and 37e,
62b, 62c, 62d, 62e, MSB (most significant bit: sign bit) of the input signal q (n) is taken out by the MSB extraction means 65, and is sent to the delay circuits 38a, 38b, 38c, 38d of FIG. Corresponding delay circuit 6
3a, 63b, 63c, 63d. The other structure is similar to that of FIG. 1 described above, and thus the description thereof will be omitted.

Also in the example of FIG. 6, each of the multipliers 62a to 62a.
Since the number of multiplication bits in e can be reduced and, for example, an 8 × 1 bit multiplier is sufficient, the circuit scale can be reduced, which can contribute to cost reduction and power saving.

Further, FIG. 6 shows an essential part of the third embodiment of the present invention, in which the condition judgment is made by the above Sqe _k , and the tap coefficient is corrected by the following equation (16).

When c _k (p + 1) = c _k (p) + d Sqe _k ≧ 0 When c _k (p + 1) = c _k (p) −d Sqe _k <0 (16) That is, the multiplication circuit 71 of FIG. 6 extracts the MSB of the prediction error e (n) ′ from the error calculation circuit 27 by the MSB extraction means 74, and outputs it as the multiplier 37a, 37b of FIG.
Multipliers 72a, 72 corresponding to 37c, 37d, 37e
b, 72c, 72d, and 72e, the MSB of the input signal q (n) is taken out by the MSB extracting means 75, and the delay circuits 73a, 73b corresponding to the delay circuits 38a, 38b, 38c, 38d in FIG. It is sent to 73c and 73d. Since other configurations are the same as those in FIG. 1 described above, corresponding parts are designated by the same reference numerals and description thereof will be omitted.

According to the example of FIG. 6, each of the multipliers 72a ...
As 72e, a 1 × 1 bit multiplier is sufficient, and it can be configured with only a logic circuit, and the circuit scale can be significantly reduced.

It should be noted that each of the MSB extracting means 65, 74, 75 shown in FIGS. 5 and 6 may also be configured to send only the MSB by connection without using a separate circuit.

The present invention is not limited to the above-mentioned example. For example, the recording / reproducing system as a transmission line is not limited to a digital audio tape recorder, and a digital VTR, a disc recording / reproducing system or the like is used. be able to. Also, a transmission / reception system may be used as a transmission path.
Further, the correction amount may be set to three values or more, and these may be switched and selected.

[0086]

As is apparent from the above description, according to the present invention, the tap coefficient of the filter means is corrected by switching at least two predetermined correction amounts, and the correction amount is switched. Since the control is performed using at least one of the sign of the prediction error and the sign of the filter input signal, the calculation process, especially the multiplication process is simplified, and the circuit scale of the multiplier is reduced to reduce the power consumption. It can contribute to reduction and price reduction.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a first embodiment of an automatic equalizer according to the present invention.

FIG. 2 is a block circuit diagram showing an example of a general automatic equalizer.

FIG. 3 is a block diagram showing a schematic configuration of a digital audio tape recorder as an example of a digital signal reproducing apparatus to which the present invention is applied.

FIG. 4 is a timing chart for explaining an automatic equalization operation in the digital audio tape recorder.

FIG. 5 is a block circuit diagram showing a second embodiment of an automatic equalizer according to the present invention.

FIG. 6 is a block circuit diagram showing a third embodiment of an automatic equalizer according to the present invention.

FIG. 7 is a block diagram showing an example of a digital signal reproducing apparatus using a conventional automatic equalizer.

8 is a waveform chart for explaining the operation of the transmission sequence prediction circuit in FIG.

[Explanation of symbols]

11 input terminal 12 transversal filter 16 output terminal 20 transmission sequence prediction circuit 27 error calculation circuit 30 'tap coefficient calculation circuit 32 integration circuit 33' tap coefficient correction circuit 51, 61, 71 multiplication circuit 52a to 52e, 62a to 62e, 72a ~ 72e multiplier

[Procedure amendment]

[Submission date] November 28, 1995

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0026

[Correction method] Change

[Correction contents]

The output signal v (n) is sent to the transmission sequence prediction circuit 20 and the error calculation circuit 27 in the automatic equalizer. The transmission sequence prediction circuit 20 performs multi-level detection, for example, ternary detection, on the output signal v (n) by the temporary detection circuit 21 using a predetermined threshold value, and sends the multi-level detection to the selector 23 to predict transmission data w of standard amplitude. (n) 'is output. Error calculation circuit 27
Is the output signal v from the predicted transmission data w (n) ′.
(n) is subtracted by the subtractor 28 to obtain the prediction error e
(n) 'is calculated.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0044

[Correction method] Change

[Correction contents]

In the equation (9), the number of data to be averaged is N. Substituting equation (8) into equation (9),

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0047

[Correction method] Change

[Correction contents]

[0047]

[Equation 9]

Claims (8)

[Claims] 1. A filter means for convolutionally calculating an input signal sequence and a tap coefficient, a predicting means for outputting a prediction signal of original data based on a predetermined threshold with respect to an output from the filter means, and the prediction. Error calculation means for calculating a prediction error based on the output from the means and the output from the filter means, and at least two modifications of the tap coefficient of the filter means based on the prediction error from the error calculation means. An automatic equalizer, comprising: a tap coefficient calculating means for switching and correcting an amount. 2. The tap coefficient calculating means extracts the sign of the prediction error from the error calculating means and controls the switching of the correction amount based on the sign of the prediction error. The described automatic equalizer. 3. The automatic tap setting method according to claim 1, wherein the tap coefficient calculating means extracts a code of the input signal series and controls the switching of the correction amount based on the code of the input signal series. Equalizer. 4. The tap coefficient calculation means performs switching control of the correction amount based on a multiplication result of the sign of the prediction error from the error calculation means and the sign of the input signal sequence. The automatic equalizer according to claim 1. 5. An analog / digital conversion means for converting a signal read from a recording medium on which a digital signal is recorded into a digital signal, and a convolution operation of a signal sequence from the analog / digital conversion means and a tap coefficient. Based on a filter means, a prediction means for outputting a prediction signal of original data based on a predetermined threshold value with respect to the output from the filter means, an output from the prediction means, and an output from the filter means Error calculating means for calculating a prediction error; tap coefficient calculating means for correcting the tap coefficient of the filter means by switching at least two correction amounts based on the prediction error from the error calculating means; Detecting means for detecting the original data based on the output of and the error of the data detected by this detecting means A digital signal reproducing apparatus having an error correcting means for correcting the error. 6. The tap coefficient calculating means extracts the sign of the prediction error from the error calculating means and controls the correction amount switching based on the sign of the prediction error. The digital signal reproducing device described. 7. The digital signal according to claim 5, wherein the tap coefficient calculation means extracts a code of the input signal sequence and controls the correction amount switching based on the code of the input signal sequence. Signal reproduction device. 8. The tap coefficient calculation means performs switching control of the correction amount based on a multiplication result of the sign of the prediction error from the error calculation means and the sign of the input signal sequence. The digital signal reproducing device according to claim 5.